/drivers/video/omap2/displays/panel-tpo-td043mtea1.c

https://bitbucket.org/wisechild/galaxy-nexus · C · 537 lines · 403 code · 120 blank · 14 comment · 42 complexity · 1577df6bf859d448acf686b8d7c086a6 MD5 · raw file

  1. /*
  2. * LCD panel driver for TPO TD043MTEA1
  3. *
  4. * Author: Gražvydas Ignotas <notasas@gmail.com>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #include <linux/module.h>
  12. #include <linux/delay.h>
  13. #include <linux/spi/spi.h>
  14. #include <linux/regulator/consumer.h>
  15. #include <linux/gpio.h>
  16. #include <linux/err.h>
  17. #include <linux/slab.h>
  18. #include <video/omapdss.h>
  19. #define TPO_R02_MODE(x) ((x) & 7)
  20. #define TPO_R02_MODE_800x480 7
  21. #define TPO_R02_NCLK_RISING BIT(3)
  22. #define TPO_R02_HSYNC_HIGH BIT(4)
  23. #define TPO_R02_VSYNC_HIGH BIT(5)
  24. #define TPO_R03_NSTANDBY BIT(0)
  25. #define TPO_R03_EN_CP_CLK BIT(1)
  26. #define TPO_R03_EN_VGL_PUMP BIT(2)
  27. #define TPO_R03_EN_PWM BIT(3)
  28. #define TPO_R03_DRIVING_CAP_100 BIT(4)
  29. #define TPO_R03_EN_PRE_CHARGE BIT(6)
  30. #define TPO_R03_SOFTWARE_CTL BIT(7)
  31. #define TPO_R04_NFLIP_H BIT(0)
  32. #define TPO_R04_NFLIP_V BIT(1)
  33. #define TPO_R04_CP_CLK_FREQ_1H BIT(2)
  34. #define TPO_R04_VGL_FREQ_1H BIT(4)
  35. #define TPO_R03_VAL_NORMAL (TPO_R03_NSTANDBY | TPO_R03_EN_CP_CLK | \
  36. TPO_R03_EN_VGL_PUMP | TPO_R03_EN_PWM | \
  37. TPO_R03_DRIVING_CAP_100 | TPO_R03_EN_PRE_CHARGE | \
  38. TPO_R03_SOFTWARE_CTL)
  39. #define TPO_R03_VAL_STANDBY (TPO_R03_DRIVING_CAP_100 | \
  40. TPO_R03_EN_PRE_CHARGE | TPO_R03_SOFTWARE_CTL)
  41. static const u16 tpo_td043_def_gamma[12] = {
  42. 106, 200, 289, 375, 460, 543, 625, 705, 785, 864, 942, 1020
  43. };
  44. struct tpo_td043_device {
  45. struct spi_device *spi;
  46. struct regulator *vcc_reg;
  47. u16 gamma[12];
  48. u32 mode;
  49. u32 hmirror:1;
  50. u32 vmirror:1;
  51. };
  52. static int tpo_td043_write(struct spi_device *spi, u8 addr, u8 data)
  53. {
  54. struct spi_message m;
  55. struct spi_transfer xfer;
  56. u16 w;
  57. int r;
  58. spi_message_init(&m);
  59. memset(&xfer, 0, sizeof(xfer));
  60. w = ((u16)addr << 10) | (1 << 8) | data;
  61. xfer.tx_buf = &w;
  62. xfer.bits_per_word = 16;
  63. xfer.len = 2;
  64. spi_message_add_tail(&xfer, &m);
  65. r = spi_sync(spi, &m);
  66. if (r < 0)
  67. dev_warn(&spi->dev, "failed to write to LCD reg (%d)\n", r);
  68. return r;
  69. }
  70. static void tpo_td043_write_gamma(struct spi_device *spi, u16 gamma[12])
  71. {
  72. u8 i, val;
  73. /* gamma bits [9:8] */
  74. for (val = i = 0; i < 4; i++)
  75. val |= (gamma[i] & 0x300) >> ((i + 1) * 2);
  76. tpo_td043_write(spi, 0x11, val);
  77. for (val = i = 0; i < 4; i++)
  78. val |= (gamma[i+4] & 0x300) >> ((i + 1) * 2);
  79. tpo_td043_write(spi, 0x12, val);
  80. for (val = i = 0; i < 4; i++)
  81. val |= (gamma[i+8] & 0x300) >> ((i + 1) * 2);
  82. tpo_td043_write(spi, 0x13, val);
  83. /* gamma bits [7:0] */
  84. for (val = i = 0; i < 12; i++)
  85. tpo_td043_write(spi, 0x14 + i, gamma[i] & 0xff);
  86. }
  87. static int tpo_td043_write_mirror(struct spi_device *spi, bool h, bool v)
  88. {
  89. u8 reg4 = TPO_R04_NFLIP_H | TPO_R04_NFLIP_V | \
  90. TPO_R04_CP_CLK_FREQ_1H | TPO_R04_VGL_FREQ_1H;
  91. if (h)
  92. reg4 &= ~TPO_R04_NFLIP_H;
  93. if (v)
  94. reg4 &= ~TPO_R04_NFLIP_V;
  95. return tpo_td043_write(spi, 4, reg4);
  96. }
  97. static int tpo_td043_set_hmirror(struct omap_dss_device *dssdev, bool enable)
  98. {
  99. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  100. tpo_td043->hmirror = enable;
  101. return tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  102. tpo_td043->vmirror);
  103. }
  104. static bool tpo_td043_get_hmirror(struct omap_dss_device *dssdev)
  105. {
  106. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  107. return tpo_td043->hmirror;
  108. }
  109. static ssize_t tpo_td043_vmirror_show(struct device *dev,
  110. struct device_attribute *attr, char *buf)
  111. {
  112. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  113. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->vmirror);
  114. }
  115. static ssize_t tpo_td043_vmirror_store(struct device *dev,
  116. struct device_attribute *attr, const char *buf, size_t count)
  117. {
  118. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  119. int val;
  120. int ret;
  121. ret = kstrtoint(buf, 0, &val);
  122. if (ret < 0)
  123. return ret;
  124. val = !!val;
  125. ret = tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror, val);
  126. if (ret < 0)
  127. return ret;
  128. tpo_td043->vmirror = val;
  129. return count;
  130. }
  131. static ssize_t tpo_td043_mode_show(struct device *dev,
  132. struct device_attribute *attr, char *buf)
  133. {
  134. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  135. return snprintf(buf, PAGE_SIZE, "%d\n", tpo_td043->mode);
  136. }
  137. static ssize_t tpo_td043_mode_store(struct device *dev,
  138. struct device_attribute *attr, const char *buf, size_t count)
  139. {
  140. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  141. long val;
  142. int ret;
  143. ret = kstrtol(buf, 0, &val);
  144. if (ret != 0 || val & ~7)
  145. return -EINVAL;
  146. tpo_td043->mode = val;
  147. val |= TPO_R02_NCLK_RISING;
  148. tpo_td043_write(tpo_td043->spi, 2, val);
  149. return count;
  150. }
  151. static ssize_t tpo_td043_gamma_show(struct device *dev,
  152. struct device_attribute *attr, char *buf)
  153. {
  154. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  155. ssize_t len = 0;
  156. int ret;
  157. int i;
  158. for (i = 0; i < ARRAY_SIZE(tpo_td043->gamma); i++) {
  159. ret = snprintf(buf + len, PAGE_SIZE - len, "%u ",
  160. tpo_td043->gamma[i]);
  161. if (ret < 0)
  162. return ret;
  163. len += ret;
  164. }
  165. buf[len - 1] = '\n';
  166. return len;
  167. }
  168. static ssize_t tpo_td043_gamma_store(struct device *dev,
  169. struct device_attribute *attr, const char *buf, size_t count)
  170. {
  171. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(dev);
  172. unsigned int g[12];
  173. int ret;
  174. int i;
  175. ret = sscanf(buf, "%u %u %u %u %u %u %u %u %u %u %u %u",
  176. &g[0], &g[1], &g[2], &g[3], &g[4], &g[5],
  177. &g[6], &g[7], &g[8], &g[9], &g[10], &g[11]);
  178. if (ret != 12)
  179. return -EINVAL;
  180. for (i = 0; i < 12; i++)
  181. tpo_td043->gamma[i] = g[i];
  182. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  183. return count;
  184. }
  185. static DEVICE_ATTR(vmirror, S_IRUGO | S_IWUSR,
  186. tpo_td043_vmirror_show, tpo_td043_vmirror_store);
  187. static DEVICE_ATTR(mode, S_IRUGO | S_IWUSR,
  188. tpo_td043_mode_show, tpo_td043_mode_store);
  189. static DEVICE_ATTR(gamma, S_IRUGO | S_IWUSR,
  190. tpo_td043_gamma_show, tpo_td043_gamma_store);
  191. static struct attribute *tpo_td043_attrs[] = {
  192. &dev_attr_vmirror.attr,
  193. &dev_attr_mode.attr,
  194. &dev_attr_gamma.attr,
  195. NULL,
  196. };
  197. static struct attribute_group tpo_td043_attr_group = {
  198. .attrs = tpo_td043_attrs,
  199. };
  200. static const struct omap_video_timings tpo_td043_timings = {
  201. .x_res = 800,
  202. .y_res = 480,
  203. .pixel_clock = 36000,
  204. .hsw = 1,
  205. .hfp = 68,
  206. .hbp = 214,
  207. .vsw = 1,
  208. .vfp = 39,
  209. .vbp = 34,
  210. };
  211. static int tpo_td043_power_on(struct omap_dss_device *dssdev)
  212. {
  213. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  214. int nreset_gpio = dssdev->reset_gpio;
  215. int r;
  216. if (dssdev->state == OMAP_DSS_DISPLAY_ACTIVE)
  217. return 0;
  218. r = omapdss_dpi_display_enable(dssdev);
  219. if (r)
  220. goto err0;
  221. if (dssdev->platform_enable) {
  222. r = dssdev->platform_enable(dssdev);
  223. if (r)
  224. goto err1;
  225. }
  226. regulator_enable(tpo_td043->vcc_reg);
  227. /* wait for power up */
  228. msleep(160);
  229. if (gpio_is_valid(nreset_gpio))
  230. gpio_set_value(nreset_gpio, 1);
  231. tpo_td043_write(tpo_td043->spi, 2,
  232. TPO_R02_MODE(tpo_td043->mode) | TPO_R02_NCLK_RISING);
  233. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_NORMAL);
  234. tpo_td043_write(tpo_td043->spi, 0x20, 0xf0);
  235. tpo_td043_write(tpo_td043->spi, 0x21, 0xf0);
  236. tpo_td043_write_mirror(tpo_td043->spi, tpo_td043->hmirror,
  237. tpo_td043->vmirror);
  238. tpo_td043_write_gamma(tpo_td043->spi, tpo_td043->gamma);
  239. return 0;
  240. err1:
  241. omapdss_dpi_display_disable(dssdev);
  242. err0:
  243. return r;
  244. }
  245. static void tpo_td043_power_off(struct omap_dss_device *dssdev)
  246. {
  247. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  248. int nreset_gpio = dssdev->reset_gpio;
  249. if (dssdev->state != OMAP_DSS_DISPLAY_ACTIVE)
  250. return;
  251. tpo_td043_write(tpo_td043->spi, 3,
  252. TPO_R03_VAL_STANDBY | TPO_R03_EN_PWM);
  253. if (gpio_is_valid(nreset_gpio))
  254. gpio_set_value(nreset_gpio, 0);
  255. /* wait for at least 2 vsyncs before cutting off power */
  256. msleep(50);
  257. tpo_td043_write(tpo_td043->spi, 3, TPO_R03_VAL_STANDBY);
  258. regulator_disable(tpo_td043->vcc_reg);
  259. if (dssdev->platform_disable)
  260. dssdev->platform_disable(dssdev);
  261. omapdss_dpi_display_disable(dssdev);
  262. }
  263. static int tpo_td043_enable(struct omap_dss_device *dssdev)
  264. {
  265. int ret;
  266. dev_dbg(&dssdev->dev, "enable\n");
  267. ret = tpo_td043_power_on(dssdev);
  268. if (ret)
  269. return ret;
  270. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  271. return 0;
  272. }
  273. static void tpo_td043_disable(struct omap_dss_device *dssdev)
  274. {
  275. dev_dbg(&dssdev->dev, "disable\n");
  276. tpo_td043_power_off(dssdev);
  277. dssdev->state = OMAP_DSS_DISPLAY_DISABLED;
  278. }
  279. static int tpo_td043_suspend(struct omap_dss_device *dssdev)
  280. {
  281. tpo_td043_power_off(dssdev);
  282. dssdev->state = OMAP_DSS_DISPLAY_SUSPENDED;
  283. return 0;
  284. }
  285. static int tpo_td043_resume(struct omap_dss_device *dssdev)
  286. {
  287. int r = 0;
  288. r = tpo_td043_power_on(dssdev);
  289. if (r)
  290. return r;
  291. dssdev->state = OMAP_DSS_DISPLAY_ACTIVE;
  292. return 0;
  293. }
  294. static int tpo_td043_probe(struct omap_dss_device *dssdev)
  295. {
  296. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  297. int nreset_gpio = dssdev->reset_gpio;
  298. int ret = 0;
  299. dev_dbg(&dssdev->dev, "probe\n");
  300. if (tpo_td043 == NULL) {
  301. dev_err(&dssdev->dev, "missing tpo_td043_device\n");
  302. return -ENODEV;
  303. }
  304. dssdev->panel.config = OMAP_DSS_LCD_TFT | OMAP_DSS_LCD_IHS |
  305. OMAP_DSS_LCD_IVS | OMAP_DSS_LCD_IPC;
  306. dssdev->panel.timings = tpo_td043_timings;
  307. dssdev->ctrl.pixel_size = 24;
  308. tpo_td043->mode = TPO_R02_MODE_800x480;
  309. memcpy(tpo_td043->gamma, tpo_td043_def_gamma, sizeof(tpo_td043->gamma));
  310. tpo_td043->vcc_reg = regulator_get(&dssdev->dev, "vcc");
  311. if (IS_ERR(tpo_td043->vcc_reg)) {
  312. dev_err(&dssdev->dev, "failed to get LCD VCC regulator\n");
  313. ret = PTR_ERR(tpo_td043->vcc_reg);
  314. goto fail_regulator;
  315. }
  316. if (gpio_is_valid(nreset_gpio)) {
  317. ret = gpio_request(nreset_gpio, "lcd reset");
  318. if (ret < 0) {
  319. dev_err(&dssdev->dev, "couldn't request reset GPIO\n");
  320. goto fail_gpio_req;
  321. }
  322. ret = gpio_direction_output(nreset_gpio, 0);
  323. if (ret < 0) {
  324. dev_err(&dssdev->dev, "couldn't set GPIO direction\n");
  325. goto fail_gpio_direction;
  326. }
  327. }
  328. ret = sysfs_create_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  329. if (ret)
  330. dev_warn(&dssdev->dev, "failed to create sysfs files\n");
  331. return 0;
  332. fail_gpio_direction:
  333. gpio_free(nreset_gpio);
  334. fail_gpio_req:
  335. regulator_put(tpo_td043->vcc_reg);
  336. fail_regulator:
  337. kfree(tpo_td043);
  338. return ret;
  339. }
  340. static void tpo_td043_remove(struct omap_dss_device *dssdev)
  341. {
  342. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&dssdev->dev);
  343. int nreset_gpio = dssdev->reset_gpio;
  344. dev_dbg(&dssdev->dev, "remove\n");
  345. sysfs_remove_group(&dssdev->dev.kobj, &tpo_td043_attr_group);
  346. regulator_put(tpo_td043->vcc_reg);
  347. if (gpio_is_valid(nreset_gpio))
  348. gpio_free(nreset_gpio);
  349. }
  350. static struct omap_dss_driver tpo_td043_driver = {
  351. .probe = tpo_td043_probe,
  352. .remove = tpo_td043_remove,
  353. .enable = tpo_td043_enable,
  354. .disable = tpo_td043_disable,
  355. .suspend = tpo_td043_suspend,
  356. .resume = tpo_td043_resume,
  357. .set_mirror = tpo_td043_set_hmirror,
  358. .get_mirror = tpo_td043_get_hmirror,
  359. .driver = {
  360. .name = "tpo_td043mtea1_panel",
  361. .owner = THIS_MODULE,
  362. },
  363. };
  364. static int tpo_td043_spi_probe(struct spi_device *spi)
  365. {
  366. struct omap_dss_device *dssdev = spi->dev.platform_data;
  367. struct tpo_td043_device *tpo_td043;
  368. int ret;
  369. if (dssdev == NULL) {
  370. dev_err(&spi->dev, "missing dssdev\n");
  371. return -ENODEV;
  372. }
  373. spi->bits_per_word = 16;
  374. spi->mode = SPI_MODE_0;
  375. ret = spi_setup(spi);
  376. if (ret < 0) {
  377. dev_err(&spi->dev, "spi_setup failed: %d\n", ret);
  378. return ret;
  379. }
  380. tpo_td043 = kzalloc(sizeof(*tpo_td043), GFP_KERNEL);
  381. if (tpo_td043 == NULL)
  382. return -ENOMEM;
  383. tpo_td043->spi = spi;
  384. dev_set_drvdata(&spi->dev, tpo_td043);
  385. dev_set_drvdata(&dssdev->dev, tpo_td043);
  386. omap_dss_register_driver(&tpo_td043_driver);
  387. return 0;
  388. }
  389. static int __devexit tpo_td043_spi_remove(struct spi_device *spi)
  390. {
  391. struct tpo_td043_device *tpo_td043 = dev_get_drvdata(&spi->dev);
  392. omap_dss_unregister_driver(&tpo_td043_driver);
  393. kfree(tpo_td043);
  394. return 0;
  395. }
  396. static struct spi_driver tpo_td043_spi_driver = {
  397. .driver = {
  398. .name = "tpo_td043mtea1_panel_spi",
  399. .bus = &spi_bus_type,
  400. .owner = THIS_MODULE,
  401. },
  402. .probe = tpo_td043_spi_probe,
  403. .remove = __devexit_p(tpo_td043_spi_remove),
  404. };
  405. static int __init tpo_td043_init(void)
  406. {
  407. return spi_register_driver(&tpo_td043_spi_driver);
  408. }
  409. static void __exit tpo_td043_exit(void)
  410. {
  411. spi_unregister_driver(&tpo_td043_spi_driver);
  412. }
  413. module_init(tpo_td043_init);
  414. module_exit(tpo_td043_exit);
  415. MODULE_AUTHOR("Gražvydas Ignotas <notasas@gmail.com>");
  416. MODULE_DESCRIPTION("TPO TD043MTEA1 LCD Driver");
  417. MODULE_LICENSE("GPL");