PageRenderTime 181ms CodeModel.GetById 16ms RepoModel.GetById 0ms app.codeStats 0ms

/drivers/media/video/cx88/cx88-tvaudio.c

https://bitbucket.org/wisechild/galaxy-nexus
C | 1059 lines | 892 code | 83 blank | 84 comment | 55 complexity | e50b8c7acb84b0a1de41ab214f99c6c2 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /*
  2. cx88x-audio.c - Conexant CX23880/23881 audio downstream driver driver
  3. (c) 2001 Michael Eskin, Tom Zakrajsek [Windows version]
  4. (c) 2002 Yurij Sysoev <yurij@naturesoft.net>
  5. (c) 2003 Gerd Knorr <kraxel@bytesex.org>
  6. -----------------------------------------------------------------------
  7. Lot of voodoo here. Even the data sheet doesn't help to
  8. understand what is going on here, the documentation for the audio
  9. part of the cx2388x chip is *very* bad.
  10. Some of this comes from party done linux driver sources I got from
  11. [undocumented].
  12. Some comes from the dscaler sources, one of the dscaler driver guy works
  13. for Conexant ...
  14. -----------------------------------------------------------------------
  15. This program is free software; you can redistribute it and/or modify
  16. it under the terms of the GNU General Public License as published by
  17. the Free Software Foundation; either version 2 of the License, or
  18. (at your option) any later version.
  19. This program is distributed in the hope that it will be useful,
  20. but WITHOUT ANY WARRANTY; without even the implied warranty of
  21. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  22. GNU General Public License for more details.
  23. You should have received a copy of the GNU General Public License
  24. along with this program; if not, write to the Free Software
  25. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  26. */
  27. #include <linux/module.h>
  28. #include <linux/errno.h>
  29. #include <linux/freezer.h>
  30. #include <linux/kernel.h>
  31. #include <linux/mm.h>
  32. #include <linux/poll.h>
  33. #include <linux/signal.h>
  34. #include <linux/ioport.h>
  35. #include <linux/types.h>
  36. #include <linux/interrupt.h>
  37. #include <linux/vmalloc.h>
  38. #include <linux/init.h>
  39. #include <linux/delay.h>
  40. #include <linux/kthread.h>
  41. #include "cx88.h"
  42. static unsigned int audio_debug;
  43. module_param(audio_debug, int, 0644);
  44. MODULE_PARM_DESC(audio_debug, "enable debug messages [audio]");
  45. static unsigned int always_analog;
  46. module_param(always_analog,int,0644);
  47. MODULE_PARM_DESC(always_analog,"force analog audio out");
  48. static unsigned int radio_deemphasis;
  49. module_param(radio_deemphasis,int,0644);
  50. MODULE_PARM_DESC(radio_deemphasis, "Radio deemphasis time constant, "
  51. "0=None, 1=50us (elsewhere), 2=75us (USA)");
  52. #define dprintk(fmt, arg...) if (audio_debug) \
  53. printk(KERN_DEBUG "%s/0: " fmt, core->name , ## arg)
  54. /* ----------------------------------------------------------- */
  55. static const char * const aud_ctl_names[64] = {
  56. [EN_BTSC_FORCE_MONO] = "BTSC_FORCE_MONO",
  57. [EN_BTSC_FORCE_STEREO] = "BTSC_FORCE_STEREO",
  58. [EN_BTSC_FORCE_SAP] = "BTSC_FORCE_SAP",
  59. [EN_BTSC_AUTO_STEREO] = "BTSC_AUTO_STEREO",
  60. [EN_BTSC_AUTO_SAP] = "BTSC_AUTO_SAP",
  61. [EN_A2_FORCE_MONO1] = "A2_FORCE_MONO1",
  62. [EN_A2_FORCE_MONO2] = "A2_FORCE_MONO2",
  63. [EN_A2_FORCE_STEREO] = "A2_FORCE_STEREO",
  64. [EN_A2_AUTO_MONO2] = "A2_AUTO_MONO2",
  65. [EN_A2_AUTO_STEREO] = "A2_AUTO_STEREO",
  66. [EN_EIAJ_FORCE_MONO1] = "EIAJ_FORCE_MONO1",
  67. [EN_EIAJ_FORCE_MONO2] = "EIAJ_FORCE_MONO2",
  68. [EN_EIAJ_FORCE_STEREO] = "EIAJ_FORCE_STEREO",
  69. [EN_EIAJ_AUTO_MONO2] = "EIAJ_AUTO_MONO2",
  70. [EN_EIAJ_AUTO_STEREO] = "EIAJ_AUTO_STEREO",
  71. [EN_NICAM_FORCE_MONO1] = "NICAM_FORCE_MONO1",
  72. [EN_NICAM_FORCE_MONO2] = "NICAM_FORCE_MONO2",
  73. [EN_NICAM_FORCE_STEREO] = "NICAM_FORCE_STEREO",
  74. [EN_NICAM_AUTO_MONO2] = "NICAM_AUTO_MONO2",
  75. [EN_NICAM_AUTO_STEREO] = "NICAM_AUTO_STEREO",
  76. [EN_FMRADIO_FORCE_MONO] = "FMRADIO_FORCE_MONO",
  77. [EN_FMRADIO_FORCE_STEREO] = "FMRADIO_FORCE_STEREO",
  78. [EN_FMRADIO_AUTO_STEREO] = "FMRADIO_AUTO_STEREO",
  79. };
  80. struct rlist {
  81. u32 reg;
  82. u32 val;
  83. };
  84. static void set_audio_registers(struct cx88_core *core, const struct rlist *l)
  85. {
  86. int i;
  87. for (i = 0; l[i].reg; i++) {
  88. switch (l[i].reg) {
  89. case AUD_PDF_DDS_CNST_BYTE2:
  90. case AUD_PDF_DDS_CNST_BYTE1:
  91. case AUD_PDF_DDS_CNST_BYTE0:
  92. case AUD_QAM_MODE:
  93. case AUD_PHACC_FREQ_8MSB:
  94. case AUD_PHACC_FREQ_8LSB:
  95. cx_writeb(l[i].reg, l[i].val);
  96. break;
  97. default:
  98. cx_write(l[i].reg, l[i].val);
  99. break;
  100. }
  101. }
  102. }
  103. static void set_audio_start(struct cx88_core *core, u32 mode)
  104. {
  105. /* mute */
  106. cx_write(AUD_VOL_CTL, (1 << 6));
  107. /* start programming */
  108. cx_write(AUD_INIT, mode);
  109. cx_write(AUD_INIT_LD, 0x0001);
  110. cx_write(AUD_SOFT_RESET, 0x0001);
  111. }
  112. static void set_audio_finish(struct cx88_core *core, u32 ctl)
  113. {
  114. u32 volume;
  115. /* restart dma; This avoids buzz in NICAM and is good in others */
  116. cx88_stop_audio_dma(core);
  117. cx_write(AUD_RATE_THRES_DMD, 0x000000C0);
  118. cx88_start_audio_dma(core);
  119. if (core->board.mpeg & CX88_MPEG_BLACKBIRD) {
  120. cx_write(AUD_I2SINPUTCNTL, 4);
  121. cx_write(AUD_BAUDRATE, 1);
  122. /* 'pass-thru mode': this enables the i2s output to the mpeg encoder */
  123. cx_set(AUD_CTL, EN_I2SOUT_ENABLE);
  124. cx_write(AUD_I2SOUTPUTCNTL, 1);
  125. cx_write(AUD_I2SCNTL, 0);
  126. /* cx_write(AUD_APB_IN_RATE_ADJ, 0); */
  127. }
  128. if ((always_analog) || (!(core->board.mpeg & CX88_MPEG_BLACKBIRD))) {
  129. ctl |= EN_DAC_ENABLE;
  130. cx_write(AUD_CTL, ctl);
  131. }
  132. /* finish programming */
  133. cx_write(AUD_SOFT_RESET, 0x0000);
  134. /* unmute */
  135. volume = cx_sread(SHADOW_AUD_VOL_CTL);
  136. cx_swrite(SHADOW_AUD_VOL_CTL, AUD_VOL_CTL, volume);
  137. core->last_change = jiffies;
  138. }
  139. /* ----------------------------------------------------------- */
  140. static void set_audio_standard_BTSC(struct cx88_core *core, unsigned int sap,
  141. u32 mode)
  142. {
  143. static const struct rlist btsc[] = {
  144. {AUD_AFE_12DB_EN, 0x00000001},
  145. {AUD_OUT1_SEL, 0x00000013},
  146. {AUD_OUT1_SHIFT, 0x00000000},
  147. {AUD_POLY0_DDS_CONSTANT, 0x0012010c},
  148. {AUD_DMD_RA_DDS, 0x00c3e7aa},
  149. {AUD_DBX_IN_GAIN, 0x00004734},
  150. {AUD_DBX_WBE_GAIN, 0x00004640},
  151. {AUD_DBX_SE_GAIN, 0x00008d31},
  152. {AUD_DCOC_0_SRC, 0x0000001a},
  153. {AUD_IIR1_4_SEL, 0x00000021},
  154. {AUD_DCOC_PASS_IN, 0x00000003},
  155. {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
  156. {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
  157. {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
  158. {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
  159. {AUD_DN0_FREQ, 0x0000283b},
  160. {AUD_DN2_SRC_SEL, 0x00000008},
  161. {AUD_DN2_FREQ, 0x00003000},
  162. {AUD_DN2_AFC, 0x00000002},
  163. {AUD_DN2_SHFT, 0x00000000},
  164. {AUD_IIR2_2_SEL, 0x00000020},
  165. {AUD_IIR2_2_SHIFT, 0x00000000},
  166. {AUD_IIR2_3_SEL, 0x0000001f},
  167. {AUD_IIR2_3_SHIFT, 0x00000000},
  168. {AUD_CRDC1_SRC_SEL, 0x000003ce},
  169. {AUD_CRDC1_SHIFT, 0x00000000},
  170. {AUD_CORDIC_SHIFT_1, 0x00000007},
  171. {AUD_DCOC_1_SRC, 0x0000001b},
  172. {AUD_DCOC1_SHIFT, 0x00000000},
  173. {AUD_RDSI_SEL, 0x00000008},
  174. {AUD_RDSQ_SEL, 0x00000008},
  175. {AUD_RDSI_SHIFT, 0x00000000},
  176. {AUD_RDSQ_SHIFT, 0x00000000},
  177. {AUD_POLYPH80SCALEFAC, 0x00000003},
  178. { /* end of list */ },
  179. };
  180. static const struct rlist btsc_sap[] = {
  181. {AUD_AFE_12DB_EN, 0x00000001},
  182. {AUD_DBX_IN_GAIN, 0x00007200},
  183. {AUD_DBX_WBE_GAIN, 0x00006200},
  184. {AUD_DBX_SE_GAIN, 0x00006200},
  185. {AUD_IIR1_1_SEL, 0x00000000},
  186. {AUD_IIR1_3_SEL, 0x00000001},
  187. {AUD_DN1_SRC_SEL, 0x00000007},
  188. {AUD_IIR1_4_SHIFT, 0x00000006},
  189. {AUD_IIR2_1_SHIFT, 0x00000000},
  190. {AUD_IIR2_2_SHIFT, 0x00000000},
  191. {AUD_IIR3_0_SHIFT, 0x00000000},
  192. {AUD_IIR3_1_SHIFT, 0x00000000},
  193. {AUD_IIR3_0_SEL, 0x0000000d},
  194. {AUD_IIR3_1_SEL, 0x0000000e},
  195. {AUD_DEEMPH1_SRC_SEL, 0x00000014},
  196. {AUD_DEEMPH1_SHIFT, 0x00000000},
  197. {AUD_DEEMPH1_G0, 0x00004000},
  198. {AUD_DEEMPH1_A0, 0x00000000},
  199. {AUD_DEEMPH1_B0, 0x00000000},
  200. {AUD_DEEMPH1_A1, 0x00000000},
  201. {AUD_DEEMPH1_B1, 0x00000000},
  202. {AUD_OUT0_SEL, 0x0000003f},
  203. {AUD_OUT1_SEL, 0x0000003f},
  204. {AUD_DN1_AFC, 0x00000002},
  205. {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
  206. {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
  207. {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
  208. {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
  209. {AUD_IIR1_0_SEL, 0x0000001d},
  210. {AUD_IIR1_2_SEL, 0x0000001e},
  211. {AUD_IIR2_1_SEL, 0x00000002},
  212. {AUD_IIR2_2_SEL, 0x00000004},
  213. {AUD_IIR3_2_SEL, 0x0000000f},
  214. {AUD_DCOC2_SHIFT, 0x00000001},
  215. {AUD_IIR3_2_SHIFT, 0x00000001},
  216. {AUD_DEEMPH0_SRC_SEL, 0x00000014},
  217. {AUD_CORDIC_SHIFT_1, 0x00000006},
  218. {AUD_POLY0_DDS_CONSTANT, 0x000e4db2},
  219. {AUD_DMD_RA_DDS, 0x00f696e6},
  220. {AUD_IIR2_3_SEL, 0x00000025},
  221. {AUD_IIR1_4_SEL, 0x00000021},
  222. {AUD_DN1_FREQ, 0x0000c965},
  223. {AUD_DCOC_PASS_IN, 0x00000003},
  224. {AUD_DCOC_0_SRC, 0x0000001a},
  225. {AUD_DCOC_1_SRC, 0x0000001b},
  226. {AUD_DCOC1_SHIFT, 0x00000000},
  227. {AUD_RDSI_SEL, 0x00000009},
  228. {AUD_RDSQ_SEL, 0x00000009},
  229. {AUD_RDSI_SHIFT, 0x00000000},
  230. {AUD_RDSQ_SHIFT, 0x00000000},
  231. {AUD_POLYPH80SCALEFAC, 0x00000003},
  232. { /* end of list */ },
  233. };
  234. mode |= EN_FMRADIO_EN_RDS;
  235. if (sap) {
  236. dprintk("%s SAP (status: unknown)\n", __func__);
  237. set_audio_start(core, SEL_SAP);
  238. set_audio_registers(core, btsc_sap);
  239. set_audio_finish(core, mode);
  240. } else {
  241. dprintk("%s (status: known-good)\n", __func__);
  242. set_audio_start(core, SEL_BTSC);
  243. set_audio_registers(core, btsc);
  244. set_audio_finish(core, mode);
  245. }
  246. }
  247. static void set_audio_standard_NICAM(struct cx88_core *core, u32 mode)
  248. {
  249. static const struct rlist nicam_l[] = {
  250. {AUD_AFE_12DB_EN, 0x00000001},
  251. {AUD_RATE_ADJ1, 0x00000060},
  252. {AUD_RATE_ADJ2, 0x000000F9},
  253. {AUD_RATE_ADJ3, 0x000001CC},
  254. {AUD_RATE_ADJ4, 0x000002B3},
  255. {AUD_RATE_ADJ5, 0x00000726},
  256. {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
  257. {AUD_DEEMPHDENOM2_R, 0x00000000},
  258. {AUD_ERRLOGPERIOD_R, 0x00000064},
  259. {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
  260. {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
  261. {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
  262. {AUD_POLYPH80SCALEFAC, 0x00000003},
  263. {AUD_DMD_RA_DDS, 0x00C00000},
  264. {AUD_PLL_INT, 0x0000001E},
  265. {AUD_PLL_DDS, 0x00000000},
  266. {AUD_PLL_FRAC, 0x0000E542},
  267. {AUD_START_TIMER, 0x00000000},
  268. {AUD_DEEMPHNUMER1_R, 0x000353DE},
  269. {AUD_DEEMPHNUMER2_R, 0x000001B1},
  270. {AUD_PDF_DDS_CNST_BYTE2, 0x06},
  271. {AUD_PDF_DDS_CNST_BYTE1, 0x82},
  272. {AUD_PDF_DDS_CNST_BYTE0, 0x12},
  273. {AUD_QAM_MODE, 0x05},
  274. {AUD_PHACC_FREQ_8MSB, 0x34},
  275. {AUD_PHACC_FREQ_8LSB, 0x4C},
  276. {AUD_DEEMPHGAIN_R, 0x00006680},
  277. {AUD_RATE_THRES_DMD, 0x000000C0},
  278. { /* end of list */ },
  279. };
  280. static const struct rlist nicam_bgdki_common[] = {
  281. {AUD_AFE_12DB_EN, 0x00000001},
  282. {AUD_RATE_ADJ1, 0x00000010},
  283. {AUD_RATE_ADJ2, 0x00000040},
  284. {AUD_RATE_ADJ3, 0x00000100},
  285. {AUD_RATE_ADJ4, 0x00000400},
  286. {AUD_RATE_ADJ5, 0x00001000},
  287. {AUD_ERRLOGPERIOD_R, 0x00000fff},
  288. {AUD_ERRINTRPTTHSHLD1_R, 0x000003ff},
  289. {AUD_ERRINTRPTTHSHLD2_R, 0x000000ff},
  290. {AUD_ERRINTRPTTHSHLD3_R, 0x0000003f},
  291. {AUD_POLYPH80SCALEFAC, 0x00000003},
  292. {AUD_DEEMPHGAIN_R, 0x000023c2},
  293. {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
  294. {AUD_DEEMPHNUMER2_R, 0x0003023e},
  295. {AUD_DEEMPHDENOM1_R, 0x0000f3d0},
  296. {AUD_DEEMPHDENOM2_R, 0x00000000},
  297. {AUD_PDF_DDS_CNST_BYTE2, 0x06},
  298. {AUD_PDF_DDS_CNST_BYTE1, 0x82},
  299. {AUD_QAM_MODE, 0x05},
  300. { /* end of list */ },
  301. };
  302. static const struct rlist nicam_i[] = {
  303. {AUD_PDF_DDS_CNST_BYTE0, 0x12},
  304. {AUD_PHACC_FREQ_8MSB, 0x3a},
  305. {AUD_PHACC_FREQ_8LSB, 0x93},
  306. { /* end of list */ },
  307. };
  308. static const struct rlist nicam_default[] = {
  309. {AUD_PDF_DDS_CNST_BYTE0, 0x16},
  310. {AUD_PHACC_FREQ_8MSB, 0x34},
  311. {AUD_PHACC_FREQ_8LSB, 0x4c},
  312. { /* end of list */ },
  313. };
  314. set_audio_start(core,SEL_NICAM);
  315. switch (core->tvaudio) {
  316. case WW_L:
  317. dprintk("%s SECAM-L NICAM (status: devel)\n", __func__);
  318. set_audio_registers(core, nicam_l);
  319. break;
  320. case WW_I:
  321. dprintk("%s PAL-I NICAM (status: known-good)\n", __func__);
  322. set_audio_registers(core, nicam_bgdki_common);
  323. set_audio_registers(core, nicam_i);
  324. break;
  325. case WW_NONE:
  326. case WW_BTSC:
  327. case WW_BG:
  328. case WW_DK:
  329. case WW_EIAJ:
  330. case WW_I2SPT:
  331. case WW_FM:
  332. case WW_I2SADC:
  333. case WW_M:
  334. dprintk("%s PAL-BGDK NICAM (status: known-good)\n", __func__);
  335. set_audio_registers(core, nicam_bgdki_common);
  336. set_audio_registers(core, nicam_default);
  337. break;
  338. };
  339. mode |= EN_DMTRX_LR | EN_DMTRX_BYPASS;
  340. set_audio_finish(core, mode);
  341. }
  342. static void set_audio_standard_A2(struct cx88_core *core, u32 mode)
  343. {
  344. static const struct rlist a2_bgdk_common[] = {
  345. {AUD_ERRLOGPERIOD_R, 0x00000064},
  346. {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
  347. {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
  348. {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
  349. {AUD_PDF_DDS_CNST_BYTE2, 0x06},
  350. {AUD_PDF_DDS_CNST_BYTE1, 0x82},
  351. {AUD_PDF_DDS_CNST_BYTE0, 0x12},
  352. {AUD_QAM_MODE, 0x05},
  353. {AUD_PHACC_FREQ_8MSB, 0x34},
  354. {AUD_PHACC_FREQ_8LSB, 0x4c},
  355. {AUD_RATE_ADJ1, 0x00000100},
  356. {AUD_RATE_ADJ2, 0x00000200},
  357. {AUD_RATE_ADJ3, 0x00000300},
  358. {AUD_RATE_ADJ4, 0x00000400},
  359. {AUD_RATE_ADJ5, 0x00000500},
  360. {AUD_THR_FR, 0x00000000},
  361. {AAGC_HYST, 0x0000001a},
  362. {AUD_PILOT_BQD_1_K0, 0x0000755b},
  363. {AUD_PILOT_BQD_1_K1, 0x00551340},
  364. {AUD_PILOT_BQD_1_K2, 0x006d30be},
  365. {AUD_PILOT_BQD_1_K3, 0xffd394af},
  366. {AUD_PILOT_BQD_1_K4, 0x00400000},
  367. {AUD_PILOT_BQD_2_K0, 0x00040000},
  368. {AUD_PILOT_BQD_2_K1, 0x002a4841},
  369. {AUD_PILOT_BQD_2_K2, 0x00400000},
  370. {AUD_PILOT_BQD_2_K3, 0x00000000},
  371. {AUD_PILOT_BQD_2_K4, 0x00000000},
  372. {AUD_MODE_CHG_TIMER, 0x00000040},
  373. {AUD_AFE_12DB_EN, 0x00000001},
  374. {AUD_CORDIC_SHIFT_0, 0x00000007},
  375. {AUD_CORDIC_SHIFT_1, 0x00000007},
  376. {AUD_DEEMPH0_G0, 0x00000380},
  377. {AUD_DEEMPH1_G0, 0x00000380},
  378. {AUD_DCOC_0_SRC, 0x0000001a},
  379. {AUD_DCOC0_SHIFT, 0x00000000},
  380. {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
  381. {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
  382. {AUD_DCOC_PASS_IN, 0x00000003},
  383. {AUD_IIR3_0_SEL, 0x00000021},
  384. {AUD_DN2_AFC, 0x00000002},
  385. {AUD_DCOC_1_SRC, 0x0000001b},
  386. {AUD_DCOC1_SHIFT, 0x00000000},
  387. {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
  388. {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
  389. {AUD_IIR3_1_SEL, 0x00000023},
  390. {AUD_RDSI_SEL, 0x00000017},
  391. {AUD_RDSI_SHIFT, 0x00000000},
  392. {AUD_RDSQ_SEL, 0x00000017},
  393. {AUD_RDSQ_SHIFT, 0x00000000},
  394. {AUD_PLL_INT, 0x0000001e},
  395. {AUD_PLL_DDS, 0x00000000},
  396. {AUD_PLL_FRAC, 0x0000e542},
  397. {AUD_POLYPH80SCALEFAC, 0x00000001},
  398. {AUD_START_TIMER, 0x00000000},
  399. { /* end of list */ },
  400. };
  401. static const struct rlist a2_bg[] = {
  402. {AUD_DMD_RA_DDS, 0x002a4f2f},
  403. {AUD_C1_UP_THR, 0x00007000},
  404. {AUD_C1_LO_THR, 0x00005400},
  405. {AUD_C2_UP_THR, 0x00005400},
  406. {AUD_C2_LO_THR, 0x00003000},
  407. { /* end of list */ },
  408. };
  409. static const struct rlist a2_dk[] = {
  410. {AUD_DMD_RA_DDS, 0x002a4f2f},
  411. {AUD_C1_UP_THR, 0x00007000},
  412. {AUD_C1_LO_THR, 0x00005400},
  413. {AUD_C2_UP_THR, 0x00005400},
  414. {AUD_C2_LO_THR, 0x00003000},
  415. {AUD_DN0_FREQ, 0x00003a1c},
  416. {AUD_DN2_FREQ, 0x0000d2e0},
  417. { /* end of list */ },
  418. };
  419. static const struct rlist a1_i[] = {
  420. {AUD_ERRLOGPERIOD_R, 0x00000064},
  421. {AUD_ERRINTRPTTHSHLD1_R, 0x00000fff},
  422. {AUD_ERRINTRPTTHSHLD2_R, 0x0000001f},
  423. {AUD_ERRINTRPTTHSHLD3_R, 0x0000000f},
  424. {AUD_PDF_DDS_CNST_BYTE2, 0x06},
  425. {AUD_PDF_DDS_CNST_BYTE1, 0x82},
  426. {AUD_PDF_DDS_CNST_BYTE0, 0x12},
  427. {AUD_QAM_MODE, 0x05},
  428. {AUD_PHACC_FREQ_8MSB, 0x3a},
  429. {AUD_PHACC_FREQ_8LSB, 0x93},
  430. {AUD_DMD_RA_DDS, 0x002a4f2f},
  431. {AUD_PLL_INT, 0x0000001e},
  432. {AUD_PLL_DDS, 0x00000004},
  433. {AUD_PLL_FRAC, 0x0000e542},
  434. {AUD_RATE_ADJ1, 0x00000100},
  435. {AUD_RATE_ADJ2, 0x00000200},
  436. {AUD_RATE_ADJ3, 0x00000300},
  437. {AUD_RATE_ADJ4, 0x00000400},
  438. {AUD_RATE_ADJ5, 0x00000500},
  439. {AUD_THR_FR, 0x00000000},
  440. {AUD_PILOT_BQD_1_K0, 0x0000755b},
  441. {AUD_PILOT_BQD_1_K1, 0x00551340},
  442. {AUD_PILOT_BQD_1_K2, 0x006d30be},
  443. {AUD_PILOT_BQD_1_K3, 0xffd394af},
  444. {AUD_PILOT_BQD_1_K4, 0x00400000},
  445. {AUD_PILOT_BQD_2_K0, 0x00040000},
  446. {AUD_PILOT_BQD_2_K1, 0x002a4841},
  447. {AUD_PILOT_BQD_2_K2, 0x00400000},
  448. {AUD_PILOT_BQD_2_K3, 0x00000000},
  449. {AUD_PILOT_BQD_2_K4, 0x00000000},
  450. {AUD_MODE_CHG_TIMER, 0x00000060},
  451. {AUD_AFE_12DB_EN, 0x00000001},
  452. {AAGC_HYST, 0x0000000a},
  453. {AUD_CORDIC_SHIFT_0, 0x00000007},
  454. {AUD_CORDIC_SHIFT_1, 0x00000007},
  455. {AUD_C1_UP_THR, 0x00007000},
  456. {AUD_C1_LO_THR, 0x00005400},
  457. {AUD_C2_UP_THR, 0x00005400},
  458. {AUD_C2_LO_THR, 0x00003000},
  459. {AUD_DCOC_0_SRC, 0x0000001a},
  460. {AUD_DCOC0_SHIFT, 0x00000000},
  461. {AUD_DCOC_0_SHIFT_IN0, 0x0000000a},
  462. {AUD_DCOC_0_SHIFT_IN1, 0x00000008},
  463. {AUD_DCOC_PASS_IN, 0x00000003},
  464. {AUD_IIR3_0_SEL, 0x00000021},
  465. {AUD_DN2_AFC, 0x00000002},
  466. {AUD_DCOC_1_SRC, 0x0000001b},
  467. {AUD_DCOC1_SHIFT, 0x00000000},
  468. {AUD_DCOC_1_SHIFT_IN0, 0x0000000a},
  469. {AUD_DCOC_1_SHIFT_IN1, 0x00000008},
  470. {AUD_IIR3_1_SEL, 0x00000023},
  471. {AUD_DN0_FREQ, 0x000035a3},
  472. {AUD_DN2_FREQ, 0x000029c7},
  473. {AUD_CRDC0_SRC_SEL, 0x00000511},
  474. {AUD_IIR1_0_SEL, 0x00000001},
  475. {AUD_IIR1_1_SEL, 0x00000000},
  476. {AUD_IIR3_2_SEL, 0x00000003},
  477. {AUD_IIR3_2_SHIFT, 0x00000000},
  478. {AUD_IIR3_0_SEL, 0x00000002},
  479. {AUD_IIR2_0_SEL, 0x00000021},
  480. {AUD_IIR2_0_SHIFT, 0x00000002},
  481. {AUD_DEEMPH0_SRC_SEL, 0x0000000b},
  482. {AUD_DEEMPH1_SRC_SEL, 0x0000000b},
  483. {AUD_POLYPH80SCALEFAC, 0x00000001},
  484. {AUD_START_TIMER, 0x00000000},
  485. { /* end of list */ },
  486. };
  487. static const struct rlist am_l[] = {
  488. {AUD_ERRLOGPERIOD_R, 0x00000064},
  489. {AUD_ERRINTRPTTHSHLD1_R, 0x00000FFF},
  490. {AUD_ERRINTRPTTHSHLD2_R, 0x0000001F},
  491. {AUD_ERRINTRPTTHSHLD3_R, 0x0000000F},
  492. {AUD_PDF_DDS_CNST_BYTE2, 0x48},
  493. {AUD_PDF_DDS_CNST_BYTE1, 0x3D},
  494. {AUD_QAM_MODE, 0x00},
  495. {AUD_PDF_DDS_CNST_BYTE0, 0xf5},
  496. {AUD_PHACC_FREQ_8MSB, 0x3a},
  497. {AUD_PHACC_FREQ_8LSB, 0x4a},
  498. {AUD_DEEMPHGAIN_R, 0x00006680},
  499. {AUD_DEEMPHNUMER1_R, 0x000353DE},
  500. {AUD_DEEMPHNUMER2_R, 0x000001B1},
  501. {AUD_DEEMPHDENOM1_R, 0x0000F3D0},
  502. {AUD_DEEMPHDENOM2_R, 0x00000000},
  503. {AUD_FM_MODE_ENABLE, 0x00000007},
  504. {AUD_POLYPH80SCALEFAC, 0x00000003},
  505. {AUD_AFE_12DB_EN, 0x00000001},
  506. {AAGC_GAIN, 0x00000000},
  507. {AAGC_HYST, 0x00000018},
  508. {AAGC_DEF, 0x00000020},
  509. {AUD_DN0_FREQ, 0x00000000},
  510. {AUD_POLY0_DDS_CONSTANT, 0x000E4DB2},
  511. {AUD_DCOC_0_SRC, 0x00000021},
  512. {AUD_IIR1_0_SEL, 0x00000000},
  513. {AUD_IIR1_0_SHIFT, 0x00000007},
  514. {AUD_IIR1_1_SEL, 0x00000002},
  515. {AUD_IIR1_1_SHIFT, 0x00000000},
  516. {AUD_DCOC_1_SRC, 0x00000003},
  517. {AUD_DCOC1_SHIFT, 0x00000000},
  518. {AUD_DCOC_PASS_IN, 0x00000000},
  519. {AUD_IIR1_2_SEL, 0x00000023},
  520. {AUD_IIR1_2_SHIFT, 0x00000000},
  521. {AUD_IIR1_3_SEL, 0x00000004},
  522. {AUD_IIR1_3_SHIFT, 0x00000007},
  523. {AUD_IIR1_4_SEL, 0x00000005},
  524. {AUD_IIR1_4_SHIFT, 0x00000007},
  525. {AUD_IIR3_0_SEL, 0x00000007},
  526. {AUD_IIR3_0_SHIFT, 0x00000000},
  527. {AUD_DEEMPH0_SRC_SEL, 0x00000011},
  528. {AUD_DEEMPH0_SHIFT, 0x00000000},
  529. {AUD_DEEMPH0_G0, 0x00007000},
  530. {AUD_DEEMPH0_A0, 0x00000000},
  531. {AUD_DEEMPH0_B0, 0x00000000},
  532. {AUD_DEEMPH0_A1, 0x00000000},
  533. {AUD_DEEMPH0_B1, 0x00000000},
  534. {AUD_DEEMPH1_SRC_SEL, 0x00000011},
  535. {AUD_DEEMPH1_SHIFT, 0x00000000},
  536. {AUD_DEEMPH1_G0, 0x00007000},
  537. {AUD_DEEMPH1_A0, 0x00000000},
  538. {AUD_DEEMPH1_B0, 0x00000000},
  539. {AUD_DEEMPH1_A1, 0x00000000},
  540. {AUD_DEEMPH1_B1, 0x00000000},
  541. {AUD_OUT0_SEL, 0x0000003F},
  542. {AUD_OUT1_SEL, 0x0000003F},
  543. {AUD_DMD_RA_DDS, 0x00F5C285},
  544. {AUD_PLL_INT, 0x0000001E},
  545. {AUD_PLL_DDS, 0x00000000},
  546. {AUD_PLL_FRAC, 0x0000E542},
  547. {AUD_RATE_ADJ1, 0x00000100},
  548. {AUD_RATE_ADJ2, 0x00000200},
  549. {AUD_RATE_ADJ3, 0x00000300},
  550. {AUD_RATE_ADJ4, 0x00000400},
  551. {AUD_RATE_ADJ5, 0x00000500},
  552. {AUD_RATE_THRES_DMD, 0x000000C0},
  553. { /* end of list */ },
  554. };
  555. static const struct rlist a2_deemph50[] = {
  556. {AUD_DEEMPH0_G0, 0x00000380},
  557. {AUD_DEEMPH1_G0, 0x00000380},
  558. {AUD_DEEMPHGAIN_R, 0x000011e1},
  559. {AUD_DEEMPHNUMER1_R, 0x0002a7bc},
  560. {AUD_DEEMPHNUMER2_R, 0x0003023c},
  561. { /* end of list */ },
  562. };
  563. set_audio_start(core, SEL_A2);
  564. switch (core->tvaudio) {
  565. case WW_BG:
  566. dprintk("%s PAL-BG A1/2 (status: known-good)\n", __func__);
  567. set_audio_registers(core, a2_bgdk_common);
  568. set_audio_registers(core, a2_bg);
  569. set_audio_registers(core, a2_deemph50);
  570. break;
  571. case WW_DK:
  572. dprintk("%s PAL-DK A1/2 (status: known-good)\n", __func__);
  573. set_audio_registers(core, a2_bgdk_common);
  574. set_audio_registers(core, a2_dk);
  575. set_audio_registers(core, a2_deemph50);
  576. break;
  577. case WW_I:
  578. dprintk("%s PAL-I A1 (status: known-good)\n", __func__);
  579. set_audio_registers(core, a1_i);
  580. set_audio_registers(core, a2_deemph50);
  581. break;
  582. case WW_L:
  583. dprintk("%s AM-L (status: devel)\n", __func__);
  584. set_audio_registers(core, am_l);
  585. break;
  586. case WW_NONE:
  587. case WW_BTSC:
  588. case WW_EIAJ:
  589. case WW_I2SPT:
  590. case WW_FM:
  591. case WW_I2SADC:
  592. case WW_M:
  593. dprintk("%s Warning: wrong value\n", __func__);
  594. return;
  595. break;
  596. };
  597. mode |= EN_FMRADIO_EN_RDS | EN_DMTRX_SUMDIFF;
  598. set_audio_finish(core, mode);
  599. }
  600. static void set_audio_standard_EIAJ(struct cx88_core *core)
  601. {
  602. static const struct rlist eiaj[] = {
  603. /* TODO: eiaj register settings are not there yet ... */
  604. { /* end of list */ },
  605. };
  606. dprintk("%s (status: unknown)\n", __func__);
  607. set_audio_start(core, SEL_EIAJ);
  608. set_audio_registers(core, eiaj);
  609. set_audio_finish(core, EN_EIAJ_AUTO_STEREO);
  610. }
  611. static void set_audio_standard_FM(struct cx88_core *core,
  612. enum cx88_deemph_type deemph)
  613. {
  614. static const struct rlist fm_deemph_50[] = {
  615. {AUD_DEEMPH0_G0, 0x0C45},
  616. {AUD_DEEMPH0_A0, 0x6262},
  617. {AUD_DEEMPH0_B0, 0x1C29},
  618. {AUD_DEEMPH0_A1, 0x3FC66},
  619. {AUD_DEEMPH0_B1, 0x399A},
  620. {AUD_DEEMPH1_G0, 0x0D80},
  621. {AUD_DEEMPH1_A0, 0x6262},
  622. {AUD_DEEMPH1_B0, 0x1C29},
  623. {AUD_DEEMPH1_A1, 0x3FC66},
  624. {AUD_DEEMPH1_B1, 0x399A},
  625. {AUD_POLYPH80SCALEFAC, 0x0003},
  626. { /* end of list */ },
  627. };
  628. static const struct rlist fm_deemph_75[] = {
  629. {AUD_DEEMPH0_G0, 0x091B},
  630. {AUD_DEEMPH0_A0, 0x6B68},
  631. {AUD_DEEMPH0_B0, 0x11EC},
  632. {AUD_DEEMPH0_A1, 0x3FC66},
  633. {AUD_DEEMPH0_B1, 0x399A},
  634. {AUD_DEEMPH1_G0, 0x0AA0},
  635. {AUD_DEEMPH1_A0, 0x6B68},
  636. {AUD_DEEMPH1_B0, 0x11EC},
  637. {AUD_DEEMPH1_A1, 0x3FC66},
  638. {AUD_DEEMPH1_B1, 0x399A},
  639. {AUD_POLYPH80SCALEFAC, 0x0003},
  640. { /* end of list */ },
  641. };
  642. /* It is enough to leave default values? */
  643. /* No, it's not! The deemphasis registers are reset to the 75us
  644. * values by default. Analyzing the spectrum of the decoded audio
  645. * reveals that "no deemphasis" is the same as 75 us, while the 50 us
  646. * setting results in less deemphasis. */
  647. static const struct rlist fm_no_deemph[] = {
  648. {AUD_POLYPH80SCALEFAC, 0x0003},
  649. { /* end of list */ },
  650. };
  651. dprintk("%s (status: unknown)\n", __func__);
  652. set_audio_start(core, SEL_FMRADIO);
  653. switch (deemph) {
  654. default:
  655. case FM_NO_DEEMPH:
  656. set_audio_registers(core, fm_no_deemph);
  657. break;
  658. case FM_DEEMPH_50:
  659. set_audio_registers(core, fm_deemph_50);
  660. break;
  661. case FM_DEEMPH_75:
  662. set_audio_registers(core, fm_deemph_75);
  663. break;
  664. }
  665. set_audio_finish(core, EN_FMRADIO_AUTO_STEREO);
  666. }
  667. /* ----------------------------------------------------------- */
  668. static int cx88_detect_nicam(struct cx88_core *core)
  669. {
  670. int i, j = 0;
  671. dprintk("start nicam autodetect.\n");
  672. for (i = 0; i < 6; i++) {
  673. /* if bit1=1 then nicam is detected */
  674. j += ((cx_read(AUD_NICAM_STATUS2) & 0x02) >> 1);
  675. if (j == 1) {
  676. dprintk("nicam is detected.\n");
  677. return 1;
  678. }
  679. /* wait a little bit for next reading status */
  680. msleep(10);
  681. }
  682. dprintk("nicam is not detected.\n");
  683. return 0;
  684. }
  685. void cx88_set_tvaudio(struct cx88_core *core)
  686. {
  687. switch (core->tvaudio) {
  688. case WW_BTSC:
  689. set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
  690. break;
  691. case WW_BG:
  692. case WW_DK:
  693. case WW_M:
  694. case WW_I:
  695. case WW_L:
  696. /* prepare all dsp registers */
  697. set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
  698. /* set nicam mode - otherwise
  699. AUD_NICAM_STATUS2 contains wrong values */
  700. set_audio_standard_NICAM(core, EN_NICAM_AUTO_STEREO);
  701. if (0 == cx88_detect_nicam(core)) {
  702. /* fall back to fm / am mono */
  703. set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
  704. core->audiomode_current = V4L2_TUNER_MODE_MONO;
  705. core->use_nicam = 0;
  706. } else {
  707. core->use_nicam = 1;
  708. }
  709. break;
  710. case WW_EIAJ:
  711. set_audio_standard_EIAJ(core);
  712. break;
  713. case WW_FM:
  714. set_audio_standard_FM(core, radio_deemphasis);
  715. break;
  716. case WW_I2SADC:
  717. set_audio_start(core, 0x01);
  718. /*
  719. * Slave/Philips/Autobaud
  720. * NB on Nova-S bit1 NPhilipsSony appears to be inverted:
  721. * 0= Sony, 1=Philips
  722. */
  723. cx_write(AUD_I2SINPUTCNTL, core->board.i2sinputcntl);
  724. /* Switch to "I2S ADC mode" */
  725. cx_write(AUD_I2SCNTL, 0x1);
  726. set_audio_finish(core, EN_I2SIN_ENABLE);
  727. break;
  728. case WW_NONE:
  729. case WW_I2SPT:
  730. printk("%s/0: unknown tv audio mode [%d]\n",
  731. core->name, core->tvaudio);
  732. break;
  733. }
  734. return;
  735. }
  736. void cx88_newstation(struct cx88_core *core)
  737. {
  738. core->audiomode_manual = UNSET;
  739. core->last_change = jiffies;
  740. }
  741. void cx88_get_stereo(struct cx88_core *core, struct v4l2_tuner *t)
  742. {
  743. static const char * const m[] = { "stereo", "dual mono", "mono", "sap" };
  744. static const char * const p[] = { "no pilot", "pilot c1", "pilot c2", "?" };
  745. u32 reg, mode, pilot;
  746. reg = cx_read(AUD_STATUS);
  747. mode = reg & 0x03;
  748. pilot = (reg >> 2) & 0x03;
  749. if (core->astat != reg)
  750. dprintk("AUD_STATUS: 0x%x [%s/%s] ctl=%s\n",
  751. reg, m[mode], p[pilot],
  752. aud_ctl_names[cx_read(AUD_CTL) & 63]);
  753. core->astat = reg;
  754. t->capability = V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_SAP |
  755. V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
  756. t->rxsubchans = UNSET;
  757. t->audmode = V4L2_TUNER_MODE_MONO;
  758. switch (mode) {
  759. case 0:
  760. t->audmode = V4L2_TUNER_MODE_STEREO;
  761. break;
  762. case 1:
  763. t->audmode = V4L2_TUNER_MODE_LANG2;
  764. break;
  765. case 2:
  766. t->audmode = V4L2_TUNER_MODE_MONO;
  767. break;
  768. case 3:
  769. t->audmode = V4L2_TUNER_MODE_SAP;
  770. break;
  771. }
  772. switch (core->tvaudio) {
  773. case WW_BTSC:
  774. case WW_BG:
  775. case WW_DK:
  776. case WW_M:
  777. case WW_EIAJ:
  778. if (!core->use_nicam) {
  779. t->rxsubchans = cx88_dsp_detect_stereo_sap(core);
  780. break;
  781. }
  782. break;
  783. case WW_NONE:
  784. case WW_I:
  785. case WW_L:
  786. case WW_I2SPT:
  787. case WW_FM:
  788. case WW_I2SADC:
  789. /* nothing */
  790. break;
  791. }
  792. /* If software stereo detection is not supported... */
  793. if (UNSET == t->rxsubchans) {
  794. t->rxsubchans = V4L2_TUNER_SUB_MONO;
  795. /* If the hardware itself detected stereo, also return
  796. stereo as an available subchannel */
  797. if (V4L2_TUNER_MODE_STEREO == t->audmode)
  798. t->rxsubchans |= V4L2_TUNER_SUB_STEREO;
  799. }
  800. return;
  801. }
  802. void cx88_set_stereo(struct cx88_core *core, u32 mode, int manual)
  803. {
  804. u32 ctl = UNSET;
  805. u32 mask = UNSET;
  806. if (manual) {
  807. core->audiomode_manual = mode;
  808. } else {
  809. if (UNSET != core->audiomode_manual)
  810. return;
  811. }
  812. core->audiomode_current = mode;
  813. switch (core->tvaudio) {
  814. case WW_BTSC:
  815. switch (mode) {
  816. case V4L2_TUNER_MODE_MONO:
  817. set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_MONO);
  818. break;
  819. case V4L2_TUNER_MODE_LANG1:
  820. set_audio_standard_BTSC(core, 0, EN_BTSC_AUTO_STEREO);
  821. break;
  822. case V4L2_TUNER_MODE_LANG2:
  823. set_audio_standard_BTSC(core, 1, EN_BTSC_FORCE_SAP);
  824. break;
  825. case V4L2_TUNER_MODE_STEREO:
  826. case V4L2_TUNER_MODE_LANG1_LANG2:
  827. set_audio_standard_BTSC(core, 0, EN_BTSC_FORCE_STEREO);
  828. break;
  829. }
  830. break;
  831. case WW_BG:
  832. case WW_DK:
  833. case WW_M:
  834. case WW_I:
  835. case WW_L:
  836. if (1 == core->use_nicam) {
  837. switch (mode) {
  838. case V4L2_TUNER_MODE_MONO:
  839. case V4L2_TUNER_MODE_LANG1:
  840. set_audio_standard_NICAM(core,
  841. EN_NICAM_FORCE_MONO1);
  842. break;
  843. case V4L2_TUNER_MODE_LANG2:
  844. set_audio_standard_NICAM(core,
  845. EN_NICAM_FORCE_MONO2);
  846. break;
  847. case V4L2_TUNER_MODE_STEREO:
  848. case V4L2_TUNER_MODE_LANG1_LANG2:
  849. set_audio_standard_NICAM(core,
  850. EN_NICAM_FORCE_STEREO);
  851. break;
  852. }
  853. } else {
  854. if ((core->tvaudio == WW_I) || (core->tvaudio == WW_L)) {
  855. /* fall back to fm / am mono */
  856. set_audio_standard_A2(core, EN_A2_FORCE_MONO1);
  857. } else {
  858. /* TODO: Add A2 autodection */
  859. mask = 0x3f;
  860. switch (mode) {
  861. case V4L2_TUNER_MODE_MONO:
  862. case V4L2_TUNER_MODE_LANG1:
  863. ctl = EN_A2_FORCE_MONO1;
  864. break;
  865. case V4L2_TUNER_MODE_LANG2:
  866. ctl = EN_A2_FORCE_MONO2;
  867. break;
  868. case V4L2_TUNER_MODE_STEREO:
  869. case V4L2_TUNER_MODE_LANG1_LANG2:
  870. ctl = EN_A2_FORCE_STEREO;
  871. break;
  872. }
  873. }
  874. }
  875. break;
  876. case WW_FM:
  877. switch (mode) {
  878. case V4L2_TUNER_MODE_MONO:
  879. ctl = EN_FMRADIO_FORCE_MONO;
  880. mask = 0x3f;
  881. break;
  882. case V4L2_TUNER_MODE_STEREO:
  883. ctl = EN_FMRADIO_AUTO_STEREO;
  884. mask = 0x3f;
  885. break;
  886. }
  887. break;
  888. case WW_I2SADC:
  889. case WW_NONE:
  890. case WW_EIAJ:
  891. case WW_I2SPT:
  892. /* DO NOTHING */
  893. break;
  894. }
  895. if (UNSET != ctl) {
  896. dprintk("cx88_set_stereo: mask 0x%x, ctl 0x%x "
  897. "[status=0x%x,ctl=0x%x,vol=0x%x]\n",
  898. mask, ctl, cx_read(AUD_STATUS),
  899. cx_read(AUD_CTL), cx_sread(SHADOW_AUD_VOL_CTL));
  900. cx_andor(AUD_CTL, mask, ctl);
  901. }
  902. return;
  903. }
  904. int cx88_audio_thread(void *data)
  905. {
  906. struct cx88_core *core = data;
  907. struct v4l2_tuner t;
  908. u32 mode = 0;
  909. dprintk("cx88: tvaudio thread started\n");
  910. set_freezable();
  911. for (;;) {
  912. msleep_interruptible(1000);
  913. if (kthread_should_stop())
  914. break;
  915. try_to_freeze();
  916. switch (core->tvaudio) {
  917. case WW_BG:
  918. case WW_DK:
  919. case WW_M:
  920. case WW_I:
  921. case WW_L:
  922. if (core->use_nicam)
  923. goto hw_autodetect;
  924. /* just monitor the audio status for now ... */
  925. memset(&t, 0, sizeof(t));
  926. cx88_get_stereo(core, &t);
  927. if (UNSET != core->audiomode_manual)
  928. /* manually set, don't do anything. */
  929. continue;
  930. /* monitor signal and set stereo if available */
  931. if (t.rxsubchans & V4L2_TUNER_SUB_STEREO)
  932. mode = V4L2_TUNER_MODE_STEREO;
  933. else
  934. mode = V4L2_TUNER_MODE_MONO;
  935. if (mode == core->audiomode_current)
  936. continue;
  937. /* automatically switch to best available mode */
  938. cx88_set_stereo(core, mode, 0);
  939. break;
  940. case WW_NONE:
  941. case WW_BTSC:
  942. case WW_EIAJ:
  943. case WW_I2SPT:
  944. case WW_FM:
  945. case WW_I2SADC:
  946. hw_autodetect:
  947. /* stereo autodetection is supported by hardware so
  948. we don't need to do it manually. Do nothing. */
  949. break;
  950. }
  951. }
  952. dprintk("cx88: tvaudio thread exiting\n");
  953. return 0;
  954. }
  955. /* ----------------------------------------------------------- */
  956. EXPORT_SYMBOL(cx88_set_tvaudio);
  957. EXPORT_SYMBOL(cx88_newstation);
  958. EXPORT_SYMBOL(cx88_set_stereo);
  959. EXPORT_SYMBOL(cx88_get_stereo);
  960. EXPORT_SYMBOL(cx88_audio_thread);
  961. /*
  962. * Local variables:
  963. * c-basic-offset: 8
  964. * End:
  965. * kate: eol "unix"; indent-width 3; remove-trailing-space on; replace-trailing-space-save on; tab-width 8; replace-tabs off; space-indent off; mixed-indent off
  966. */