/drivers/staging/brcm80211/include/aidmp.h

https://bitbucket.org/wisechild/galaxy-nexus · C++ Header · 374 lines · 319 code · 24 blank · 31 comment · 1 complexity · b2ced5b8cdae90373604af2abd694d8d MD5 · raw file

  1. /*
  2. * Copyright (c) 2010 Broadcom Corporation
  3. *
  4. * Permission to use, copy, modify, and/or distribute this software for any
  5. * purpose with or without fee is hereby granted, provided that the above
  6. * copyright notice and this permission notice appear in all copies.
  7. *
  8. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  9. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  10. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
  11. * SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  12. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION
  13. * OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN
  14. * CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  15. */
  16. #ifndef _AIDMP_H
  17. #define _AIDMP_H
  18. /* Manufacturer Ids */
  19. #define MFGID_ARM 0x43b
  20. #define MFGID_BRCM 0x4bf
  21. #define MFGID_MIPS 0x4a7
  22. /* Component Classes */
  23. #define CC_SIM 0
  24. #define CC_EROM 1
  25. #define CC_CORESIGHT 9
  26. #define CC_VERIF 0xb
  27. #define CC_OPTIMO 0xd
  28. #define CC_GEN 0xe
  29. #define CC_PRIMECELL 0xf
  30. /* Enumeration ROM registers */
  31. #define ER_EROMENTRY 0x000
  32. #define ER_REMAPCONTROL 0xe00
  33. #define ER_REMAPSELECT 0xe04
  34. #define ER_MASTERSELECT 0xe10
  35. #define ER_ITCR 0xf00
  36. #define ER_ITIP 0xf04
  37. /* Erom entries */
  38. #define ER_TAG 0xe
  39. #define ER_TAG1 0x6
  40. #define ER_VALID 1
  41. #define ER_CI 0
  42. #define ER_MP 2
  43. #define ER_ADD 4
  44. #define ER_END 0xe
  45. #define ER_BAD 0xffffffff
  46. /* EROM CompIdentA */
  47. #define CIA_MFG_MASK 0xfff00000
  48. #define CIA_MFG_SHIFT 20
  49. #define CIA_CID_MASK 0x000fff00
  50. #define CIA_CID_SHIFT 8
  51. #define CIA_CCL_MASK 0x000000f0
  52. #define CIA_CCL_SHIFT 4
  53. /* EROM CompIdentB */
  54. #define CIB_REV_MASK 0xff000000
  55. #define CIB_REV_SHIFT 24
  56. #define CIB_NSW_MASK 0x00f80000
  57. #define CIB_NSW_SHIFT 19
  58. #define CIB_NMW_MASK 0x0007c000
  59. #define CIB_NMW_SHIFT 14
  60. #define CIB_NSP_MASK 0x00003e00
  61. #define CIB_NSP_SHIFT 9
  62. #define CIB_NMP_MASK 0x000001f0
  63. #define CIB_NMP_SHIFT 4
  64. /* EROM MasterPortDesc */
  65. #define MPD_MUI_MASK 0x0000ff00
  66. #define MPD_MUI_SHIFT 8
  67. #define MPD_MP_MASK 0x000000f0
  68. #define MPD_MP_SHIFT 4
  69. /* EROM AddrDesc */
  70. #define AD_ADDR_MASK 0xfffff000
  71. #define AD_SP_MASK 0x00000f00
  72. #define AD_SP_SHIFT 8
  73. #define AD_ST_MASK 0x000000c0
  74. #define AD_ST_SHIFT 6
  75. #define AD_ST_SLAVE 0x00000000
  76. #define AD_ST_BRIDGE 0x00000040
  77. #define AD_ST_SWRAP 0x00000080
  78. #define AD_ST_MWRAP 0x000000c0
  79. #define AD_SZ_MASK 0x00000030
  80. #define AD_SZ_SHIFT 4
  81. #define AD_SZ_4K 0x00000000
  82. #define AD_SZ_8K 0x00000010
  83. #define AD_SZ_16K 0x00000020
  84. #define AD_SZ_SZD 0x00000030
  85. #define AD_AG32 0x00000008
  86. #define AD_ADDR_ALIGN 0x00000fff
  87. #define AD_SZ_BASE 0x00001000 /* 4KB */
  88. /* EROM SizeDesc */
  89. #define SD_SZ_MASK 0xfffff000
  90. #define SD_SG32 0x00000008
  91. #define SD_SZ_ALIGN 0x00000fff
  92. #ifndef _LANGUAGE_ASSEMBLY
  93. typedef volatile struct _aidmp {
  94. u32 oobselina30; /* 0x000 */
  95. u32 oobselina74; /* 0x004 */
  96. u32 PAD[6];
  97. u32 oobselinb30; /* 0x020 */
  98. u32 oobselinb74; /* 0x024 */
  99. u32 PAD[6];
  100. u32 oobselinc30; /* 0x040 */
  101. u32 oobselinc74; /* 0x044 */
  102. u32 PAD[6];
  103. u32 oobselind30; /* 0x060 */
  104. u32 oobselind74; /* 0x064 */
  105. u32 PAD[38];
  106. u32 oobselouta30; /* 0x100 */
  107. u32 oobselouta74; /* 0x104 */
  108. u32 PAD[6];
  109. u32 oobseloutb30; /* 0x120 */
  110. u32 oobseloutb74; /* 0x124 */
  111. u32 PAD[6];
  112. u32 oobseloutc30; /* 0x140 */
  113. u32 oobseloutc74; /* 0x144 */
  114. u32 PAD[6];
  115. u32 oobseloutd30; /* 0x160 */
  116. u32 oobseloutd74; /* 0x164 */
  117. u32 PAD[38];
  118. u32 oobsynca; /* 0x200 */
  119. u32 oobseloutaen; /* 0x204 */
  120. u32 PAD[6];
  121. u32 oobsyncb; /* 0x220 */
  122. u32 oobseloutben; /* 0x224 */
  123. u32 PAD[6];
  124. u32 oobsyncc; /* 0x240 */
  125. u32 oobseloutcen; /* 0x244 */
  126. u32 PAD[6];
  127. u32 oobsyncd; /* 0x260 */
  128. u32 oobseloutden; /* 0x264 */
  129. u32 PAD[38];
  130. u32 oobaextwidth; /* 0x300 */
  131. u32 oobainwidth; /* 0x304 */
  132. u32 oobaoutwidth; /* 0x308 */
  133. u32 PAD[5];
  134. u32 oobbextwidth; /* 0x320 */
  135. u32 oobbinwidth; /* 0x324 */
  136. u32 oobboutwidth; /* 0x328 */
  137. u32 PAD[5];
  138. u32 oobcextwidth; /* 0x340 */
  139. u32 oobcinwidth; /* 0x344 */
  140. u32 oobcoutwidth; /* 0x348 */
  141. u32 PAD[5];
  142. u32 oobdextwidth; /* 0x360 */
  143. u32 oobdinwidth; /* 0x364 */
  144. u32 oobdoutwidth; /* 0x368 */
  145. u32 PAD[37];
  146. u32 ioctrlset; /* 0x400 */
  147. u32 ioctrlclear; /* 0x404 */
  148. u32 ioctrl; /* 0x408 */
  149. u32 PAD[61];
  150. u32 iostatus; /* 0x500 */
  151. u32 PAD[127];
  152. u32 ioctrlwidth; /* 0x700 */
  153. u32 iostatuswidth; /* 0x704 */
  154. u32 PAD[62];
  155. u32 resetctrl; /* 0x800 */
  156. u32 resetstatus; /* 0x804 */
  157. u32 resetreadid; /* 0x808 */
  158. u32 resetwriteid; /* 0x80c */
  159. u32 PAD[60];
  160. u32 errlogctrl; /* 0x900 */
  161. u32 errlogdone; /* 0x904 */
  162. u32 errlogstatus; /* 0x908 */
  163. u32 errlogaddrlo; /* 0x90c */
  164. u32 errlogaddrhi; /* 0x910 */
  165. u32 errlogid; /* 0x914 */
  166. u32 errloguser; /* 0x918 */
  167. u32 errlogflags; /* 0x91c */
  168. u32 PAD[56];
  169. u32 intstatus; /* 0xa00 */
  170. u32 PAD[127];
  171. u32 config; /* 0xe00 */
  172. u32 PAD[63];
  173. u32 itcr; /* 0xf00 */
  174. u32 PAD[3];
  175. u32 itipooba; /* 0xf10 */
  176. u32 itipoobb; /* 0xf14 */
  177. u32 itipoobc; /* 0xf18 */
  178. u32 itipoobd; /* 0xf1c */
  179. u32 PAD[4];
  180. u32 itipoobaout; /* 0xf30 */
  181. u32 itipoobbout; /* 0xf34 */
  182. u32 itipoobcout; /* 0xf38 */
  183. u32 itipoobdout; /* 0xf3c */
  184. u32 PAD[4];
  185. u32 itopooba; /* 0xf50 */
  186. u32 itopoobb; /* 0xf54 */
  187. u32 itopoobc; /* 0xf58 */
  188. u32 itopoobd; /* 0xf5c */
  189. u32 PAD[4];
  190. u32 itopoobain; /* 0xf70 */
  191. u32 itopoobbin; /* 0xf74 */
  192. u32 itopoobcin; /* 0xf78 */
  193. u32 itopoobdin; /* 0xf7c */
  194. u32 PAD[4];
  195. u32 itopreset; /* 0xf90 */
  196. u32 PAD[15];
  197. u32 peripherialid4; /* 0xfd0 */
  198. u32 peripherialid5; /* 0xfd4 */
  199. u32 peripherialid6; /* 0xfd8 */
  200. u32 peripherialid7; /* 0xfdc */
  201. u32 peripherialid0; /* 0xfe0 */
  202. u32 peripherialid1; /* 0xfe4 */
  203. u32 peripherialid2; /* 0xfe8 */
  204. u32 peripherialid3; /* 0xfec */
  205. u32 componentid0; /* 0xff0 */
  206. u32 componentid1; /* 0xff4 */
  207. u32 componentid2; /* 0xff8 */
  208. u32 componentid3; /* 0xffc */
  209. } aidmp_t;
  210. #endif /* _LANGUAGE_ASSEMBLY */
  211. /* Out-of-band Router registers */
  212. #define OOB_BUSCONFIG 0x020
  213. #define OOB_STATUSA 0x100
  214. #define OOB_STATUSB 0x104
  215. #define OOB_STATUSC 0x108
  216. #define OOB_STATUSD 0x10c
  217. #define OOB_ENABLEA0 0x200
  218. #define OOB_ENABLEA1 0x204
  219. #define OOB_ENABLEA2 0x208
  220. #define OOB_ENABLEA3 0x20c
  221. #define OOB_ENABLEB0 0x280
  222. #define OOB_ENABLEB1 0x284
  223. #define OOB_ENABLEB2 0x288
  224. #define OOB_ENABLEB3 0x28c
  225. #define OOB_ENABLEC0 0x300
  226. #define OOB_ENABLEC1 0x304
  227. #define OOB_ENABLEC2 0x308
  228. #define OOB_ENABLEC3 0x30c
  229. #define OOB_ENABLED0 0x380
  230. #define OOB_ENABLED1 0x384
  231. #define OOB_ENABLED2 0x388
  232. #define OOB_ENABLED3 0x38c
  233. #define OOB_ITCR 0xf00
  234. #define OOB_ITIPOOBA 0xf10
  235. #define OOB_ITIPOOBB 0xf14
  236. #define OOB_ITIPOOBC 0xf18
  237. #define OOB_ITIPOOBD 0xf1c
  238. #define OOB_ITOPOOBA 0xf30
  239. #define OOB_ITOPOOBB 0xf34
  240. #define OOB_ITOPOOBC 0xf38
  241. #define OOB_ITOPOOBD 0xf3c
  242. /* DMP wrapper registers */
  243. #define AI_OOBSELINA30 0x000
  244. #define AI_OOBSELINA74 0x004
  245. #define AI_OOBSELINB30 0x020
  246. #define AI_OOBSELINB74 0x024
  247. #define AI_OOBSELINC30 0x040
  248. #define AI_OOBSELINC74 0x044
  249. #define AI_OOBSELIND30 0x060
  250. #define AI_OOBSELIND74 0x064
  251. #define AI_OOBSELOUTA30 0x100
  252. #define AI_OOBSELOUTA74 0x104
  253. #define AI_OOBSELOUTB30 0x120
  254. #define AI_OOBSELOUTB74 0x124
  255. #define AI_OOBSELOUTC30 0x140
  256. #define AI_OOBSELOUTC74 0x144
  257. #define AI_OOBSELOUTD30 0x160
  258. #define AI_OOBSELOUTD74 0x164
  259. #define AI_OOBSYNCA 0x200
  260. #define AI_OOBSELOUTAEN 0x204
  261. #define AI_OOBSYNCB 0x220
  262. #define AI_OOBSELOUTBEN 0x224
  263. #define AI_OOBSYNCC 0x240
  264. #define AI_OOBSELOUTCEN 0x244
  265. #define AI_OOBSYNCD 0x260
  266. #define AI_OOBSELOUTDEN 0x264
  267. #define AI_OOBAEXTWIDTH 0x300
  268. #define AI_OOBAINWIDTH 0x304
  269. #define AI_OOBAOUTWIDTH 0x308
  270. #define AI_OOBBEXTWIDTH 0x320
  271. #define AI_OOBBINWIDTH 0x324
  272. #define AI_OOBBOUTWIDTH 0x328
  273. #define AI_OOBCEXTWIDTH 0x340
  274. #define AI_OOBCINWIDTH 0x344
  275. #define AI_OOBCOUTWIDTH 0x348
  276. #define AI_OOBDEXTWIDTH 0x360
  277. #define AI_OOBDINWIDTH 0x364
  278. #define AI_OOBDOUTWIDTH 0x368
  279. #if defined(__BIG_ENDIAN) && defined(BCMHND74K)
  280. /* Selective swapped defines for those registers we need in
  281. * big-endian code.
  282. */
  283. #define AI_IOCTRLSET 0x404
  284. #define AI_IOCTRLCLEAR 0x400
  285. #define AI_IOCTRL 0x40c
  286. #define AI_IOSTATUS 0x504
  287. #define AI_RESETCTRL 0x804
  288. #define AI_RESETSTATUS 0x800
  289. #else /* !__BIG_ENDIAN || !BCMHND74K */
  290. #define AI_IOCTRLSET 0x400
  291. #define AI_IOCTRLCLEAR 0x404
  292. #define AI_IOCTRL 0x408
  293. #define AI_IOSTATUS 0x500
  294. #define AI_RESETCTRL 0x800
  295. #define AI_RESETSTATUS 0x804
  296. #endif /* __BIG_ENDIAN && BCMHND74K */
  297. #define AI_IOCTRLWIDTH 0x700
  298. #define AI_IOSTATUSWIDTH 0x704
  299. #define AI_RESETREADID 0x808
  300. #define AI_RESETWRITEID 0x80c
  301. #define AI_ERRLOGCTRL 0xa00
  302. #define AI_ERRLOGDONE 0xa04
  303. #define AI_ERRLOGSTATUS 0xa08
  304. #define AI_ERRLOGADDRLO 0xa0c
  305. #define AI_ERRLOGADDRHI 0xa10
  306. #define AI_ERRLOGID 0xa14
  307. #define AI_ERRLOGUSER 0xa18
  308. #define AI_ERRLOGFLAGS 0xa1c
  309. #define AI_INTSTATUS 0xa00
  310. #define AI_CONFIG 0xe00
  311. #define AI_ITCR 0xf00
  312. #define AI_ITIPOOBA 0xf10
  313. #define AI_ITIPOOBB 0xf14
  314. #define AI_ITIPOOBC 0xf18
  315. #define AI_ITIPOOBD 0xf1c
  316. #define AI_ITIPOOBAOUT 0xf30
  317. #define AI_ITIPOOBBOUT 0xf34
  318. #define AI_ITIPOOBCOUT 0xf38
  319. #define AI_ITIPOOBDOUT 0xf3c
  320. #define AI_ITOPOOBA 0xf50
  321. #define AI_ITOPOOBB 0xf54
  322. #define AI_ITOPOOBC 0xf58
  323. #define AI_ITOPOOBD 0xf5c
  324. #define AI_ITOPOOBAIN 0xf70
  325. #define AI_ITOPOOBBIN 0xf74
  326. #define AI_ITOPOOBCIN 0xf78
  327. #define AI_ITOPOOBDIN 0xf7c
  328. #define AI_ITOPRESET 0xf90
  329. #define AI_PERIPHERIALID4 0xfd0
  330. #define AI_PERIPHERIALID5 0xfd4
  331. #define AI_PERIPHERIALID6 0xfd8
  332. #define AI_PERIPHERIALID7 0xfdc
  333. #define AI_PERIPHERIALID0 0xfe0
  334. #define AI_PERIPHERIALID1 0xfe4
  335. #define AI_PERIPHERIALID2 0xfe8
  336. #define AI_PERIPHERIALID3 0xfec
  337. #define AI_COMPONENTID0 0xff0
  338. #define AI_COMPONENTID1 0xff4
  339. #define AI_COMPONENTID2 0xff8
  340. #define AI_COMPONENTID3 0xffc
  341. /* resetctrl */
  342. #define AIRC_RESET 1
  343. /* config */
  344. #define AICFG_OOB 0x00000020
  345. #define AICFG_IOS 0x00000010
  346. #define AICFG_IOC 0x00000008
  347. #define AICFG_TO 0x00000004
  348. #define AICFG_ERRL 0x00000002
  349. #define AICFG_RST 0x00000001
  350. #endif /* _AIDMP_H */