/drivers/staging/comedi/drivers/amplc_dio200.c

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  1. /*
  2. comedi/drivers/amplc_dio200.c
  3. Driver for Amplicon PC272E and PCI272 DIO boards.
  4. (Support for other boards in Amplicon 200 series may be added at
  5. a later date, e.g. PCI215.)
  6. Copyright (C) 2005 MEV Ltd. <http://www.mev.co.uk/>
  7. COMEDI - Linux Control and Measurement Device Interface
  8. Copyright (C) 1998,2000 David A. Schleef <ds@schleef.org>
  9. This program is free software; you can redistribute it and/or modify
  10. it under the terms of the GNU General Public License as published by
  11. the Free Software Foundation; either version 2 of the License, or
  12. (at your option) any later version.
  13. This program is distributed in the hope that it will be useful,
  14. but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. GNU General Public License for more details.
  17. You should have received a copy of the GNU General Public License
  18. along with this program; if not, write to the Free Software
  19. Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  20. */
  21. /*
  22. Driver: amplc_dio200
  23. Description: Amplicon 200 Series Digital I/O
  24. Author: Ian Abbott <abbotti@mev.co.uk>
  25. Devices: [Amplicon] PC212E (pc212e), PC214E (pc214e), PC215E (pc215e),
  26. PCI215 (pci215 or amplc_dio200), PC218E (pc218e), PC272E (pc272e),
  27. PCI272 (pci272 or amplc_dio200)
  28. Updated: Wed, 22 Oct 2008 13:36:02 +0100
  29. Status: works
  30. Configuration options - PC212E, PC214E, PC215E, PC218E, PC272E:
  31. [0] - I/O port base address
  32. [1] - IRQ (optional, but commands won't work without it)
  33. Configuration options - PCI215, PCI272:
  34. [0] - PCI bus of device (optional)
  35. [1] - PCI slot of device (optional)
  36. If bus/slot is not specified, the first available PCI device will
  37. be used.
  38. Passing a zero for an option is the same as leaving it unspecified.
  39. SUBDEVICES
  40. PC218E PC212E PC215E/PCI215
  41. ------------- ------------- -------------
  42. Subdevices 7 6 5
  43. 0 CTR-X1 PPI-X PPI-X
  44. 1 CTR-X2 CTR-Y1 PPI-Y
  45. 2 CTR-Y1 CTR-Y2 CTR-Z1
  46. 3 CTR-Y2 CTR-Z1 CTR-Z2
  47. 4 CTR-Z1 CTR-Z2 INTERRUPT
  48. 5 CTR-Z2 INTERRUPT
  49. 6 INTERRUPT
  50. PC214E PC272E/PCI272
  51. ------------- -------------
  52. Subdevices 4 4
  53. 0 PPI-X PPI-X
  54. 1 PPI-Y PPI-Y
  55. 2 CTR-Z1* PPI-Z
  56. 3 INTERRUPT* INTERRUPT
  57. Each PPI is a 8255 chip providing 24 DIO channels. The DIO channels
  58. are configurable as inputs or outputs in four groups:
  59. Port A - channels 0 to 7
  60. Port B - channels 8 to 15
  61. Port CL - channels 16 to 19
  62. Port CH - channels 20 to 23
  63. Only mode 0 of the 8255 chips is supported.
  64. Each CTR is a 8254 chip providing 3 16-bit counter channels. Each
  65. channel is configured individually with INSN_CONFIG instructions. The
  66. specific type of configuration instruction is specified in data[0].
  67. Some configuration instructions expect an additional parameter in
  68. data[1]; others return a value in data[1]. The following configuration
  69. instructions are supported:
  70. INSN_CONFIG_SET_COUNTER_MODE. Sets the counter channel's mode and
  71. BCD/binary setting specified in data[1].
  72. INSN_CONFIG_8254_READ_STATUS. Reads the status register value for the
  73. counter channel into data[1].
  74. INSN_CONFIG_SET_CLOCK_SRC. Sets the counter channel's clock source as
  75. specified in data[1] (this is a hardware-specific value). Not
  76. supported on PC214E. For the other boards, valid clock sources are
  77. 0 to 7 as follows:
  78. 0. CLK n, the counter channel's dedicated CLK input from the SK1
  79. connector. (N.B. for other values, the counter channel's CLKn
  80. pin on the SK1 connector is an output!)
  81. 1. Internal 10 MHz clock.
  82. 2. Internal 1 MHz clock.
  83. 3. Internal 100 kHz clock.
  84. 4. Internal 10 kHz clock.
  85. 5. Internal 1 kHz clock.
  86. 6. OUT n-1, the output of counter channel n-1 (see note 1 below).
  87. 7. Ext Clock, the counter chip's dedicated Ext Clock input from
  88. the SK1 connector. This pin is shared by all three counter
  89. channels on the chip.
  90. INSN_CONFIG_GET_CLOCK_SRC. Returns the counter channel's current
  91. clock source in data[1]. For internal clock sources, data[2] is set
  92. to the period in ns.
  93. INSN_CONFIG_SET_GATE_SRC. Sets the counter channel's gate source as
  94. specified in data[2] (this is a hardware-specific value). Not
  95. supported on PC214E. For the other boards, valid gate sources are 0
  96. to 7 as follows:
  97. 0. VCC (internal +5V d.c.), i.e. gate permanently enabled.
  98. 1. GND (internal 0V d.c.), i.e. gate permanently disabled.
  99. 2. GAT n, the counter channel's dedicated GAT input from the SK1
  100. connector. (N.B. for other values, the counter channel's GATn
  101. pin on the SK1 connector is an output!)
  102. 3. /OUT n-2, the inverted output of counter channel n-2 (see note
  103. 2 below).
  104. 4. Reserved.
  105. 5. Reserved.
  106. 6. Reserved.
  107. 7. Reserved.
  108. INSN_CONFIG_GET_GATE_SRC. Returns the counter channel's current gate
  109. source in data[2].
  110. Clock and gate interconnection notes:
  111. 1. Clock source OUT n-1 is the output of the preceding channel on the
  112. same counter subdevice if n > 0, or the output of channel 2 on the
  113. preceding counter subdevice (see note 3) if n = 0.
  114. 2. Gate source /OUT n-2 is the inverted output of channel 0 on the
  115. same counter subdevice if n = 2, or the inverted output of channel n+1
  116. on the preceding counter subdevice (see note 3) if n < 2.
  117. 3. The counter subdevices are connected in a ring, so the highest
  118. counter subdevice precedes the lowest.
  119. The 'INTERRUPT' subdevice pretends to be a digital input subdevice. The
  120. digital inputs come from the interrupt status register. The number of
  121. channels matches the number of interrupt sources. The PC214E does not
  122. have an interrupt status register; see notes on 'INTERRUPT SOURCES'
  123. below.
  124. INTERRUPT SOURCES
  125. PC218E PC212E PC215E/PCI215
  126. ------------- ------------- -------------
  127. Sources 6 6 6
  128. 0 CTR-X1-OUT PPI-X-C0 PPI-X-C0
  129. 1 CTR-X2-OUT PPI-X-C3 PPI-X-C3
  130. 2 CTR-Y1-OUT CTR-Y1-OUT PPI-Y-C0
  131. 3 CTR-Y2-OUT CTR-Y2-OUT PPI-Y-C3
  132. 4 CTR-Z1-OUT CTR-Z1-OUT CTR-Z1-OUT
  133. 5 CTR-Z2-OUT CTR-Z2-OUT CTR-Z2-OUT
  134. PC214E PC272E/PCI272
  135. ------------- -------------
  136. Sources 1 6
  137. 0 JUMPER-J5 PPI-X-C0
  138. 1 PPI-X-C3
  139. 2 PPI-Y-C0
  140. 3 PPI-Y-C3
  141. 4 PPI-Z-C0
  142. 5 PPI-Z-C3
  143. When an interrupt source is enabled in the interrupt source enable
  144. register, a rising edge on the source signal latches the corresponding
  145. bit to 1 in the interrupt status register.
  146. When the interrupt status register value as a whole (actually, just the
  147. 6 least significant bits) goes from zero to non-zero, the board will
  148. generate an interrupt. For level-triggered hardware interrupts (PCI
  149. card), the interrupt will remain asserted until the interrupt status
  150. register is cleared to zero. For edge-triggered hardware interrupts
  151. (ISA card), no further interrupts will occur until the interrupt status
  152. register is cleared to zero. To clear a bit to zero in the interrupt
  153. status register, the corresponding interrupt source must be disabled
  154. in the interrupt source enable register (there is no separate interrupt
  155. clear register).
  156. The PC214E does not have an interrupt source enable register or an
  157. interrupt status register; its 'INTERRUPT' subdevice has a single
  158. channel and its interrupt source is selected by the position of jumper
  159. J5.
  160. COMMANDS
  161. The driver supports a read streaming acquisition command on the
  162. 'INTERRUPT' subdevice. The channel list selects the interrupt sources
  163. to be enabled. All channels will be sampled together (convert_src ==
  164. TRIG_NOW). The scan begins a short time after the hardware interrupt
  165. occurs, subject to interrupt latencies (scan_begin_src == TRIG_EXT,
  166. scan_begin_arg == 0). The value read from the interrupt status register
  167. is packed into a short value, one bit per requested channel, in the
  168. order they appear in the channel list.
  169. */
  170. #include <linux/interrupt.h>
  171. #include <linux/slab.h>
  172. #include "../comedidev.h"
  173. #include "comedi_pci.h"
  174. #include "8255.h"
  175. #include "8253.h"
  176. #define DIO200_DRIVER_NAME "amplc_dio200"
  177. /* PCI IDs */
  178. #define PCI_VENDOR_ID_AMPLICON 0x14dc
  179. #define PCI_DEVICE_ID_AMPLICON_PCI272 0x000a
  180. #define PCI_DEVICE_ID_AMPLICON_PCI215 0x000b
  181. #define PCI_DEVICE_ID_INVALID 0xffff
  182. /* 200 series registers */
  183. #define DIO200_IO_SIZE 0x20
  184. #define DIO200_XCLK_SCE 0x18 /* Group X clock selection register */
  185. #define DIO200_YCLK_SCE 0x19 /* Group Y clock selection register */
  186. #define DIO200_ZCLK_SCE 0x1a /* Group Z clock selection register */
  187. #define DIO200_XGAT_SCE 0x1b /* Group X gate selection register */
  188. #define DIO200_YGAT_SCE 0x1c /* Group Y gate selection register */
  189. #define DIO200_ZGAT_SCE 0x1d /* Group Z gate selection register */
  190. #define DIO200_INT_SCE 0x1e /* Interrupt enable/status register */
  191. /*
  192. * Macros for constructing value for DIO_200_?CLK_SCE and
  193. * DIO_200_?GAT_SCE registers:
  194. *
  195. * 'which' is: 0 for CTR-X1, CTR-Y1, CTR-Z1; 1 for CTR-X2, CTR-Y2 or CTR-Z2.
  196. * 'chan' is the channel: 0, 1 or 2.
  197. * 'source' is the signal source: 0 to 7.
  198. */
  199. #define CLK_SCE(which, chan, source) (((which) << 5) | ((chan) << 3) | (source))
  200. #define GAT_SCE(which, chan, source) (((which) << 5) | ((chan) << 3) | (source))
  201. /*
  202. * Periods of the internal clock sources in nanoseconds.
  203. */
  204. static const unsigned clock_period[8] = {
  205. 0, /* dedicated clock input/output pin */
  206. 100, /* 10 MHz */
  207. 1000, /* 1 MHz */
  208. 10000, /* 100 kHz */
  209. 100000, /* 10 kHz */
  210. 1000000, /* 1 kHz */
  211. 0, /* OUT N-1 */
  212. 0 /* group clock input pin */
  213. };
  214. /*
  215. * Board descriptions.
  216. */
  217. enum dio200_bustype { isa_bustype, pci_bustype };
  218. enum dio200_model {
  219. pc212e_model,
  220. pc214e_model,
  221. pc215e_model, pci215_model,
  222. pc218e_model,
  223. pc272e_model, pci272_model,
  224. anypci_model
  225. };
  226. enum dio200_layout {
  227. pc212_layout,
  228. pc214_layout,
  229. pc215_layout,
  230. pc218_layout,
  231. pc272_layout
  232. };
  233. struct dio200_board {
  234. const char *name;
  235. unsigned short devid;
  236. enum dio200_bustype bustype;
  237. enum dio200_model model;
  238. enum dio200_layout layout;
  239. };
  240. static const struct dio200_board dio200_boards[] = {
  241. {
  242. .name = "pc212e",
  243. .bustype = isa_bustype,
  244. .model = pc212e_model,
  245. .layout = pc212_layout,
  246. },
  247. {
  248. .name = "pc214e",
  249. .bustype = isa_bustype,
  250. .model = pc214e_model,
  251. .layout = pc214_layout,
  252. },
  253. {
  254. .name = "pc215e",
  255. .bustype = isa_bustype,
  256. .model = pc215e_model,
  257. .layout = pc215_layout,
  258. },
  259. #ifdef CONFIG_COMEDI_PCI
  260. {
  261. .name = "pci215",
  262. .devid = PCI_DEVICE_ID_AMPLICON_PCI215,
  263. .bustype = pci_bustype,
  264. .model = pci215_model,
  265. .layout = pc215_layout,
  266. },
  267. #endif
  268. {
  269. .name = "pc218e",
  270. .bustype = isa_bustype,
  271. .model = pc218e_model,
  272. .layout = pc218_layout,
  273. },
  274. {
  275. .name = "pc272e",
  276. .bustype = isa_bustype,
  277. .model = pc272e_model,
  278. .layout = pc272_layout,
  279. },
  280. #ifdef CONFIG_COMEDI_PCI
  281. {
  282. .name = "pci272",
  283. .devid = PCI_DEVICE_ID_AMPLICON_PCI272,
  284. .bustype = pci_bustype,
  285. .model = pci272_model,
  286. .layout = pc272_layout,
  287. },
  288. #endif
  289. #ifdef CONFIG_COMEDI_PCI
  290. {
  291. .name = DIO200_DRIVER_NAME,
  292. .devid = PCI_DEVICE_ID_INVALID,
  293. .bustype = pci_bustype,
  294. .model = anypci_model, /* wildcard */
  295. },
  296. #endif
  297. };
  298. /*
  299. * Layout descriptions - some ISA and PCI board descriptions share the same
  300. * layout.
  301. */
  302. enum dio200_sdtype { sd_none, sd_intr, sd_8255, sd_8254 };
  303. #define DIO200_MAX_SUBDEVS 7
  304. #define DIO200_MAX_ISNS 6
  305. struct dio200_layout_struct {
  306. unsigned short n_subdevs; /* number of subdevices */
  307. unsigned char sdtype[DIO200_MAX_SUBDEVS]; /* enum dio200_sdtype */
  308. unsigned char sdinfo[DIO200_MAX_SUBDEVS]; /* depends on sdtype */
  309. char has_int_sce; /* has interrupt enable/status register */
  310. char has_clk_gat_sce; /* has clock/gate selection registers */
  311. };
  312. static const struct dio200_layout_struct dio200_layouts[] = {
  313. [pc212_layout] = {
  314. .n_subdevs = 6,
  315. .sdtype = {sd_8255, sd_8254, sd_8254, sd_8254,
  316. sd_8254,
  317. sd_intr},
  318. .sdinfo = {0x00, 0x08, 0x0C, 0x10, 0x14,
  319. 0x3F},
  320. .has_int_sce = 1,
  321. .has_clk_gat_sce = 1,
  322. },
  323. [pc214_layout] = {
  324. .n_subdevs = 4,
  325. .sdtype = {sd_8255, sd_8255, sd_8254,
  326. sd_intr},
  327. .sdinfo = {0x00, 0x08, 0x10, 0x01},
  328. .has_int_sce = 0,
  329. .has_clk_gat_sce = 0,
  330. },
  331. [pc215_layout] = {
  332. .n_subdevs = 5,
  333. .sdtype = {sd_8255, sd_8255, sd_8254,
  334. sd_8254,
  335. sd_intr},
  336. .sdinfo = {0x00, 0x08, 0x10, 0x14, 0x3F},
  337. .has_int_sce = 1,
  338. .has_clk_gat_sce = 1,
  339. },
  340. [pc218_layout] = {
  341. .n_subdevs = 7,
  342. .sdtype = {sd_8254, sd_8254, sd_8255, sd_8254,
  343. sd_8254,
  344. sd_intr},
  345. .sdinfo = {0x00, 0x04, 0x08, 0x0C, 0x10,
  346. 0x14,
  347. 0x3F},
  348. .has_int_sce = 1,
  349. .has_clk_gat_sce = 1,
  350. },
  351. [pc272_layout] = {
  352. .n_subdevs = 4,
  353. .sdtype = {sd_8255, sd_8255, sd_8255,
  354. sd_intr},
  355. .sdinfo = {0x00, 0x08, 0x10, 0x3F},
  356. .has_int_sce = 1,
  357. .has_clk_gat_sce = 0,
  358. },
  359. };
  360. /*
  361. * PCI driver table.
  362. */
  363. #ifdef CONFIG_COMEDI_PCI
  364. static DEFINE_PCI_DEVICE_TABLE(dio200_pci_table) = {
  365. {
  366. PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI215,
  367. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
  368. PCI_VENDOR_ID_AMPLICON, PCI_DEVICE_ID_AMPLICON_PCI272,
  369. PCI_ANY_ID, PCI_ANY_ID, 0, 0, 0}, {
  370. 0}
  371. };
  372. MODULE_DEVICE_TABLE(pci, dio200_pci_table);
  373. #endif /* CONFIG_COMEDI_PCI */
  374. /*
  375. * Useful for shorthand access to the particular board structure
  376. */
  377. #define thisboard ((const struct dio200_board *)dev->board_ptr)
  378. #define thislayout (&dio200_layouts[((struct dio200_board *) \
  379. dev->board_ptr)->layout])
  380. /* this structure is for data unique to this hardware driver. If
  381. several hardware drivers keep similar information in this structure,
  382. feel free to suggest moving the variable to the struct comedi_device struct.
  383. */
  384. struct dio200_private {
  385. #ifdef CONFIG_COMEDI_PCI
  386. struct pci_dev *pci_dev; /* PCI device */
  387. #endif
  388. int intr_sd;
  389. };
  390. #define devpriv ((struct dio200_private *)dev->private)
  391. struct dio200_subdev_8254 {
  392. unsigned long iobase; /* Counter base address */
  393. unsigned long clk_sce_iobase; /* CLK_SCE base address */
  394. unsigned long gat_sce_iobase; /* GAT_SCE base address */
  395. int which; /* Bit 5 of CLK_SCE or GAT_SCE */
  396. int has_clk_gat_sce;
  397. unsigned clock_src[3]; /* Current clock sources */
  398. unsigned gate_src[3]; /* Current gate sources */
  399. spinlock_t spinlock;
  400. };
  401. struct dio200_subdev_intr {
  402. unsigned long iobase;
  403. spinlock_t spinlock;
  404. int active;
  405. int has_int_sce;
  406. unsigned int valid_isns;
  407. unsigned int enabled_isns;
  408. unsigned int stopcount;
  409. int continuous;
  410. };
  411. /*
  412. * The struct comedi_driver structure tells the Comedi core module
  413. * which functions to call to configure/deconfigure (attach/detach)
  414. * the board, and also about the kernel module that contains
  415. * the device code.
  416. */
  417. static int dio200_attach(struct comedi_device *dev,
  418. struct comedi_devconfig *it);
  419. static int dio200_detach(struct comedi_device *dev);
  420. static struct comedi_driver driver_amplc_dio200 = {
  421. .driver_name = DIO200_DRIVER_NAME,
  422. .module = THIS_MODULE,
  423. .attach = dio200_attach,
  424. .detach = dio200_detach,
  425. .board_name = &dio200_boards[0].name,
  426. .offset = sizeof(struct dio200_board),
  427. .num_names = ARRAY_SIZE(dio200_boards),
  428. };
  429. #ifdef CONFIG_COMEDI_PCI
  430. static int __devinit driver_amplc_dio200_pci_probe(struct pci_dev *dev,
  431. const struct pci_device_id
  432. *ent)
  433. {
  434. return comedi_pci_auto_config(dev, driver_amplc_dio200.driver_name);
  435. }
  436. static void __devexit driver_amplc_dio200_pci_remove(struct pci_dev *dev)
  437. {
  438. comedi_pci_auto_unconfig(dev);
  439. }
  440. static struct pci_driver driver_amplc_dio200_pci_driver = {
  441. .id_table = dio200_pci_table,
  442. .probe = &driver_amplc_dio200_pci_probe,
  443. .remove = __devexit_p(&driver_amplc_dio200_pci_remove)
  444. };
  445. static int __init driver_amplc_dio200_init_module(void)
  446. {
  447. int retval;
  448. retval = comedi_driver_register(&driver_amplc_dio200);
  449. if (retval < 0)
  450. return retval;
  451. driver_amplc_dio200_pci_driver.name =
  452. (char *)driver_amplc_dio200.driver_name;
  453. return pci_register_driver(&driver_amplc_dio200_pci_driver);
  454. }
  455. static void __exit driver_amplc_dio200_cleanup_module(void)
  456. {
  457. pci_unregister_driver(&driver_amplc_dio200_pci_driver);
  458. comedi_driver_unregister(&driver_amplc_dio200);
  459. }
  460. module_init(driver_amplc_dio200_init_module);
  461. module_exit(driver_amplc_dio200_cleanup_module);
  462. #else
  463. static int __init driver_amplc_dio200_init_module(void)
  464. {
  465. return comedi_driver_register(&driver_amplc_dio200);
  466. }
  467. static void __exit driver_amplc_dio200_cleanup_module(void)
  468. {
  469. comedi_driver_unregister(&driver_amplc_dio200);
  470. }
  471. module_init(driver_amplc_dio200_init_module);
  472. module_exit(driver_amplc_dio200_cleanup_module);
  473. #endif
  474. /*
  475. * This function looks for a PCI device matching the requested board name,
  476. * bus and slot.
  477. */
  478. #ifdef CONFIG_COMEDI_PCI
  479. static int
  480. dio200_find_pci(struct comedi_device *dev, int bus, int slot,
  481. struct pci_dev **pci_dev_p)
  482. {
  483. struct pci_dev *pci_dev = NULL;
  484. *pci_dev_p = NULL;
  485. /* Look for matching PCI device. */
  486. for (pci_dev = pci_get_device(PCI_VENDOR_ID_AMPLICON, PCI_ANY_ID, NULL);
  487. pci_dev != NULL;
  488. pci_dev = pci_get_device(PCI_VENDOR_ID_AMPLICON,
  489. PCI_ANY_ID, pci_dev)) {
  490. /* If bus/slot specified, check them. */
  491. if (bus || slot) {
  492. if (bus != pci_dev->bus->number
  493. || slot != PCI_SLOT(pci_dev->devfn))
  494. continue;
  495. }
  496. if (thisboard->model == anypci_model) {
  497. /* Match any supported model. */
  498. int i;
  499. for (i = 0; i < ARRAY_SIZE(dio200_boards); i++) {
  500. if (dio200_boards[i].bustype != pci_bustype)
  501. continue;
  502. if (pci_dev->device == dio200_boards[i].devid) {
  503. /* Change board_ptr to matched board. */
  504. dev->board_ptr = &dio200_boards[i];
  505. break;
  506. }
  507. }
  508. if (i == ARRAY_SIZE(dio200_boards))
  509. continue;
  510. } else {
  511. /* Match specific model name. */
  512. if (pci_dev->device != thisboard->devid)
  513. continue;
  514. }
  515. /* Found a match. */
  516. *pci_dev_p = pci_dev;
  517. return 0;
  518. }
  519. /* No match found. */
  520. if (bus || slot) {
  521. printk(KERN_ERR
  522. "comedi%d: error! no %s found at pci %02x:%02x!\n",
  523. dev->minor, thisboard->name, bus, slot);
  524. } else {
  525. printk(KERN_ERR "comedi%d: error! no %s found!\n",
  526. dev->minor, thisboard->name);
  527. }
  528. return -EIO;
  529. }
  530. #endif
  531. /*
  532. * This function checks and requests an I/O region, reporting an error
  533. * if there is a conflict.
  534. */
  535. static int
  536. dio200_request_region(unsigned minor, unsigned long from, unsigned long extent)
  537. {
  538. if (!from || !request_region(from, extent, DIO200_DRIVER_NAME)) {
  539. printk(KERN_ERR "comedi%d: I/O port conflict (%#lx,%lu)!\n",
  540. minor, from, extent);
  541. return -EIO;
  542. }
  543. return 0;
  544. }
  545. /*
  546. * 'insn_bits' function for an 'INTERRUPT' subdevice.
  547. */
  548. static int
  549. dio200_subdev_intr_insn_bits(struct comedi_device *dev,
  550. struct comedi_subdevice *s,
  551. struct comedi_insn *insn, unsigned int *data)
  552. {
  553. struct dio200_subdev_intr *subpriv = s->private;
  554. if (subpriv->has_int_sce) {
  555. /* Just read the interrupt status register. */
  556. data[1] = inb(subpriv->iobase) & subpriv->valid_isns;
  557. } else {
  558. /* No interrupt status register. */
  559. data[0] = 0;
  560. }
  561. return 2;
  562. }
  563. /*
  564. * Called to stop acquisition for an 'INTERRUPT' subdevice.
  565. */
  566. static void dio200_stop_intr(struct comedi_device *dev,
  567. struct comedi_subdevice *s)
  568. {
  569. struct dio200_subdev_intr *subpriv = s->private;
  570. subpriv->active = 0;
  571. subpriv->enabled_isns = 0;
  572. if (subpriv->has_int_sce)
  573. outb(0, subpriv->iobase);
  574. }
  575. /*
  576. * Called to start acquisition for an 'INTERRUPT' subdevice.
  577. */
  578. static int dio200_start_intr(struct comedi_device *dev,
  579. struct comedi_subdevice *s)
  580. {
  581. unsigned int n;
  582. unsigned isn_bits;
  583. struct dio200_subdev_intr *subpriv = s->private;
  584. struct comedi_cmd *cmd = &s->async->cmd;
  585. int retval = 0;
  586. if (!subpriv->continuous && subpriv->stopcount == 0) {
  587. /* An empty acquisition! */
  588. s->async->events |= COMEDI_CB_EOA;
  589. subpriv->active = 0;
  590. retval = 1;
  591. } else {
  592. /* Determine interrupt sources to enable. */
  593. isn_bits = 0;
  594. if (cmd->chanlist) {
  595. for (n = 0; n < cmd->chanlist_len; n++)
  596. isn_bits |= (1U << CR_CHAN(cmd->chanlist[n]));
  597. }
  598. isn_bits &= subpriv->valid_isns;
  599. /* Enable interrupt sources. */
  600. subpriv->enabled_isns = isn_bits;
  601. if (subpriv->has_int_sce)
  602. outb(isn_bits, subpriv->iobase);
  603. }
  604. return retval;
  605. }
  606. /*
  607. * Internal trigger function to start acquisition for an 'INTERRUPT' subdevice.
  608. */
  609. static int
  610. dio200_inttrig_start_intr(struct comedi_device *dev, struct comedi_subdevice *s,
  611. unsigned int trignum)
  612. {
  613. struct dio200_subdev_intr *subpriv;
  614. unsigned long flags;
  615. int event = 0;
  616. if (trignum != 0)
  617. return -EINVAL;
  618. subpriv = s->private;
  619. spin_lock_irqsave(&subpriv->spinlock, flags);
  620. s->async->inttrig = NULL;
  621. if (subpriv->active)
  622. event = dio200_start_intr(dev, s);
  623. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  624. if (event)
  625. comedi_event(dev, s);
  626. return 1;
  627. }
  628. /*
  629. * This is called from the interrupt service routine to handle a read
  630. * scan on an 'INTERRUPT' subdevice.
  631. */
  632. static int dio200_handle_read_intr(struct comedi_device *dev,
  633. struct comedi_subdevice *s)
  634. {
  635. struct dio200_subdev_intr *subpriv = s->private;
  636. unsigned triggered;
  637. unsigned intstat;
  638. unsigned cur_enabled;
  639. unsigned int oldevents;
  640. unsigned long flags;
  641. triggered = 0;
  642. spin_lock_irqsave(&subpriv->spinlock, flags);
  643. oldevents = s->async->events;
  644. if (subpriv->has_int_sce) {
  645. /*
  646. * Collect interrupt sources that have triggered and disable
  647. * them temporarily. Loop around until no extra interrupt
  648. * sources have triggered, at which point, the valid part of
  649. * the interrupt status register will read zero, clearing the
  650. * cause of the interrupt.
  651. *
  652. * Mask off interrupt sources already seen to avoid infinite
  653. * loop in case of misconfiguration.
  654. */
  655. cur_enabled = subpriv->enabled_isns;
  656. while ((intstat = (inb(subpriv->iobase) & subpriv->valid_isns
  657. & ~triggered)) != 0) {
  658. triggered |= intstat;
  659. cur_enabled &= ~triggered;
  660. outb(cur_enabled, subpriv->iobase);
  661. }
  662. } else {
  663. /*
  664. * No interrupt status register. Assume the single interrupt
  665. * source has triggered.
  666. */
  667. triggered = subpriv->enabled_isns;
  668. }
  669. if (triggered) {
  670. /*
  671. * Some interrupt sources have triggered and have been
  672. * temporarily disabled to clear the cause of the interrupt.
  673. *
  674. * Reenable them NOW to minimize the time they are disabled.
  675. */
  676. cur_enabled = subpriv->enabled_isns;
  677. if (subpriv->has_int_sce)
  678. outb(cur_enabled, subpriv->iobase);
  679. if (subpriv->active) {
  680. /*
  681. * The command is still active.
  682. *
  683. * Ignore interrupt sources that the command isn't
  684. * interested in (just in case there's a race
  685. * condition).
  686. */
  687. if (triggered & subpriv->enabled_isns) {
  688. /* Collect scan data. */
  689. short val;
  690. unsigned int n, ch, len;
  691. val = 0;
  692. len = s->async->cmd.chanlist_len;
  693. for (n = 0; n < len; n++) {
  694. ch = CR_CHAN(s->async->cmd.chanlist[n]);
  695. if (triggered & (1U << ch))
  696. val |= (1U << n);
  697. }
  698. /* Write the scan to the buffer. */
  699. if (comedi_buf_put(s->async, val)) {
  700. s->async->events |= (COMEDI_CB_BLOCK |
  701. COMEDI_CB_EOS);
  702. } else {
  703. /* Error! Stop acquisition. */
  704. dio200_stop_intr(dev, s);
  705. s->async->events |= COMEDI_CB_ERROR
  706. | COMEDI_CB_OVERFLOW;
  707. comedi_error(dev, "buffer overflow");
  708. }
  709. /* Check for end of acquisition. */
  710. if (!subpriv->continuous) {
  711. /* stop_src == TRIG_COUNT */
  712. if (subpriv->stopcount > 0) {
  713. subpriv->stopcount--;
  714. if (subpriv->stopcount == 0) {
  715. s->async->events |=
  716. COMEDI_CB_EOA;
  717. dio200_stop_intr(dev,
  718. s);
  719. }
  720. }
  721. }
  722. }
  723. }
  724. }
  725. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  726. if (oldevents != s->async->events)
  727. comedi_event(dev, s);
  728. return (triggered != 0);
  729. }
  730. /*
  731. * 'cancel' function for an 'INTERRUPT' subdevice.
  732. */
  733. static int dio200_subdev_intr_cancel(struct comedi_device *dev,
  734. struct comedi_subdevice *s)
  735. {
  736. struct dio200_subdev_intr *subpriv = s->private;
  737. unsigned long flags;
  738. spin_lock_irqsave(&subpriv->spinlock, flags);
  739. if (subpriv->active)
  740. dio200_stop_intr(dev, s);
  741. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  742. return 0;
  743. }
  744. /*
  745. * 'do_cmdtest' function for an 'INTERRUPT' subdevice.
  746. */
  747. static int
  748. dio200_subdev_intr_cmdtest(struct comedi_device *dev,
  749. struct comedi_subdevice *s, struct comedi_cmd *cmd)
  750. {
  751. int err = 0;
  752. unsigned int tmp;
  753. /* step 1: make sure trigger sources are trivially valid */
  754. tmp = cmd->start_src;
  755. cmd->start_src &= (TRIG_NOW | TRIG_INT);
  756. if (!cmd->start_src || tmp != cmd->start_src)
  757. err++;
  758. tmp = cmd->scan_begin_src;
  759. cmd->scan_begin_src &= TRIG_EXT;
  760. if (!cmd->scan_begin_src || tmp != cmd->scan_begin_src)
  761. err++;
  762. tmp = cmd->convert_src;
  763. cmd->convert_src &= TRIG_NOW;
  764. if (!cmd->convert_src || tmp != cmd->convert_src)
  765. err++;
  766. tmp = cmd->scan_end_src;
  767. cmd->scan_end_src &= TRIG_COUNT;
  768. if (!cmd->scan_end_src || tmp != cmd->scan_end_src)
  769. err++;
  770. tmp = cmd->stop_src;
  771. cmd->stop_src &= (TRIG_COUNT | TRIG_NONE);
  772. if (!cmd->stop_src || tmp != cmd->stop_src)
  773. err++;
  774. if (err)
  775. return 1;
  776. /* step 2: make sure trigger sources are unique and mutually
  777. compatible */
  778. /* these tests are true if more than one _src bit is set */
  779. if ((cmd->start_src & (cmd->start_src - 1)) != 0)
  780. err++;
  781. if ((cmd->scan_begin_src & (cmd->scan_begin_src - 1)) != 0)
  782. err++;
  783. if ((cmd->convert_src & (cmd->convert_src - 1)) != 0)
  784. err++;
  785. if ((cmd->scan_end_src & (cmd->scan_end_src - 1)) != 0)
  786. err++;
  787. if ((cmd->stop_src & (cmd->stop_src - 1)) != 0)
  788. err++;
  789. if (err)
  790. return 2;
  791. /* step 3: make sure arguments are trivially compatible */
  792. /* cmd->start_src == TRIG_NOW || cmd->start_src == TRIG_INT */
  793. if (cmd->start_arg != 0) {
  794. cmd->start_arg = 0;
  795. err++;
  796. }
  797. /* cmd->scan_begin_src == TRIG_EXT */
  798. if (cmd->scan_begin_arg != 0) {
  799. cmd->scan_begin_arg = 0;
  800. err++;
  801. }
  802. /* cmd->convert_src == TRIG_NOW */
  803. if (cmd->convert_arg != 0) {
  804. cmd->convert_arg = 0;
  805. err++;
  806. }
  807. /* cmd->scan_end_src == TRIG_COUNT */
  808. if (cmd->scan_end_arg != cmd->chanlist_len) {
  809. cmd->scan_end_arg = cmd->chanlist_len;
  810. err++;
  811. }
  812. switch (cmd->stop_src) {
  813. case TRIG_COUNT:
  814. /* any count allowed */
  815. break;
  816. case TRIG_NONE:
  817. if (cmd->stop_arg != 0) {
  818. cmd->stop_arg = 0;
  819. err++;
  820. }
  821. break;
  822. default:
  823. break;
  824. }
  825. if (err)
  826. return 3;
  827. /* step 4: fix up any arguments */
  828. /* if (err) return 4; */
  829. return 0;
  830. }
  831. /*
  832. * 'do_cmd' function for an 'INTERRUPT' subdevice.
  833. */
  834. static int dio200_subdev_intr_cmd(struct comedi_device *dev,
  835. struct comedi_subdevice *s)
  836. {
  837. struct comedi_cmd *cmd = &s->async->cmd;
  838. struct dio200_subdev_intr *subpriv = s->private;
  839. unsigned long flags;
  840. int event = 0;
  841. spin_lock_irqsave(&subpriv->spinlock, flags);
  842. subpriv->active = 1;
  843. /* Set up end of acquisition. */
  844. switch (cmd->stop_src) {
  845. case TRIG_COUNT:
  846. subpriv->continuous = 0;
  847. subpriv->stopcount = cmd->stop_arg;
  848. break;
  849. default:
  850. /* TRIG_NONE */
  851. subpriv->continuous = 1;
  852. subpriv->stopcount = 0;
  853. break;
  854. }
  855. /* Set up start of acquisition. */
  856. switch (cmd->start_src) {
  857. case TRIG_INT:
  858. s->async->inttrig = dio200_inttrig_start_intr;
  859. break;
  860. default:
  861. /* TRIG_NOW */
  862. event = dio200_start_intr(dev, s);
  863. break;
  864. }
  865. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  866. if (event)
  867. comedi_event(dev, s);
  868. return 0;
  869. }
  870. /*
  871. * This function initializes an 'INTERRUPT' subdevice.
  872. */
  873. static int
  874. dio200_subdev_intr_init(struct comedi_device *dev, struct comedi_subdevice *s,
  875. unsigned long iobase, unsigned valid_isns,
  876. int has_int_sce)
  877. {
  878. struct dio200_subdev_intr *subpriv;
  879. subpriv = kzalloc(sizeof(*subpriv), GFP_KERNEL);
  880. if (!subpriv) {
  881. printk(KERN_ERR "comedi%d: error! out of memory!\n",
  882. dev->minor);
  883. return -ENOMEM;
  884. }
  885. subpriv->iobase = iobase;
  886. subpriv->has_int_sce = has_int_sce;
  887. subpriv->valid_isns = valid_isns;
  888. spin_lock_init(&subpriv->spinlock);
  889. if (has_int_sce)
  890. outb(0, subpriv->iobase); /* Disable interrupt sources. */
  891. s->private = subpriv;
  892. s->type = COMEDI_SUBD_DI;
  893. s->subdev_flags = SDF_READABLE | SDF_CMD_READ;
  894. if (has_int_sce) {
  895. s->n_chan = DIO200_MAX_ISNS;
  896. s->len_chanlist = DIO200_MAX_ISNS;
  897. } else {
  898. /* No interrupt source register. Support single channel. */
  899. s->n_chan = 1;
  900. s->len_chanlist = 1;
  901. }
  902. s->range_table = &range_digital;
  903. s->maxdata = 1;
  904. s->insn_bits = dio200_subdev_intr_insn_bits;
  905. s->do_cmdtest = dio200_subdev_intr_cmdtest;
  906. s->do_cmd = dio200_subdev_intr_cmd;
  907. s->cancel = dio200_subdev_intr_cancel;
  908. return 0;
  909. }
  910. /*
  911. * This function cleans up an 'INTERRUPT' subdevice.
  912. */
  913. static void
  914. dio200_subdev_intr_cleanup(struct comedi_device *dev,
  915. struct comedi_subdevice *s)
  916. {
  917. struct dio200_subdev_intr *subpriv = s->private;
  918. kfree(subpriv);
  919. }
  920. /*
  921. * Interrupt service routine.
  922. */
  923. static irqreturn_t dio200_interrupt(int irq, void *d)
  924. {
  925. struct comedi_device *dev = d;
  926. int handled;
  927. if (!dev->attached)
  928. return IRQ_NONE;
  929. if (devpriv->intr_sd >= 0) {
  930. handled = dio200_handle_read_intr(dev,
  931. dev->subdevices +
  932. devpriv->intr_sd);
  933. } else {
  934. handled = 0;
  935. }
  936. return IRQ_RETVAL(handled);
  937. }
  938. /*
  939. * Handle 'insn_read' for an '8254' counter subdevice.
  940. */
  941. static int
  942. dio200_subdev_8254_read(struct comedi_device *dev, struct comedi_subdevice *s,
  943. struct comedi_insn *insn, unsigned int *data)
  944. {
  945. struct dio200_subdev_8254 *subpriv = s->private;
  946. int chan = CR_CHAN(insn->chanspec);
  947. unsigned long flags;
  948. spin_lock_irqsave(&subpriv->spinlock, flags);
  949. data[0] = i8254_read(subpriv->iobase, 0, chan);
  950. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  951. return 1;
  952. }
  953. /*
  954. * Handle 'insn_write' for an '8254' counter subdevice.
  955. */
  956. static int
  957. dio200_subdev_8254_write(struct comedi_device *dev, struct comedi_subdevice *s,
  958. struct comedi_insn *insn, unsigned int *data)
  959. {
  960. struct dio200_subdev_8254 *subpriv = s->private;
  961. int chan = CR_CHAN(insn->chanspec);
  962. unsigned long flags;
  963. spin_lock_irqsave(&subpriv->spinlock, flags);
  964. i8254_write(subpriv->iobase, 0, chan, data[0]);
  965. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  966. return 1;
  967. }
  968. /*
  969. * Set gate source for an '8254' counter subdevice channel.
  970. */
  971. static int
  972. dio200_set_gate_src(struct dio200_subdev_8254 *subpriv,
  973. unsigned int counter_number, unsigned int gate_src)
  974. {
  975. unsigned char byte;
  976. if (!subpriv->has_clk_gat_sce)
  977. return -1;
  978. if (counter_number > 2)
  979. return -1;
  980. if (gate_src > 7)
  981. return -1;
  982. subpriv->gate_src[counter_number] = gate_src;
  983. byte = GAT_SCE(subpriv->which, counter_number, gate_src);
  984. outb(byte, subpriv->gat_sce_iobase);
  985. return 0;
  986. }
  987. /*
  988. * Get gate source for an '8254' counter subdevice channel.
  989. */
  990. static int
  991. dio200_get_gate_src(struct dio200_subdev_8254 *subpriv,
  992. unsigned int counter_number)
  993. {
  994. if (!subpriv->has_clk_gat_sce)
  995. return -1;
  996. if (counter_number > 2)
  997. return -1;
  998. return subpriv->gate_src[counter_number];
  999. }
  1000. /*
  1001. * Set clock source for an '8254' counter subdevice channel.
  1002. */
  1003. static int
  1004. dio200_set_clock_src(struct dio200_subdev_8254 *subpriv,
  1005. unsigned int counter_number, unsigned int clock_src)
  1006. {
  1007. unsigned char byte;
  1008. if (!subpriv->has_clk_gat_sce)
  1009. return -1;
  1010. if (counter_number > 2)
  1011. return -1;
  1012. if (clock_src > 7)
  1013. return -1;
  1014. subpriv->clock_src[counter_number] = clock_src;
  1015. byte = CLK_SCE(subpriv->which, counter_number, clock_src);
  1016. outb(byte, subpriv->clk_sce_iobase);
  1017. return 0;
  1018. }
  1019. /*
  1020. * Get clock source for an '8254' counter subdevice channel.
  1021. */
  1022. static int
  1023. dio200_get_clock_src(struct dio200_subdev_8254 *subpriv,
  1024. unsigned int counter_number, unsigned int *period_ns)
  1025. {
  1026. unsigned clock_src;
  1027. if (!subpriv->has_clk_gat_sce)
  1028. return -1;
  1029. if (counter_number > 2)
  1030. return -1;
  1031. clock_src = subpriv->clock_src[counter_number];
  1032. *period_ns = clock_period[clock_src];
  1033. return clock_src;
  1034. }
  1035. /*
  1036. * Handle 'insn_config' for an '8254' counter subdevice.
  1037. */
  1038. static int
  1039. dio200_subdev_8254_config(struct comedi_device *dev, struct comedi_subdevice *s,
  1040. struct comedi_insn *insn, unsigned int *data)
  1041. {
  1042. struct dio200_subdev_8254 *subpriv = s->private;
  1043. int ret = 0;
  1044. int chan = CR_CHAN(insn->chanspec);
  1045. unsigned long flags;
  1046. spin_lock_irqsave(&subpriv->spinlock, flags);
  1047. switch (data[0]) {
  1048. case INSN_CONFIG_SET_COUNTER_MODE:
  1049. ret = i8254_set_mode(subpriv->iobase, 0, chan, data[1]);
  1050. if (ret < 0)
  1051. ret = -EINVAL;
  1052. break;
  1053. case INSN_CONFIG_8254_READ_STATUS:
  1054. data[1] = i8254_status(subpriv->iobase, 0, chan);
  1055. break;
  1056. case INSN_CONFIG_SET_GATE_SRC:
  1057. ret = dio200_set_gate_src(subpriv, chan, data[2]);
  1058. if (ret < 0)
  1059. ret = -EINVAL;
  1060. break;
  1061. case INSN_CONFIG_GET_GATE_SRC:
  1062. ret = dio200_get_gate_src(subpriv, chan);
  1063. if (ret < 0) {
  1064. ret = -EINVAL;
  1065. break;
  1066. }
  1067. data[2] = ret;
  1068. break;
  1069. case INSN_CONFIG_SET_CLOCK_SRC:
  1070. ret = dio200_set_clock_src(subpriv, chan, data[1]);
  1071. if (ret < 0)
  1072. ret = -EINVAL;
  1073. break;
  1074. case INSN_CONFIG_GET_CLOCK_SRC:
  1075. ret = dio200_get_clock_src(subpriv, chan, &data[2]);
  1076. if (ret < 0) {
  1077. ret = -EINVAL;
  1078. break;
  1079. }
  1080. data[1] = ret;
  1081. break;
  1082. default:
  1083. ret = -EINVAL;
  1084. break;
  1085. }
  1086. spin_unlock_irqrestore(&subpriv->spinlock, flags);
  1087. return ret < 0 ? ret : insn->n;
  1088. }
  1089. /*
  1090. * This function initializes an '8254' counter subdevice.
  1091. *
  1092. * Note: iobase is the base address of the board, not the subdevice;
  1093. * offset is the offset to the 8254 chip.
  1094. */
  1095. static int
  1096. dio200_subdev_8254_init(struct comedi_device *dev, struct comedi_subdevice *s,
  1097. unsigned long iobase, unsigned offset,
  1098. int has_clk_gat_sce)
  1099. {
  1100. struct dio200_subdev_8254 *subpriv;
  1101. unsigned int chan;
  1102. subpriv = kzalloc(sizeof(*subpriv), GFP_KERNEL);
  1103. if (!subpriv) {
  1104. printk(KERN_ERR "comedi%d: error! out of memory!\n",
  1105. dev->minor);
  1106. return -ENOMEM;
  1107. }
  1108. s->private = subpriv;
  1109. s->type = COMEDI_SUBD_COUNTER;
  1110. s->subdev_flags = SDF_WRITABLE | SDF_READABLE;
  1111. s->n_chan = 3;
  1112. s->maxdata = 0xFFFF;
  1113. s->insn_read = dio200_subdev_8254_read;
  1114. s->insn_write = dio200_subdev_8254_write;
  1115. s->insn_config = dio200_subdev_8254_config;
  1116. spin_lock_init(&subpriv->spinlock);
  1117. subpriv->iobase = offset + iobase;
  1118. subpriv->has_clk_gat_sce = has_clk_gat_sce;
  1119. if (has_clk_gat_sce) {
  1120. /* Derive CLK_SCE and GAT_SCE register offsets from
  1121. * 8254 offset. */
  1122. subpriv->clk_sce_iobase =
  1123. DIO200_XCLK_SCE + (offset >> 3) + iobase;
  1124. subpriv->gat_sce_iobase =
  1125. DIO200_XGAT_SCE + (offset >> 3) + iobase;
  1126. subpriv->which = (offset >> 2) & 1;
  1127. }
  1128. /* Initialize channels. */
  1129. for (chan = 0; chan < 3; chan++) {
  1130. i8254_set_mode(subpriv->iobase, 0, chan,
  1131. I8254_MODE0 | I8254_BINARY);
  1132. if (subpriv->has_clk_gat_sce) {
  1133. /* Gate source 0 is VCC (logic 1). */
  1134. dio200_set_gate_src(subpriv, chan, 0);
  1135. /* Clock source 0 is the dedicated clock input. */
  1136. dio200_set_clock_src(subpriv, chan, 0);
  1137. }
  1138. }
  1139. return 0;
  1140. }
  1141. /*
  1142. * This function cleans up an '8254' counter subdevice.
  1143. */
  1144. static void
  1145. dio200_subdev_8254_cleanup(struct comedi_device *dev,
  1146. struct comedi_subdevice *s)
  1147. {
  1148. struct dio200_subdev_intr *subpriv = s->private;
  1149. kfree(subpriv);
  1150. }
  1151. /*
  1152. * Attach is called by the Comedi core to configure the driver
  1153. * for a particular board. If you specified a board_name array
  1154. * in the driver structure, dev->board_ptr contains that
  1155. * address.
  1156. */
  1157. static int dio200_attach(struct comedi_device *dev, struct comedi_devconfig *it)
  1158. {
  1159. struct comedi_subdevice *s;
  1160. unsigned long iobase = 0;
  1161. unsigned int irq = 0;
  1162. #ifdef CONFIG_COMEDI_PCI
  1163. struct pci_dev *pci_dev = NULL;
  1164. int bus = 0, slot = 0;
  1165. #endif
  1166. const struct dio200_layout_struct *layout;
  1167. int share_irq = 0;
  1168. int sdx;
  1169. unsigned n;
  1170. int ret;
  1171. printk(KERN_DEBUG "comedi%d: %s: attach\n", dev->minor,
  1172. DIO200_DRIVER_NAME);
  1173. ret = alloc_private(dev, sizeof(struct dio200_private));
  1174. if (ret < 0) {
  1175. printk(KERN_ERR "comedi%d: error! out of memory!\n",
  1176. dev->minor);
  1177. return ret;
  1178. }
  1179. /* Process options. */
  1180. switch (thisboard->bustype) {
  1181. case isa_bustype:
  1182. iobase = it->options[0];
  1183. irq = it->options[1];
  1184. share_irq = 0;
  1185. break;
  1186. #ifdef CONFIG_COMEDI_PCI
  1187. case pci_bustype:
  1188. bus = it->options[0];
  1189. slot = it->options[1];
  1190. share_irq = 1;
  1191. ret = dio200_find_pci(dev, bus, slot, &pci_dev);
  1192. if (ret < 0)
  1193. return ret;
  1194. devpriv->pci_dev = pci_dev;
  1195. break;
  1196. #endif
  1197. default:
  1198. printk(KERN_ERR
  1199. "comedi%d: %s: BUG! cannot determine board type!\n",
  1200. dev->minor, DIO200_DRIVER_NAME);
  1201. return -EINVAL;
  1202. break;
  1203. }
  1204. devpriv->intr_sd = -1;
  1205. /* Enable device and reserve I/O spaces. */
  1206. #ifdef CONFIG_COMEDI_PCI
  1207. if (pci_dev) {
  1208. ret = comedi_pci_enable(pci_dev, DIO200_DRIVER_NAME);
  1209. if (ret < 0) {
  1210. printk(KERN_ERR
  1211. "comedi%d: error! cannot enable PCI device and request regions!\n",
  1212. dev->minor);
  1213. return ret;
  1214. }
  1215. iobase = pci_resource_start(pci_dev, 2);
  1216. irq = pci_dev->irq;
  1217. } else
  1218. #endif
  1219. {
  1220. ret = dio200_request_region(dev->minor, iobase, DIO200_IO_SIZE);
  1221. if (ret < 0)
  1222. return ret;
  1223. }
  1224. dev->iobase = iobase;
  1225. layout = thislayout;
  1226. ret = alloc_subdevices(dev, layout->n_subdevs);
  1227. if (ret < 0) {
  1228. printk(KERN_ERR "comedi%d: error! out of memory!\n",
  1229. dev->minor);
  1230. return ret;
  1231. }
  1232. for (n = 0; n < dev->n_subdevices; n++) {
  1233. s = &dev->subdevices[n];
  1234. switch (layout->sdtype[n]) {
  1235. case sd_8254:
  1236. /* counter subdevice (8254) */
  1237. ret = dio200_subdev_8254_init(dev, s, iobase,
  1238. layout->sdinfo[n],
  1239. layout->has_clk_gat_sce);
  1240. if (ret < 0)
  1241. return ret;
  1242. break;
  1243. case sd_8255:
  1244. /* digital i/o subdevice (8255) */
  1245. ret = subdev_8255_init(dev, s, NULL,
  1246. iobase + layout->sdinfo[n]);
  1247. if (ret < 0)
  1248. return ret;
  1249. break;
  1250. case sd_intr:
  1251. /* 'INTERRUPT' subdevice */
  1252. if (irq) {
  1253. ret = dio200_subdev_intr_init(dev, s,
  1254. iobase +
  1255. DIO200_INT_SCE,
  1256. layout->sdinfo[n],
  1257. layout->
  1258. has_int_sce);
  1259. if (ret < 0)
  1260. return ret;
  1261. devpriv->intr_sd = n;
  1262. } else {
  1263. s->type = COMEDI_SUBD_UNUSED;
  1264. }
  1265. break;
  1266. default:
  1267. s->type = COMEDI_SUBD_UNUSED;
  1268. break;
  1269. }
  1270. }
  1271. sdx = devpriv->intr_sd;
  1272. if (sdx >= 0 && sdx < dev->n_subdevices)
  1273. dev->read_subdev = &dev->subdevices[sdx];
  1274. dev->board_name = thisboard->name;
  1275. if (irq) {
  1276. unsigned long flags = share_irq ? IRQF_SHARED : 0;
  1277. if (request_irq(irq, dio200_interrupt, flags,
  1278. DIO200_DRIVER_NAME, dev) >= 0) {
  1279. dev->irq = irq;
  1280. } else {
  1281. printk(KERN_WARNING
  1282. "comedi%d: warning! irq %u unavailable!\n",
  1283. dev->minor, irq);
  1284. }
  1285. }
  1286. printk(KERN_INFO "comedi%d: %s ", dev->minor, dev->board_name);
  1287. if (thisboard->bustype == isa_bustype) {
  1288. printk("(base %#lx) ", iobase);
  1289. } else {
  1290. #ifdef CONFIG_COMEDI_PCI
  1291. printk("(pci %s) ", pci_name(pci_dev));
  1292. #endif
  1293. }
  1294. if (irq)
  1295. printk("(irq %u%s) ", irq, (dev->irq ? "" : " UNAVAILABLE"));
  1296. else
  1297. printk("(no irq) ");
  1298. printk("attached\n");
  1299. return 1;
  1300. }
  1301. /*
  1302. * _detach is called to deconfigure a device. It should deallocate
  1303. * resources.
  1304. * This function is also called when _attach() fails, so it should be
  1305. * careful not to release resources that were not necessarily
  1306. * allocated by _attach(). dev->private and dev->subdevices are
  1307. * deallocated automatically by the core.
  1308. */
  1309. static int dio200_detach(struct comedi_device *dev)
  1310. {
  1311. const struct dio200_layout_struct *layout;
  1312. unsigned n;
  1313. printk(KERN_DEBUG "comedi%d: %s: detach\n", dev->minor,
  1314. DIO200_DRIVER_NAME);
  1315. if (dev->irq)
  1316. free_irq(dev->irq, dev);
  1317. if (dev->subdevices) {
  1318. layout = thislayout;
  1319. for (n = 0; n < dev->n_subdevices; n++) {
  1320. struct comedi_subdevice *s = &dev->subdevices[n];
  1321. switch (layout->sdtype[n]) {
  1322. case sd_8254:
  1323. dio200_subdev_8254_cleanup(dev, s);
  1324. break;
  1325. case sd_8255:
  1326. subdev_8255_cleanup(dev, s);
  1327. break;
  1328. case sd_intr:
  1329. dio200_subdev_intr_cleanup(dev, s);
  1330. break;
  1331. default:
  1332. break;
  1333. }
  1334. }
  1335. }
  1336. if (devpriv) {
  1337. #ifdef CONFIG_COMEDI_PCI
  1338. if (devpriv->pci_dev) {
  1339. if (dev->iobase)
  1340. comedi_pci_disable(devpriv->pci_dev);
  1341. pci_dev_put(devpriv->pci_dev);
  1342. } else
  1343. #endif
  1344. {
  1345. if (dev->iobase)
  1346. release_region(dev->iobase, DIO200_IO_SIZE);
  1347. }
  1348. }
  1349. if (dev->board_name)
  1350. printk(KERN_INFO "comedi%d: %s removed\n",
  1351. dev->minor, dev->board_name);
  1352. return 0;
  1353. }
  1354. MODULE_AUTHOR("Comedi http://www.comedi.org");
  1355. MODULE_DESCRIPTION("Comedi low-level driver");
  1356. MODULE_LICENSE("GPL");