/drivers/staging/ath6kl/miscdrv/ar3kps/ar3kpsconfig.h

https://bitbucket.org/wisechild/galaxy-nexus · C++ Header · 75 lines · 30 code · 17 blank · 28 comment · 0 complexity · 741a8e8cad22df9bf80fdef1794a3b68 MD5 · raw file

  1. /*
  2. * Copyright (c) 2004-2010 Atheros Communications Inc.
  3. * All rights reserved.
  4. *
  5. * This file defines the symbols exported by Atheros PS and patch download module.
  6. * define the constant HCI_TRANSPORT_SDIO if the module is being used for HCI SDIO transport.
  7. * defined.
  8. *
  9. *
  10. * ar3kcpsconfig.h
  11. *
  12. *
  13. *
  14. * The software source and binaries included in this development package are
  15. * licensed, not sold. You, or your company, received the package under one
  16. * or more license agreements. The rights granted to you are specifically
  17. * listed in these license agreement(s). All other rights remain with Atheros
  18. * Communications, Inc., its subsidiaries, or the respective owner including
  19. * those listed on the included copyright notices.. Distribution of any
  20. * portion of this package must be in strict compliance with the license
  21. * agreement(s) terms.
  22. *
  23. *
  24. *
  25. */
  26. #ifndef __AR3KPSCONFIG_H
  27. #define __AR3KPSCONFIG_H
  28. /*
  29. * Define the flag HCI_TRANSPORT_SDIO and undefine HCI_TRANSPORT_UART if the transport being used is SDIO.
  30. */
  31. #undef HCI_TRANSPORT_UART
  32. #include <linux/fs.h>
  33. #include <linux/errno.h>
  34. #include <linux/signal.h>
  35. #include <linux/ioctl.h>
  36. #include <linux/firmware.h>
  37. #include <net/bluetooth/bluetooth.h>
  38. #include <net/bluetooth/hci_core.h>
  39. #include "ar3kpsparser.h"
  40. #define FPGA_REGISTER 0x4FFC
  41. #define BDADDR_TYPE_STRING 0
  42. #define BDADDR_TYPE_HEX 1
  43. #define CONFIG_PATH "ar3k"
  44. #define PS_ASIC_FILE "PS_ASIC.pst"
  45. #define PS_FPGA_FILE "PS_FPGA.pst"
  46. #define PATCH_FILE "RamPatch.txt"
  47. #define BDADDR_FILE "ar3kbdaddr.pst"
  48. #define ROM_VER_AR3001_3_1_0 30000
  49. #define ROM_VER_AR3001_3_1_1 30101
  50. #ifndef HCI_TRANSPORT_SDIO
  51. #define struct ar3k_config_info struct hci_dev
  52. extern wait_queue_head_t HciEvent;
  53. extern wait_queue_t Eventwait;
  54. extern u8 *HciEventpacket;
  55. #endif /* #ifndef HCI_TRANSPORT_SDIO */
  56. int AthPSInitialize(struct ar3k_config_info *hdev);
  57. int ReadPSEvent(u8* Data);
  58. #endif /* __AR3KPSCONFIG_H */