PageRenderTime 40ms CodeModel.GetById 18ms app.highlight 15ms RepoModel.GetById 1ms app.codeStats 0ms

/xbmc/visualizations/Goom/goom2k4-0/src/mmx.h

http://github.com/xbmc/xbmc
C++ Header | 729 lines | 442 code | 129 blank | 158 comment | 0 complexity | d9c0297bbd2f07ba3e302d47fac597ec MD5 | raw file
  1/*	mmx.h
  2
  3	MultiMedia eXtensions GCC interface library for IA32.
  4
  5	To use this library, simply include this header file
  6	and compile with GCC.  You MUST have inlining enabled
  7	in order for mmx_ok() to work; this can be done by
  8	simply using -O on the GCC command line.
  9
 10	Compiling with -DMMX_TRACE will cause detailed trace
 11	output to be sent to stderr for each mmx operation.
 12	This adds lots of code, and obviously slows execution to
 13	a crawl, but can be very useful for debugging.
 14
 15	THIS SOFTWARE IS PROVIDED ``AS IS'' AND WITHOUT ANY
 16	EXPRESS OR IMPLIED WARRANTIES, INCLUDING, WITHOUT
 17	LIMITATION, THE IMPLIED WARRANTIES OF MERCHANTABILITY
 18	AND FITNESS FOR ANY PARTICULAR PURPOSE.
 19
 20	1997-99 by H. Dietz and R. Fisher
 21
 22 Notes:
 23	It appears that the latest gas has the pand problem fixed, therefore
 24	  I'll undefine BROKEN_PAND by default.
 25*/
 26
 27#ifndef _MMX_H
 28#define _MMX_H
 29
 30#include "goom_graphic.h"
 31
 32/*	Warning:  at this writing, the version of GAS packaged
 33	with most Linux distributions does not handle the
 34	parallel AND operation mnemonic correctly.  If the
 35	symbol BROKEN_PAND is defined, a slower alternative
 36	coding will be used.  If execution of mmxtest results
 37	in an illegal instruction fault, define this symbol.
 38*/
 39#undef	BROKEN_PAND
 40
 41
 42/*	The type of an value that fits in an MMX register
 43	(note that long long constant values MUST be suffixed
 44	 by LL and unsigned long long values by ULL, lest
 45	 they be truncated by the compiler)
 46*/
 47typedef	union {
 48	long long		q;	/* Quadword (64-bit) value */
 49	unsigned long long	uq;	/* Unsigned Quadword */
 50	int			d[2];	/* 2 Doubleword (32-bit) values */
 51	unsigned int		ud[2];	/* 2 Unsigned Doubleword */
 52	short			w[4];	/* 4 Word (16-bit) values */
 53	unsigned short		uw[4];	/* 4 Unsigned Word */
 54	char			b[8];	/* 8 Byte (8-bit) values */
 55	unsigned char		ub[8];	/* 8 Unsigned Byte */
 56	float			s[2];	/* Single-precision (32-bit) value */
 57} __attribute__ ((aligned (8))) mmx_t;	/* On an 8-byte (64-bit) boundary */
 58
 59
 60
 61/*	Function to test if multimedia instructions are supported...
 62*/
 63static int
 64mm_support(void)
 65{
 66	/* Returns 1 if MMX instructions are supported,
 67	   3 if Cyrix MMX and Extended MMX instructions are supported
 68	   5 if AMD MMX and 3DNow! instructions are supported
 69		 13 if AMD Extended MMX, &3dNow supported
 70	   0 if hardware does not support any of these
 71	*/
 72	register int rval = 0;
 73
 74	__asm__ __volatile__ (
 75		/* See if CPUID instruction is supported ... */
 76		/* ... Get copies of EFLAGS into eax and ecx */
 77    "pushl %%ebx\n\t"
 78		"pushf\n\t"
 79		"popl %%eax\n\t"
 80		"movl %%eax, %%ecx\n\t"
 81
 82		/* ... Toggle the ID bit in one copy and store */
 83		/*     to the EFLAGS reg */
 84		"xorl $0x200000, %%eax\n\t"
 85		"push %%eax\n\t"
 86		"popf\n\t"
 87
 88		/* ... Get the (hopefully modified) EFLAGS */
 89		"pushf\n\t"
 90		"popl %%eax\n\t"
 91
 92		/* ... Compare and test result */
 93		"xorl %%eax, %%ecx\n\t"
 94		"testl $0x200000, %%ecx\n\t"
 95		"jz NotSupported1\n\t"		/* CPUID not supported */
 96
 97
 98		/* Get standard CPUID information, and
 99		       go to a specific vendor section */
100		"movl $0, %%eax\n\t"
101		"cpuid\n\t"
102
103		/* Check for Intel */
104		"cmpl $0x756e6547, %%ebx\n\t"
105		"jne TryAMD\n\t"
106		"cmpl $0x49656e69, %%edx\n\t"
107		"jne TryAMD\n\t"
108		"cmpl $0x6c65746e, %%ecx\n"
109		"jne TryAMD\n\t"
110		"jmp Intel\n\t"
111
112		/* Check for AMD */
113		"\nTryAMD:\n\t"
114		"cmpl $0x68747541, %%ebx\n\t"
115		"jne TryCyrix\n\t"
116		"cmpl $0x69746e65, %%edx\n\t"
117		"jne TryCyrix\n\t"
118		"cmpl $0x444d4163, %%ecx\n"
119		"jne TryCyrix\n\t"
120		"jmp AMD\n\t"
121
122		/* Check for Cyrix */
123		"\nTryCyrix:\n\t"
124		"cmpl $0x69727943, %%ebx\n\t"
125		"jne NotSupported2\n\t"
126		"cmpl $0x736e4978, %%edx\n\t"
127		"jne NotSupported3\n\t"
128		"cmpl $0x64616574, %%ecx\n\t"
129		"jne NotSupported4\n\t"
130		/* Drop through to Cyrix... */
131
132
133		/* Cyrix Section */
134		/* See if extended CPUID level 80000001 is supported */
135		/* The value of CPUID/80000001 for the 6x86MX is undefined
136		   according to the Cyrix CPU Detection Guide (Preliminary
137		   Rev. 1.01 table 1), so we'll check the value of eax for
138		   CPUID/0 to see if standard CPUID level 2 is supported.
139		   According to the table, the only CPU which supports level
140		   2 is also the only one which supports extended CPUID levels.
141		*/
142		"cmpl $0x2, %%eax\n\t"
143		"jne MMXtest\n\t"	/* Use standard CPUID instead */
144
145		/* Extended CPUID supported (in theory), so get extended
146		   features */
147		"movl $0x80000001, %%eax\n\t"
148		"cpuid\n\t"
149		"testl $0x00800000, %%eax\n\t"	/* Test for MMX */
150		"jz NotSupported5\n\t"		/* MMX not supported */
151		"testl $0x01000000, %%eax\n\t"	/* Test for Ext'd MMX */
152		"jnz EMMXSupported\n\t"
153		"movl $1, %0\n\n\t"		/* MMX Supported */
154		"jmp Return\n\n"
155		"EMMXSupported:\n\t"
156		"movl $3, %0\n\n\t"		/* EMMX and MMX Supported */
157		"jmp Return\n\t"
158
159
160		/* AMD Section */
161		"AMD:\n\t"
162
163		/* See if extended CPUID is supported */
164		"movl $0x80000000, %%eax\n\t"
165		"cpuid\n\t"
166		"cmpl $0x80000000, %%eax\n\t"
167		"jl MMXtest\n\t"	/* Use standard CPUID instead */
168
169		/* Extended CPUID supported, so get extended features */
170		"movl $0x80000001, %%eax\n\t"
171		"cpuid\n\t"
172		"testl $0x00800000, %%edx\n\t"	/* Test for MMX */
173		"jz NotSupported6\n\t"		/* MMX not supported */
174		"testl $0x80000000, %%edx\n\t"	/* Test for 3DNow! */
175		"jnz ThreeDNowSupported\n\t"
176		"movl $1, %0\n\n\t"		/* MMX Supported */
177		"jmp Return\n\n"
178		"ThreeDNowSupported:\n\t"
179		"testl $0x40000000, %%edx\n\t" /* Test AMD Extended MMX */
180		"jnz AMDXMMXSupported\n\t"
181		"movl $5, %0\n\n\t"		/* 3DNow! and MMX Supported */
182		"jmp Return\n\t"
183		"AMDXMMXSupported:\n\t"
184		"movl $13, %0\n\n\t"		/* XMMX, 3DNow! and MMX Supported */
185		"jmp Return\n\t"
186
187
188		/* Intel Section */
189		"Intel:\n\t"
190
191		/* Check for MMX */
192		"MMXtest:\n\t"
193		"movl $1, %%eax\n\t"
194		"cpuid\n\t"
195		"testl $0x00800000, %%edx\n\t"	/* Test for MMX */
196		"jz NotSupported7\n\t"		/* MMX Not supported */
197		"movl $1, %0\n\n\t"		/* MMX Supported */
198		"jmp Return\n\t"
199
200		/* Nothing supported */
201		"\nNotSupported1:\n\t"
202		"#movl $101, %0\n\n\t"
203		"\nNotSupported2:\n\t"
204		"#movl $102, %0\n\n\t"
205		"\nNotSupported3:\n\t"
206		"#movl $103, %0\n\n\t"
207		"\nNotSupported4:\n\t"
208		"#movl $104, %0\n\n\t"
209		"\nNotSupported5:\n\t"
210		"#movl $105, %0\n\n\t"
211		"\nNotSupported6:\n\t"
212		"#movl $106, %0\n\n\t"
213		"\nNotSupported7:\n\t"
214		"#movl $107, %0\n\n\t"
215		"movl $0, %0\n\n\t"
216
217		"Return:\n\t"
218    "popl %%ebx\n\t"
219		: "=X" (rval)
220		: /* no input */
221		: "eax", "ecx", "edx"
222	);
223
224	/* Return */
225	return(rval);
226}
227
228/*	Function to test if mmx instructions are supported...
229*/
230static inline int
231mmx_ok(void)
232{
233	/* Returns 1 if MMX instructions are supported, 0 otherwise */
234	return ( mm_support() & 0x1 );
235}
236
237int mmx_supported (void);
238int xmmx_supported (void);
239
240
241/* MMX optimized implementations */
242void draw_line_mmx (Pixel *data, int x1, int y1, int x2, int y2, int col, int screenx, int screeny);
243void draw_line_xmmx (Pixel *data, int x1, int y1, int x2, int y2, int col, int screenx, int screeny);
244void zoom_filter_mmx (int prevX, int prevY, Pixel *expix1, Pixel *expix2,
245		      int *brutS, int *brutD, int buffratio, int precalCoef[16][16]);
246void zoom_filter_xmmx (int prevX, int prevY, Pixel *expix1, Pixel *expix2,
247                       int *lbruS, int *lbruD, int buffratio, int precalCoef[16][16]);
248
249
250/*	Helper functions for the instruction macros that follow...
251	(note that memory-to-register, m2r, instructions are nearly
252	 as efficient as register-to-register, r2r, instructions;
253	 however, memory-to-memory instructions are really simulated
254	 as a convenience, and are only 1/3 as efficient)
255*/
256#ifdef	MMX_TRACE
257
258/*	Include the stuff for printing a trace to stderr...
259*/
260
261#include <stdio.h>
262
263#define	mmx_i2r(op, imm, reg) \
264	{ \
265		mmx_t mmx_trace; \
266		mmx_trace.uq = (imm); \
267		printf(#op "_i2r(" #imm "=0x%08x%08x, ", \
268			mmx_trace.d[1], mmx_trace.d[0]); \
269		__asm__ __volatile__ ("movq %%" #reg ", %0" \
270				      : "=X" (mmx_trace) \
271				      : /* nothing */ ); \
272		printf(#reg "=0x%08x%08x) => ", \
273			mmx_trace.d[1], mmx_trace.d[0]); \
274		__asm__ __volatile__ (#op " %0, %%" #reg \
275				      : /* nothing */ \
276				      : "X" (imm)); \
277		__asm__ __volatile__ ("movq %%" #reg ", %0" \
278				      : "=X" (mmx_trace) \
279				      : /* nothing */ ); \
280		printf(#reg "=0x%08x%08x\n", \
281			mmx_trace.d[1], mmx_trace.d[0]); \
282	}
283
284#define	mmx_m2r(op, mem, reg) \
285	{ \
286		mmx_t mmx_trace; \
287		mmx_trace = (mem); \
288		printf(#op "_m2r(" #mem "=0x%08x%08x, ", \
289			mmx_trace.d[1], mmx_trace.d[0]); \
290		__asm__ __volatile__ ("movq %%" #reg ", %0" \
291				      : "=X" (mmx_trace) \
292				      : /* nothing */ ); \
293		printf(#reg "=0x%08x%08x) => ", \
294			mmx_trace.d[1], mmx_trace.d[0]); \
295		__asm__ __volatile__ (#op " %0, %%" #reg \
296				      : /* nothing */ \
297				      : "m" (mem)); \
298		__asm__ __volatile__ ("movq %%" #reg ", %0" \
299				      : "=X" (mmx_trace) \
300				      : /* nothing */ ); \
301		printf(#reg "=0x%08x%08x\n", \
302			mmx_trace.d[1], mmx_trace.d[0]); \
303	}
304
305#define	mmx_r2m(op, reg, mem) \
306	{ \
307		mmx_t mmx_trace; \
308		__asm__ __volatile__ ("movq %%" #reg ", %0" \
309				      : "=X" (mmx_trace) \
310				      : /* nothing */ ); \
311		printf(#op "_r2m(" #reg "=0x%08x%08x, ", \
312			mmx_trace.d[1], mmx_trace.d[0]); \
313		mmx_trace = (mem); \
314		printf(#mem "=0x%08x%08x) => ", \
315			mmx_trace.d[1], mmx_trace.d[0]); \
316		__asm__ __volatile__ (#op " %%" #reg ", %0" \
317				      : "=m" (mem) \
318				      : /* nothing */ ); \
319		mmx_trace = (mem); \
320		printf(#mem "=0x%08x%08x\n", \
321			mmx_trace.d[1], mmx_trace.d[0]); \
322	}
323
324#define	mmx_r2r(op, regs, regd) \
325	{ \
326		mmx_t mmx_trace; \
327		__asm__ __volatile__ ("movq %%" #regs ", %0" \
328				      : "=X" (mmx_trace) \
329				      : /* nothing */ ); \
330		printf(#op "_r2r(" #regs "=0x%08x%08x, ", \
331			mmx_trace.d[1], mmx_trace.d[0]); \
332		__asm__ __volatile__ ("movq %%" #regd ", %0" \
333				      : "=X" (mmx_trace) \
334				      : /* nothing */ ); \
335		printf(#regd "=0x%08x%08x) => ", \
336			mmx_trace.d[1], mmx_trace.d[0]); \
337		__asm__ __volatile__ (#op " %" #regs ", %" #regd); \
338		__asm__ __volatile__ ("movq %%" #regd ", %0" \
339				      : "=X" (mmx_trace) \
340				      : /* nothing */ ); \
341		printf(#regd "=0x%08x%08x\n", \
342			mmx_trace.d[1], mmx_trace.d[0]); \
343	}
344
345#define	mmx_m2m(op, mems, memd) \
346	{ \
347		mmx_t mmx_trace; \
348		mmx_trace = (mems); \
349		printf(#op "_m2m(" #mems "=0x%08x%08x, ", \
350			mmx_trace.d[1], mmx_trace.d[0]); \
351		mmx_trace = (memd); \
352		printf(#memd "=0x%08x%08x) => ", \
353			mmx_trace.d[1], mmx_trace.d[0]); \
354		__asm__ __volatile__ ("movq %0, %%mm0\n\t" \
355				      #op " %1, %%mm0\n\t" \
356				      "movq %%mm0, %0" \
357				      : "=m" (memd) \
358				      : "m" (mems)); \
359		mmx_trace = (memd); \
360		printf(#memd "=0x%08x%08x\n", \
361			mmx_trace.d[1], mmx_trace.d[0]); \
362	}
363
364#else
365
366/*	These macros are a lot simpler without the tracing...
367*/
368
369#define	mmx_i2r(op, imm, reg) \
370	__asm__ __volatile__ (#op " %0, %%" #reg \
371			      : /* nothing */ \
372			      : "X" (imm) )
373
374#define	mmx_m2r(op, mem, reg) \
375	__asm__ __volatile__ (#op " %0, %%" #reg \
376			      : /* nothing */ \
377			      : "m" (mem))
378
379#define	mmx_r2m(op, reg, mem) \
380	__asm__ __volatile__ (#op " %%" #reg ", %0" \
381			      : "=m" (mem) \
382			      : /* nothing */ )
383
384#define	mmx_r2r(op, regs, regd) \
385	__asm__ __volatile__ (#op " %" #regs ", %" #regd)
386
387#define	mmx_m2m(op, mems, memd) \
388	__asm__ __volatile__ ("movq %0, %%mm0\n\t" \
389			      #op " %1, %%mm0\n\t" \
390			      "movq %%mm0, %0" \
391			      : "=m" (memd) \
392			      : "m" (mems))
393
394#endif
395
396
397/*	1x64 MOVe Quadword
398	(this is both a load and a store...
399	 in fact, it is the only way to store)
400*/
401#define	movq_m2r(var, reg)	mmx_m2r(movq, var, reg)
402#define	movq_r2m(reg, var)	mmx_r2m(movq, reg, var)
403#define	movq_r2r(regs, regd)	mmx_r2r(movq, regs, regd)
404#define	movq(vars, vard) \
405	__asm__ __volatile__ ("movq %1, %%mm0\n\t" \
406			      "movq %%mm0, %0" \
407			      : "=X" (vard) \
408			      : "X" (vars))
409
410
411/*	1x32 MOVe Doubleword
412	(like movq, this is both load and store...
413	 but is most useful for moving things between
414	 mmx registers and ordinary registers)
415*/
416#define	movd_m2r(var, reg)	mmx_m2r(movd, var, reg)
417#define	movd_r2m(reg, var)	mmx_r2m(movd, reg, var)
418#define	movd_r2r(regs, regd)	mmx_r2r(movd, regs, regd)
419#define	movd(vars, vard) \
420	__asm__ __volatile__ ("movd %1, %%mm0\n\t" \
421			      "movd %%mm0, %0" \
422			      : "=X" (vard) \
423			      : "X" (vars))
424
425
426/*	2x32, 4x16, and 8x8 Parallel ADDs
427*/
428#define	paddd_m2r(var, reg)	mmx_m2r(paddd, var, reg)
429#define	paddd_r2r(regs, regd)	mmx_r2r(paddd, regs, regd)
430#define	paddd(vars, vard)	mmx_m2m(paddd, vars, vard)
431
432#define	paddw_m2r(var, reg)	mmx_m2r(paddw, var, reg)
433#define	paddw_r2r(regs, regd)	mmx_r2r(paddw, regs, regd)
434#define	paddw(vars, vard)	mmx_m2m(paddw, vars, vard)
435
436#define	paddb_m2r(var, reg)	mmx_m2r(paddb, var, reg)
437#define	paddb_r2r(regs, regd)	mmx_r2r(paddb, regs, regd)
438#define	paddb(vars, vard)	mmx_m2m(paddb, vars, vard)
439
440
441/*	4x16 and 8x8 Parallel ADDs using Saturation arithmetic
442*/
443#define	paddsw_m2r(var, reg)	mmx_m2r(paddsw, var, reg)
444#define	paddsw_r2r(regs, regd)	mmx_r2r(paddsw, regs, regd)
445#define	paddsw(vars, vard)	mmx_m2m(paddsw, vars, vard)
446
447#define	paddsb_m2r(var, reg)	mmx_m2r(paddsb, var, reg)
448#define	paddsb_r2r(regs, regd)	mmx_r2r(paddsb, regs, regd)
449#define	paddsb(vars, vard)	mmx_m2m(paddsb, vars, vard)
450
451
452/*	4x16 and 8x8 Parallel ADDs using Unsigned Saturation arithmetic
453*/
454#define	paddusw_m2r(var, reg)	mmx_m2r(paddusw, var, reg)
455#define	paddusw_r2r(regs, regd)	mmx_r2r(paddusw, regs, regd)
456#define	paddusw(vars, vard)	mmx_m2m(paddusw, vars, vard)
457
458#define	paddusb_m2r(var, reg)	mmx_m2r(paddusb, var, reg)
459#define	paddusb_r2r(regs, regd)	mmx_r2r(paddusb, regs, regd)
460#define	paddusb(vars, vard)	mmx_m2m(paddusb, vars, vard)
461
462
463/*	2x32, 4x16, and 8x8 Parallel SUBs
464*/
465#define	psubd_m2r(var, reg)	mmx_m2r(psubd, var, reg)
466#define	psubd_r2r(regs, regd)	mmx_r2r(psubd, regs, regd)
467#define	psubd(vars, vard)	mmx_m2m(psubd, vars, vard)
468
469#define	psubw_m2r(var, reg)	mmx_m2r(psubw, var, reg)
470#define	psubw_r2r(regs, regd)	mmx_r2r(psubw, regs, regd)
471#define	psubw(vars, vard)	mmx_m2m(psubw, vars, vard)
472
473#define	psubb_m2r(var, reg)	mmx_m2r(psubb, var, reg)
474#define	psubb_r2r(regs, regd)	mmx_r2r(psubb, regs, regd)
475#define	psubb(vars, vard)	mmx_m2m(psubb, vars, vard)
476
477
478/*	4x16 and 8x8 Parallel SUBs using Saturation arithmetic
479*/
480#define	psubsw_m2r(var, reg)	mmx_m2r(psubsw, var, reg)
481#define	psubsw_r2r(regs, regd)	mmx_r2r(psubsw, regs, regd)
482#define	psubsw(vars, vard)	mmx_m2m(psubsw, vars, vard)
483
484#define	psubsb_m2r(var, reg)	mmx_m2r(psubsb, var, reg)
485#define	psubsb_r2r(regs, regd)	mmx_r2r(psubsb, regs, regd)
486#define	psubsb(vars, vard)	mmx_m2m(psubsb, vars, vard)
487
488
489/*	4x16 and 8x8 Parallel SUBs using Unsigned Saturation arithmetic
490*/
491#define	psubusw_m2r(var, reg)	mmx_m2r(psubusw, var, reg)
492#define	psubusw_r2r(regs, regd)	mmx_r2r(psubusw, regs, regd)
493#define	psubusw(vars, vard)	mmx_m2m(psubusw, vars, vard)
494
495#define	psubusb_m2r(var, reg)	mmx_m2r(psubusb, var, reg)
496#define	psubusb_r2r(regs, regd)	mmx_r2r(psubusb, regs, regd)
497#define	psubusb(vars, vard)	mmx_m2m(psubusb, vars, vard)
498
499
500/*	4x16 Parallel MULs giving Low 4x16 portions of results
501*/
502#define	pmullw_m2r(var, reg)	mmx_m2r(pmullw, var, reg)
503#define	pmullw_r2r(regs, regd)	mmx_r2r(pmullw, regs, regd)
504#define	pmullw(vars, vard)	mmx_m2m(pmullw, vars, vard)
505
506
507/*	4x16 Parallel MULs giving High 4x16 portions of results
508*/
509#define	pmulhw_m2r(var, reg)	mmx_m2r(pmulhw, var, reg)
510#define	pmulhw_r2r(regs, regd)	mmx_r2r(pmulhw, regs, regd)
511#define	pmulhw(vars, vard)	mmx_m2m(pmulhw, vars, vard)
512
513
514/*	4x16->2x32 Parallel Mul-ADD
515	(muls like pmullw, then adds adjacent 16-bit fields
516	 in the multiply result to make the final 2x32 result)
517*/
518#define	pmaddwd_m2r(var, reg)	mmx_m2r(pmaddwd, var, reg)
519#define	pmaddwd_r2r(regs, regd)	mmx_r2r(pmaddwd, regs, regd)
520#define	pmaddwd(vars, vard)	mmx_m2m(pmaddwd, vars, vard)
521
522
523/*	1x64 bitwise AND
524*/
525#ifdef	BROKEN_PAND
526#define	pand_m2r(var, reg) \
527	{ \
528		mmx_m2r(pandn, (mmx_t) -1LL, reg); \
529		mmx_m2r(pandn, var, reg); \
530	}
531#define	pand_r2r(regs, regd) \
532	{ \
533		mmx_m2r(pandn, (mmx_t) -1LL, regd); \
534		mmx_r2r(pandn, regs, regd) \
535	}
536#define	pand(vars, vard) \
537	{ \
538		movq_m2r(vard, mm0); \
539		mmx_m2r(pandn, (mmx_t) -1LL, mm0); \
540		mmx_m2r(pandn, vars, mm0); \
541		movq_r2m(mm0, vard); \
542	}
543#else
544#define	pand_m2r(var, reg)	mmx_m2r(pand, var, reg)
545#define	pand_r2r(regs, regd)	mmx_r2r(pand, regs, regd)
546#define	pand(vars, vard)	mmx_m2m(pand, vars, vard)
547#endif
548
549
550/*	1x64 bitwise AND with Not the destination
551*/
552#define	pandn_m2r(var, reg)	mmx_m2r(pandn, var, reg)
553#define	pandn_r2r(regs, regd)	mmx_r2r(pandn, regs, regd)
554#define	pandn(vars, vard)	mmx_m2m(pandn, vars, vard)
555
556
557/*	1x64 bitwise OR
558*/
559#define	por_m2r(var, reg)	mmx_m2r(por, var, reg)
560#define	por_r2r(regs, regd)	mmx_r2r(por, regs, regd)
561#define	por(vars, vard)	mmx_m2m(por, vars, vard)
562
563
564/*	1x64 bitwise eXclusive OR
565*/
566#define	pxor_m2r(var, reg)	mmx_m2r(pxor, var, reg)
567#define	pxor_r2r(regs, regd)	mmx_r2r(pxor, regs, regd)
568#define	pxor(vars, vard)	mmx_m2m(pxor, vars, vard)
569
570
571/*	2x32, 4x16, and 8x8 Parallel CoMPare for EQuality
572	(resulting fields are either 0 or -1)
573*/
574#define	pcmpeqd_m2r(var, reg)	mmx_m2r(pcmpeqd, var, reg)
575#define	pcmpeqd_r2r(regs, regd)	mmx_r2r(pcmpeqd, regs, regd)
576#define	pcmpeqd(vars, vard)	mmx_m2m(pcmpeqd, vars, vard)
577
578#define	pcmpeqw_m2r(var, reg)	mmx_m2r(pcmpeqw, var, reg)
579#define	pcmpeqw_r2r(regs, regd)	mmx_r2r(pcmpeqw, regs, regd)
580#define	pcmpeqw(vars, vard)	mmx_m2m(pcmpeqw, vars, vard)
581
582#define	pcmpeqb_m2r(var, reg)	mmx_m2r(pcmpeqb, var, reg)
583#define	pcmpeqb_r2r(regs, regd)	mmx_r2r(pcmpeqb, regs, regd)
584#define	pcmpeqb(vars, vard)	mmx_m2m(pcmpeqb, vars, vard)
585
586
587/*	2x32, 4x16, and 8x8 Parallel CoMPare for Greater Than
588	(resulting fields are either 0 or -1)
589*/
590#define	pcmpgtd_m2r(var, reg)	mmx_m2r(pcmpgtd, var, reg)
591#define	pcmpgtd_r2r(regs, regd)	mmx_r2r(pcmpgtd, regs, regd)
592#define	pcmpgtd(vars, vard)	mmx_m2m(pcmpgtd, vars, vard)
593
594#define	pcmpgtw_m2r(var, reg)	mmx_m2r(pcmpgtw, var, reg)
595#define	pcmpgtw_r2r(regs, regd)	mmx_r2r(pcmpgtw, regs, regd)
596#define	pcmpgtw(vars, vard)	mmx_m2m(pcmpgtw, vars, vard)
597
598#define	pcmpgtb_m2r(var, reg)	mmx_m2r(pcmpgtb, var, reg)
599#define	pcmpgtb_r2r(regs, regd)	mmx_r2r(pcmpgtb, regs, regd)
600#define	pcmpgtb(vars, vard)	mmx_m2m(pcmpgtb, vars, vard)
601
602
603/*	1x64, 2x32, and 4x16 Parallel Shift Left Logical
604*/
605#define	psllq_i2r(imm, reg)	mmx_i2r(psllq, imm, reg)
606#define	psllq_m2r(var, reg)	mmx_m2r(psllq, var, reg)
607#define	psllq_r2r(regs, regd)	mmx_r2r(psllq, regs, regd)
608#define	psllq(vars, vard)	mmx_m2m(psllq, vars, vard)
609
610#define	pslld_i2r(imm, reg)	mmx_i2r(pslld, imm, reg)
611#define	pslld_m2r(var, reg)	mmx_m2r(pslld, var, reg)
612#define	pslld_r2r(regs, regd)	mmx_r2r(pslld, regs, regd)
613#define	pslld(vars, vard)	mmx_m2m(pslld, vars, vard)
614
615#define	psllw_i2r(imm, reg)	mmx_i2r(psllw, imm, reg)
616#define	psllw_m2r(var, reg)	mmx_m2r(psllw, var, reg)
617#define	psllw_r2r(regs, regd)	mmx_r2r(psllw, regs, regd)
618#define	psllw(vars, vard)	mmx_m2m(psllw, vars, vard)
619
620
621/*	1x64, 2x32, and 4x16 Parallel Shift Right Logical
622*/
623#define	psrlq_i2r(imm, reg)	mmx_i2r(psrlq, imm, reg)
624#define	psrlq_m2r(var, reg)	mmx_m2r(psrlq, var, reg)
625#define	psrlq_r2r(regs, regd)	mmx_r2r(psrlq, regs, regd)
626#define	psrlq(vars, vard)	mmx_m2m(psrlq, vars, vard)
627
628#define	psrld_i2r(imm, reg)	mmx_i2r(psrld, imm, reg)
629#define	psrld_m2r(var, reg)	mmx_m2r(psrld, var, reg)
630#define	psrld_r2r(regs, regd)	mmx_r2r(psrld, regs, regd)
631#define	psrld(vars, vard)	mmx_m2m(psrld, vars, vard)
632
633#define	psrlw_i2r(imm, reg)	mmx_i2r(psrlw, imm, reg)
634#define	psrlw_m2r(var, reg)	mmx_m2r(psrlw, var, reg)
635#define	psrlw_r2r(regs, regd)	mmx_r2r(psrlw, regs, regd)
636#define	psrlw(vars, vard)	mmx_m2m(psrlw, vars, vard)
637
638
639/*	2x32 and 4x16 Parallel Shift Right Arithmetic
640*/
641#define	psrad_i2r(imm, reg)	mmx_i2r(psrad, imm, reg)
642#define	psrad_m2r(var, reg)	mmx_m2r(psrad, var, reg)
643#define	psrad_r2r(regs, regd)	mmx_r2r(psrad, regs, regd)
644#define	psrad(vars, vard)	mmx_m2m(psrad, vars, vard)
645
646#define	psraw_i2r(imm, reg)	mmx_i2r(psraw, imm, reg)
647#define	psraw_m2r(var, reg)	mmx_m2r(psraw, var, reg)
648#define	psraw_r2r(regs, regd)	mmx_r2r(psraw, regs, regd)
649#define	psraw(vars, vard)	mmx_m2m(psraw, vars, vard)
650
651
652/*	2x32->4x16 and 4x16->8x8 PACK and Signed Saturate
653	(packs source and dest fields into dest in that order)
654*/
655#define	packssdw_m2r(var, reg)	mmx_m2r(packssdw, var, reg)
656#define	packssdw_r2r(regs, regd) mmx_r2r(packssdw, regs, regd)
657#define	packssdw(vars, vard)	mmx_m2m(packssdw, vars, vard)
658
659#define	packsswb_m2r(var, reg)	mmx_m2r(packsswb, var, reg)
660#define	packsswb_r2r(regs, regd) mmx_r2r(packsswb, regs, regd)
661#define	packsswb(vars, vard)	mmx_m2m(packsswb, vars, vard)
662
663
664/*	4x16->8x8 PACK and Unsigned Saturate
665	(packs source and dest fields into dest in that order)
666*/
667#define	packuswb_m2r(var, reg)	mmx_m2r(packuswb, var, reg)
668#define	packuswb_r2r(regs, regd) mmx_r2r(packuswb, regs, regd)
669#define	packuswb(vars, vard)	mmx_m2m(packuswb, vars, vard)
670
671
672/*	2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK Low
673	(interleaves low half of dest with low half of source
674	 as padding in each result field)
675*/
676#define	punpckldq_m2r(var, reg)	mmx_m2r(punpckldq, var, reg)
677#define	punpckldq_r2r(regs, regd) mmx_r2r(punpckldq, regs, regd)
678#define	punpckldq(vars, vard)	mmx_m2m(punpckldq, vars, vard)
679
680#define	punpcklwd_m2r(var, reg)	mmx_m2r(punpcklwd, var, reg)
681#define	punpcklwd_r2r(regs, regd) mmx_r2r(punpcklwd, regs, regd)
682#define	punpcklwd(vars, vard)	mmx_m2m(punpcklwd, vars, vard)
683
684#define	punpcklbw_m2r(var, reg)	mmx_m2r(punpcklbw, var, reg)
685#define	punpcklbw_r2r(regs, regd) mmx_r2r(punpcklbw, regs, regd)
686#define	punpcklbw(vars, vard)	mmx_m2m(punpcklbw, vars, vard)
687
688
689/*	2x32->1x64, 4x16->2x32, and 8x8->4x16 UNPaCK High
690	(interleaves high half of dest with high half of source
691	 as padding in each result field)
692*/
693#define	punpckhdq_m2r(var, reg)	mmx_m2r(punpckhdq, var, reg)
694#define	punpckhdq_r2r(regs, regd) mmx_r2r(punpckhdq, regs, regd)
695#define	punpckhdq(vars, vard)	mmx_m2m(punpckhdq, vars, vard)
696
697#define	punpckhwd_m2r(var, reg)	mmx_m2r(punpckhwd, var, reg)
698#define	punpckhwd_r2r(regs, regd) mmx_r2r(punpckhwd, regs, regd)
699#define	punpckhwd(vars, vard)	mmx_m2m(punpckhwd, vars, vard)
700
701#define	punpckhbw_m2r(var, reg)	mmx_m2r(punpckhbw, var, reg)
702#define	punpckhbw_r2r(regs, regd) mmx_r2r(punpckhbw, regs, regd)
703#define	punpckhbw(vars, vard)	mmx_m2m(punpckhbw, vars, vard)
704
705
706/*	Empty MMx State
707	(used to clean-up when going from mmx to float use
708	 of the registers that are shared by both; note that
709	 there is no float-to-mmx operation needed, because
710	 only the float tag word info is corruptible)
711*/
712#ifdef	MMX_TRACE
713
714#define	emms() \
715	{ \
716		printf("emms()\n"); \
717		__asm__ __volatile__ ("emms" \
718                        "st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)"); \
719	}
720
721#else
722
723#define	emms() __asm__ __volatile__ ("emms"::: \
724                      "st(1)","st(2)","st(3)","st(4)","st(5)","st(6)","st(7)")
725
726#endif
727
728#endif
729