/sys/arm/stm32l031x6/rtc_test/u8x8cb.c

https://github.com/olikraus/u8g2 · C · 112 lines · 62 code · 13 blank · 37 comment · 5 complexity · 166c4ad91e75437abb6993af3728fe85 MD5 · raw file 

    

  1. /*
    2. 

  2.   u8x8cb.c
    3. 

  3.   
    4. 

  4.   STM32L031
    5. 

  5.   
    6. 

  6.   PA9: Clock
    7. 

  7.   PA10: Data
    8. 

  8.   Both lines have a pullup resistor
    9. 

  9.   
    10. 

  10. */
    11. 

  11. 

  12. #include "stm32l031xx.h"
    13. 

  13. #include "delay.h"
    14. 

  14. #include "u8x8.h"
    15. 

  15. 

  16. 

  17. uint8_t u8x8_gpio_and_delay_stm32l0(u8x8_t *u8x8, uint8_t msg, uint8_t arg_int, void *arg_ptr)
    18. 

  18. {
    19. 

  19.   switch(msg)
    20. 

  20.   {
    21. 

  21.     case U8X8_MSG_GPIO_AND_DELAY_INIT:
    22. 

  22.       /* only support for software I2C*/
    23. 

  23.     
    24. 

  24.       RCC->IOPENR |= RCC_IOPENR_IOPAEN;		/* Enable clock for GPIO Port A */
    25. 

  25.       __NOP();
    26. 

  26.       __NOP();
    27. 

  27.       
    28. 

  28.       GPIOA->MODER &= ~GPIO_MODER_MODE10;	/* clear mode for PA10 */
    29. 

  29.       //GPIOA->MODER |= GPIO_MODER_MODE10_0;	/* Output mode for PA10 */
    30. 

  30.       GPIOA->OTYPER &= ~GPIO_OTYPER_OT_10;	/* no open drain for PA10 */
    31. 

  31.       GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED10;	/* low speed for PA10 */
    32. 

  32.       GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD10;	/* no pullup/pulldown for PA10 */
    33. 

  33.       //GPIOA->BSRR = GPIO_BSRR_BS_10;		/* atomic set PA10 */
    34. 

  34.     
    35. 

  35.       GPIOA->MODER &= ~GPIO_MODER_MODE9;	/* clear mode for PA9 */
    36. 

  36.       //GPIOA->MODER |= GPIO_MODER_MODE9_0;	/* Output mode for PA9 */
    37. 

  37.       GPIOA->OTYPER &= ~GPIO_OTYPER_OT_9;	/* no open drain for PA9 */
    38. 

  38.       GPIOA->OSPEEDR &= ~GPIO_OSPEEDER_OSPEED9;	/* low speed for PA9 */
    39. 

  39.       GPIOA->PUPDR &= ~GPIO_PUPDR_PUPD9;	/* no pullup/pulldown for PA9 */
    40. 

  40.       //GPIOA->BSRR = GPIO_BSRR_BS_9;		/* atomic set PA9 */
    41. 

  41.         
    42. 

  42.       break;
    43. 

  43.     case U8X8_MSG_DELAY_NANO:
    44. 

  44.       /* not required for SW I2C */
    45. 

  45.       break;
    46. 

  46.     
    47. 

  47.     case U8X8_MSG_DELAY_10MICRO:
    48. 

  48.       /* not used at the moment */
    49. 

  49.       break;
    50. 

  50.     
    51. 

  51.     case U8X8_MSG_DELAY_100NANO:
    52. 

  52.       /* not used at the moment */
    53. 

  53.       break;
    54. 

  54.    
    55. 

  55.     case U8X8_MSG_DELAY_MILLI:
    56. 

  56.       delay_micro_seconds(arg_int*1000UL);
    57. 

  57.       break;
    58. 

  58.     case U8X8_MSG_DELAY_I2C:
    59. 

  59.       /* arg_int is 1 or 4: 100KHz (5us) or 400KHz (1.25us) */
    60. 

  60.       delay_micro_seconds(arg_int<=2?5:1);
    61. 

  61.       break;
    62. 

  62.     
    63. 

  63.     case U8X8_MSG_GPIO_I2C_CLOCK:
    64. 

  64.       
    65. 

  65.       if ( arg_int == 0 )
    66. 

  66.       {
    67. 

  67. 	GPIOA->MODER &= ~GPIO_MODER_MODE9;	/* clear mode for PA10 */
    68. 

  68. 	GPIOA->MODER |= GPIO_MODER_MODE9_0;	/* Output mode for PA10 */
    69. 

  69. 	GPIOA->BSRR = GPIO_BSRR_BR_9;		/* atomic clr PA9 */
    70. 

  70.       }
    71. 

  71.       else
    72. 

  72.       {
    73. 

  73. 	//GPIOA->BSRR = GPIO_BSRR_BS_9;		/* atomic set PA9 */
    74. 

  74. 	GPIOA->MODER &= ~GPIO_MODER_MODE9;	/* clear mode for PA9: input mode */
    75. 

  75.       }
    76. 

  76.       break;
    77. 

  77.     case U8X8_MSG_GPIO_I2C_DATA:
    78. 

  78.       
    79. 

  79.       if ( arg_int == 0 )
    80. 

  80.       {
    81. 

  81. 	GPIOA->MODER &= ~GPIO_MODER_MODE10;	/* clear mode for PA10 */
    82. 

  82. 	GPIOA->MODER |= GPIO_MODER_MODE10_0;	/* Output mode for PA10 */
    83. 

  83. 	GPIOA->BSRR = GPIO_BSRR_BR_10;		/* atomic clr PA10 */
    84. 

  84.       }
    85. 

  85.       else
    86. 

  86.       {
    87. 

  87. 	//GPIOA->BSRR = GPIO_BSRR_BS_10;		/* atomic set PA10 */
    88. 

  88. 	// input mode
    89. 

  89. 	GPIOA->MODER &= ~GPIO_MODER_MODE10;	/* clear mode for PA10: input mode */
    90. 

  90.       }
    91. 

  91.       break;
    92. 

  92. /*
    93. 

  93.     case U8X8_MSG_GPIO_MENU_SELECT:
    94. 

  94.       u8x8_SetGPIOResult(u8x8, Chip_GPIO_GetPinState(LPC_GPIO, KEY_SELECT_PORT, KEY_SELECT_PIN));
    95. 

  95.       break;
    96. 

  96.     case U8X8_MSG_GPIO_MENU_NEXT:
    97. 

  97.       u8x8_SetGPIOResult(u8x8, Chip_GPIO_GetPinState(LPC_GPIO, KEY_NEXT_PORT, KEY_NEXT_PIN));
    98. 

  98.       break;
    99. 

  99.     case U8X8_MSG_GPIO_MENU_PREV:
    100. 

  100.       u8x8_SetGPIOResult(u8x8, Chip_GPIO_GetPinState(LPC_GPIO, KEY_PREV_PORT, KEY_PREV_PIN));
    101. 

  101.       break;
    102. 

  102.     
    103. 

  103.     case U8X8_MSG_GPIO_MENU_HOME:
    104. 

  104.       u8x8_SetGPIOResult(u8x8, Chip_GPIO_GetPinState(LPC_GPIO, KEY_HOME_PORT, KEY_HOME_PIN));
    105. 

  105.       break;
    106. 

  106. */
    107. 

  107.     default:
    108. 

  108.       u8x8_SetGPIOResult(u8x8, 1);
    109. 

  109.       break;
    110. 

  110.   }
    111. 

  111.   return 1;
    112. 

  112. }
    113.