/include/linux/spi/spi.h

  1/*
  2 * Copyright (C) 2005 David Brownell
  3 *
  4 * This program is free software; you can redistribute it and/or modify
  5 * it under the terms of the GNU General Public License as published by
  6 * the Free Software Foundation; either version 2 of the License, or
  7 * (at your option) any later version.
  8 *
  9 * This program is distributed in the hope that it will be useful,
 10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 12 * GNU General Public License for more details.
 13 *
 14 * You should have received a copy of the GNU General Public License
 15 * along with this program; if not, write to the Free Software
 16 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 17 */
 18
 19#ifndef __LINUX_SPI_H
 20#define __LINUX_SPI_H
 21
 22#include <linux/device.h>
 23#include <linux/mod_devicetable.h>
 24#include <linux/slab.h>
 25
 26/*
 27 * INTERFACES between SPI master-side drivers and SPI infrastructure.
 28 * (There's no SPI slave support for Linux yet...)
 29 */
 30extern struct bus_type spi_bus_type;
 31
 32/**
 33 * struct spi_device - Master side proxy for an SPI slave device
 34 * @dev: Driver model representation of the device.
 35 * @master: SPI controller used with the device.
 36 * @max_speed_hz: Maximum clock rate to be used with this chip
 37 *	(on this board); may be changed by the device's driver.
 38 *	The spi_transfer.speed_hz can override this for each transfer.
 39 * @chip_select: Chipselect, distinguishing chips handled by @master.
 40 * @mode: The spi mode defines how data is clocked out and in.
 41 *	This may be changed by the device's driver.
 42 *	The "active low" default for chipselect mode can be overridden
 43 *	(by specifying SPI_CS_HIGH) as can the "MSB first" default for
 44 *	each word in a transfer (by specifying SPI_LSB_FIRST).
 45 * @bits_per_word: Data transfers involve one or more words; word sizes
 46 *	like eight or 12 bits are common.  In-memory wordsizes are
 47 *	powers of two bytes (e.g. 20 bit samples use 32 bits).
 48 *	This may be changed by the device's driver, or left at the
 49 *	default (0) indicating protocol words are eight bit bytes.
 50 *	The spi_transfer.bits_per_word can override this for each transfer.
 51 * @irq: Negative, or the number passed to request_irq() to receive
 52 *	interrupts from this device.
 53 * @controller_state: Controller's runtime state
 54 * @controller_data: Board-specific definitions for controller, such as
 55 *	FIFO initialization parameters; from board_info.controller_data
 56 * @modalias: Name of the driver to use with this device, or an alias
 57 *	for that name.  This appears in the sysfs "modalias" attribute
 58 *	for driver coldplugging, and in uevents used for hotplugging
 59 *
 60 * A @spi_device is used to interchange data between an SPI slave
 61 * (usually a discrete chip) and CPU memory.
 62 *
 63 * In @dev, the platform_data is used to hold information about this
 64 * device that's meaningful to the device's protocol driver, but not
 65 * to its controller.  One example might be an identifier for a chip
 66 * variant with slightly different functionality; another might be
 67 * information about how this particular board wires the chip's pins.
 68 */
 69struct spi_device {
 70	struct device		dev;
 71	struct spi_master	*master;
 72	u32			max_speed_hz;
 73	u8			chip_select;
 74	u8			mode;
 75#define	SPI_CPHA	0x01			/* clock phase */
 76#define	SPI_CPOL	0x02			/* clock polarity */
 77#define	SPI_MODE_0	(0|0)			/* (original MicroWire) */
 78#define	SPI_MODE_1	(0|SPI_CPHA)
 79#define	SPI_MODE_2	(SPI_CPOL|0)
 80#define	SPI_MODE_3	(SPI_CPOL|SPI_CPHA)
 81#define	SPI_CS_HIGH	0x04			/* chipselect active high? */
 82#define	SPI_LSB_FIRST	0x08			/* per-word bits-on-wire */
 83#define	SPI_3WIRE	0x10			/* SI/SO signals shared */
 84#define	SPI_LOOP	0x20			/* loopback mode */
 85#define	SPI_NO_CS	0x40			/* 1 dev/bus, no chipselect */
 86#define	SPI_READY	0x80			/* slave pulls low to pause */
 87	u8			bits_per_word;
 88	int			irq;
 89	void			*controller_state;
 90	void			*controller_data;
 91	char			modalias[SPI_NAME_SIZE];
 92
 93	/*
 94	 * likely need more hooks for more protocol options affecting how
 95	 * the controller talks to each chip, like:
 96	 *  - memory packing (12 bit samples into low bits, others zeroed)
 97	 *  - priority
 98	 *  - drop chipselect after each word
 99	 *  - chipselect delays
100	 *  - ...
101	 */
102};
103
104static inline struct spi_device *to_spi_device(struct device *dev)
105{
106	return dev ? container_of(dev, struct spi_device, dev) : NULL;
107}
108
109/* most drivers won't need to care about device refcounting */
110static inline struct spi_device *spi_dev_get(struct spi_device *spi)
111{
112	return (spi && get_device(&spi->dev)) ? spi : NULL;
113}
114
115static inline void spi_dev_put(struct spi_device *spi)
116{
117	if (spi)
118		put_device(&spi->dev);
119}
120
121/* ctldata is for the bus_master driver's runtime state */
122static inline void *spi_get_ctldata(struct spi_device *spi)
123{
124	return spi->controller_state;
125}
126
127static inline void spi_set_ctldata(struct spi_device *spi, void *state)
128{
129	spi->controller_state = state;
130}
131
132/* device driver data */
133
134static inline void spi_set_drvdata(struct spi_device *spi, void *data)
135{
136	dev_set_drvdata(&spi->dev, data);
137}
138
139static inline void *spi_get_drvdata(struct spi_device *spi)
140{
141	return dev_get_drvdata(&spi->dev);
142}
143
144struct spi_message;
145
146
147
148/**
149 * struct spi_driver - Host side "protocol" driver
150 * @id_table: List of SPI devices supported by this driver
151 * @probe: Binds this driver to the spi device.  Drivers can verify
152 *	that the device is actually present, and may need to configure
153 *	characteristics (such as bits_per_word) which weren't needed for
154 *	the initial configuration done during system setup.
155 * @remove: Unbinds this driver from the spi device
156 * @shutdown: Standard shutdown callback used during system state
157 *	transitions such as powerdown/halt and kexec
158 * @suspend: Standard suspend callback used during system state transitions
159 * @resume: Standard resume callback used during system state transitions
160 * @driver: SPI device drivers should initialize the name and owner
161 *	field of this structure.
162 *
163 * This represents the kind of device driver that uses SPI messages to
164 * interact with the hardware at the other end of a SPI link.  It's called
165 * a "protocol" driver because it works through messages rather than talking
166 * directly to SPI hardware (which is what the underlying SPI controller
167 * driver does to pass those messages).  These protocols are defined in the
168 * specification for the device(s) supported by the driver.
169 *
170 * As a rule, those device protocols represent the lowest level interface
171 * supported by a driver, and it will support upper level interfaces too.
172 * Examples of such upper levels include frameworks like MTD, networking,
173 * MMC, RTC, filesystem character device nodes, and hardware monitoring.
174 */
175struct spi_driver {
176	const struct spi_device_id *id_table;
177	int			(*probe)(struct spi_device *spi);
178	int			(*remove)(struct spi_device *spi);
179	void			(*shutdown)(struct spi_device *spi);
180	int			(*suspend)(struct spi_device *spi, pm_message_t mesg);
181	int			(*resume)(struct spi_device *spi);
182	struct device_driver	driver;
183};
184
185static inline struct spi_driver *to_spi_driver(struct device_driver *drv)
186{
187	return drv ? container_of(drv, struct spi_driver, driver) : NULL;
188}
189
190extern int spi_register_driver(struct spi_driver *sdrv);
191
192/**
193 * spi_unregister_driver - reverse effect of spi_register_driver
194 * @sdrv: the driver to unregister
195 * Context: can sleep
196 */
197static inline void spi_unregister_driver(struct spi_driver *sdrv)
198{
199	if (sdrv)
200		driver_unregister(&sdrv->driver);
201}
202
203
204/**
205 * struct spi_master - interface to SPI master controller
206 * @dev: device interface to this driver
207 * @bus_num: board-specific (and often SOC-specific) identifier for a
208 *	given SPI controller.
209 * @num_chipselect: chipselects are used to distinguish individual
210 *	SPI slaves, and are numbered from zero to num_chipselects.
211 *	each slave has a chipselect signal, but it's common that not
212 *	every chipselect is connected to a slave.
213 * @dma_alignment: SPI controller constraint on DMA buffers alignment.
214 * @mode_bits: flags understood by this controller driver
215 * @flags: other constraints relevant to this driver
216 * @setup: updates the device mode and clocking records used by a
217 *	device's SPI controller; protocol code may call this.  This
218 *	must fail if an unrecognized or unsupported mode is requested.
219 *	It's always safe to call this unless transfers are pending on
220 *	the device whose settings are being modified.
221 * @transfer: adds a message to the controller's transfer queue.
222 * @cleanup: frees controller-specific state
223 *
224 * Each SPI master controller can communicate with one or more @spi_device
225 * children.  These make a small bus, sharing MOSI, MISO and SCK signals
226 * but not chip select signals.  Each device may be configured to use a
227 * different clock rate, since those shared signals are ignored unless
228 * the chip is selected.
229 *
230 * The driver for an SPI controller manages access to those devices through
231 * a queue of spi_message transactions, copying data between CPU memory and
232 * an SPI slave device.  For each such message it queues, it calls the
233 * message's completion function when the transaction completes.
234 */
235struct spi_master {
236	struct device	dev;
237
238	/* other than negative (== assign one dynamically), bus_num is fully
239	 * board-specific.  usually that simplifies to being SOC-specific.
240	 * example:  one SOC has three SPI controllers, numbered 0..2,
241	 * and one board's schematics might show it using SPI-2.  software
242	 * would normally use bus_num=2 for that controller.
243	 */
244	s16			bus_num;
245
246	/* chipselects will be integral to many controllers; some others
247	 * might use board-specific GPIOs.
248	 */
249	u16			num_chipselect;
250
251	/* some SPI controllers pose alignment requirements on DMAable
252	 * buffers; let protocol drivers know about these requirements.
253	 */
254	u16			dma_alignment;
255
256	/* spi_device.mode flags understood by this controller driver */
257	u16			mode_bits;
258
259	/* other constraints relevant to this driver */
260	u16			flags;
261#define SPI_MASTER_HALF_DUPLEX	BIT(0)		/* can't do full duplex */
262#define SPI_MASTER_NO_RX	BIT(1)		/* can't do buffer read */
263#define SPI_MASTER_NO_TX	BIT(2)		/* can't do buffer write */
264
265	/* Setup mode and clock, etc (spi driver may call many times).
266	 *
267	 * IMPORTANT:  this may be called when transfers to another
268	 * device are active.  DO NOT UPDATE SHARED REGISTERS in ways
269	 * which could break those transfers.
270	 */
271	int			(*setup)(struct spi_device *spi);
272
273	/* bidirectional bulk transfers
274	 *
275	 * + The transfer() method may not sleep; its main role is
276	 *   just to add the message to the queue.
277	 * + For now there's no remove-from-queue operation, or
278	 *   any other request management
279	 * + To a given spi_device, message queueing is pure fifo
280	 *
281	 * + The master's main job is to process its message queue,
282	 *   selecting a chip then transferring data
283	 * + If there are multiple spi_device children, the i/o queue
284	 *   arbitration algorithm is unspecified (round robin, fifo,
285	 *   priority, reservations, preemption, etc)
286	 *
287	 * + Chipselect stays active during the entire message
288	 *   (unless modified by spi_transfer.cs_change != 0).
289	 * + The message transfers use clock and SPI mode parameters
290	 *   previously established by setup() for this device
291	 */
292	int			(*transfer)(struct spi_device *spi,
293						struct spi_message *mesg);
294
295	/* called on release() to free memory provided by spi_master */
296	void			(*cleanup)(struct spi_device *spi);
297};
298
299static inline void *spi_master_get_devdata(struct spi_master *master)
300{
301	return dev_get_drvdata(&master->dev);
302}
303
304static inline void spi_master_set_devdata(struct spi_master *master, void *data)
305{
306	dev_set_drvdata(&master->dev, data);
307}
308
309static inline struct spi_master *spi_master_get(struct spi_master *master)
310{
311	if (!master || !get_device(&master->dev))
312		return NULL;
313	return master;
314}
315
316static inline void spi_master_put(struct spi_master *master)
317{
318	if (master)
319		put_device(&master->dev);
320}
321
322
323/* the spi driver core manages memory for the spi_master classdev */
324extern struct spi_master *
325spi_alloc_master(struct device *host, unsigned size);
326
327extern int spi_register_master(struct spi_master *master);
328extern void spi_unregister_master(struct spi_master *master);
329
330extern struct spi_master *spi_busnum_to_master(u16 busnum);
331
332/*---------------------------------------------------------------------------*/
333
334/*
335 * I/O INTERFACE between SPI controller and protocol drivers
336 *
337 * Protocol drivers use a queue of spi_messages, each transferring data
338 * between the controller and memory buffers.
339 *
340 * The spi_messages themselves consist of a series of read+write transfer
341 * segments.  Those segments always read the same number of bits as they
342 * write; but one or the other is easily ignored by passing a null buffer
343 * pointer.  (This is unlike most types of I/O API, because SPI hardware
344 * is full duplex.)
345 *
346 * NOTE:  Allocation of spi_transfer and spi_message memory is entirely
347 * up to the protocol driver, which guarantees the integrity of both (as
348 * well as the data buffers) for as long as the message is queued.
349 */
350
351/**
352 * struct spi_transfer - a read/write buffer pair
353 * @tx_buf: data to be written (dma-safe memory), or NULL
354 * @rx_buf: data to be read (dma-safe memory), or NULL
355 * @tx_dma: DMA address of tx_buf, if @spi_message.is_dma_mapped
356 * @rx_dma: DMA address of rx_buf, if @spi_message.is_dma_mapped
357 * @len: size of rx and tx buffers (in bytes)
358 * @speed_hz: Select a speed other than the device default for this
359 *      transfer. If 0 the default (from @spi_device) is used.
360 * @bits_per_word: select a bits_per_word other than the device default
361 *      for this transfer. If 0 the default (from @spi_device) is used.
362 * @cs_change: affects chipselect after this transfer completes
363 * @delay_usecs: microseconds to delay after this transfer before
364 *	(optionally) changing the chipselect status, then starting
365 *	the next transfer or completing this @spi_message.
366 * @transfer_list: transfers are sequenced through @spi_message.transfers
367 *
368 * SPI transfers always write the same number of bytes as they read.
369 * Protocol drivers should always provide @rx_buf and/or @tx_buf.
370 * In some cases, they may also want to provide DMA addresses for
371 * the data being transferred; that may reduce overhead, when the
372 * underlying driver uses dma.
373 *
374 * If the transmit buffer is null, zeroes will be shifted out
375 * while filling @rx_buf.  If the receive buffer is null, the data
376 * shifted in will be discarded.  Only "len" bytes shift out (or in).
377 * It's an error to try to shift out a partial word.  (For example, by
378 * shifting out three bytes with word size of sixteen or twenty bits;
379 * the former uses two bytes per word, the latter uses four bytes.)
380 *
381 * In-memory data values are always in native CPU byte order, translated
382 * from the wire byte order (big-endian except with SPI_LSB_FIRST).  So
383 * for example when bits_per_word is sixteen, buffers are 2N bytes long
384 * (@len = 2N) and hold N sixteen bit words in CPU byte order.
385 *
386 * When the word size of the SPI transfer is not a power-of-two multiple
387 * of eight bits, those in-memory words include extra bits.  In-memory
388 * words are always seen by protocol drivers as right-justified, so the
389 * undefined (rx) or unused (tx) bits are always the most significant bits.
390 *
391 * All SPI transfers start with the relevant chipselect active.  Normally
392 * it stays selected until after the last transfer in a message.  Drivers
393 * can affect the chipselect signal using cs_change.
394 *
395 * (i) If the transfer isn't the last one in the message, this flag is
396 * used to make the chipselect briefly go inactive in the middle of the
397 * message.  Toggling chipselect in this way may be needed to terminate
398 * a chip command, letting a single spi_message perform all of group of
399 * chip transactions together.
400 *
401 * (ii) When the transfer is the last one in the message, the chip may
402 * stay selected until the next transfer.  On multi-device SPI busses
403 * with nothing blocking messages going to other devices, this is just
404 * a performance hint; starting a message to another device deselects
405 * this one.  But in other cases, this can be used to ensure correctness.
406 * Some devices need protocol transactions to be built from a series of
407 * spi_message submissions, where the content of one message is determined
408 * by the results of previous messages and where the whole transaction
409 * ends when the chipselect goes intactive.
410 *
411 * The code that submits an spi_message (and its spi_transfers)
412 * to the lower layers is responsible for managing its memory.
413 * Zero-initialize every field you don't set up explicitly, to
414 * insulate against future API updates.  After you submit a message
415 * and its transfers, ignore them until its completion callback.
416 */
417struct spi_transfer {
418	/* it's ok if tx_buf == rx_buf (right?)
419	 * for MicroWire, one buffer must be null
420	 * buffers must work with dma_*map_single() calls, unless
421	 *   spi_message.is_dma_mapped reports a pre-existing mapping
422	 */
423	const void	*tx_buf;
424	void		*rx_buf;
425	unsigned	len;
426
427	dma_addr_t	tx_dma;
428	dma_addr_t	rx_dma;
429
430	unsigned	cs_change:1;
431	u8		bits_per_word;
432	u16		delay_usecs;
433	u32		speed_hz;
434
435	struct list_head transfer_list;
436};
437
438/**
439 * struct spi_message - one multi-segment SPI transaction
440 * @transfers: list of transfer segments in this transaction
441 * @spi: SPI device to which the transaction is queued
442 * @is_dma_mapped: if true, the caller provided both dma and cpu virtual
443 *	addresses for each transfer buffer
444 * @complete: called to report transaction completions
445 * @context: the argument to complete() when it's called
446 * @actual_length: the total number of bytes that were transferred in all
447 *	successful segments
448 * @status: zero for success, else negative errno
449 * @queue: for use by whichever driver currently owns the message
450 * @state: for use by whichever driver currently owns the message
451 *
452 * A @spi_message is used to execute an atomic sequence of data transfers,
453 * each represented by a struct spi_transfer.  The sequence is "atomic"
454 * in the sense that no other spi_message may use that SPI bus until that
455 * sequence completes.  On some systems, many such sequences can execute as
456 * as single programmed DMA transfer.  On all systems, these messages are
457 * queued, and might complete after transactions to other devices.  Messages
458 * sent to a given spi_device are alway executed in FIFO order.
459 *
460 * The code that submits an spi_message (and its spi_transfers)
461 * to the lower layers is responsible for managing its memory.
462 * Zero-initialize every field you don't set up explicitly, to
463 * insulate against future API updates.  After you submit a message
464 * and its transfers, ignore them until its completion callback.
465 */
466struct spi_message {
467	struct list_head	transfers;
468
469	struct spi_device	*spi;
470
471	unsigned		is_dma_mapped:1;
472
473	/* REVISIT:  we might want a flag affecting the behavior of the
474	 * last transfer ... allowing things like "read 16 bit length L"
475	 * immediately followed by "read L bytes".  Basically imposing
476	 * a specific message scheduling algorithm.
477	 *
478	 * Some controller drivers (message-at-a-time queue processing)
479	 * could provide that as their default scheduling algorithm.  But
480	 * others (with multi-message pipelines) could need a flag to
481	 * tell them about such special cases.
482	 */
483
484	/* completion is reported through a callback */
485	void			(*complete)(void *context);
486	void			*context;
487	unsigned		actual_length;
488	int			status;
489
490	/* for optional use by whatever driver currently owns the
491	 * spi_message ...  between calls to spi_async and then later
492	 * complete(), that's the spi_master controller driver.
493	 */
494	struct list_head	queue;
495	void			*state;
496};
497
498static inline void spi_message_init(struct spi_message *m)
499{
500	memset(m, 0, sizeof *m);
501	INIT_LIST_HEAD(&m->transfers);
502}
503
504static inline void
505spi_message_add_tail(struct spi_transfer *t, struct spi_message *m)
506{
507	list_add_tail(&t->transfer_list, &m->transfers);
508}
509
510static inline void
511spi_transfer_del(struct spi_transfer *t)
512{
513	list_del(&t->transfer_list);
514}
515
516/* It's fine to embed message and transaction structures in other data
517 * structures so long as you don't free them while they're in use.
518 */
519
520static inline struct spi_message *spi_message_alloc(unsigned ntrans, gfp_t flags)
521{
522	struct spi_message *m;
523
524	m = kzalloc(sizeof(struct spi_message)
525			+ ntrans * sizeof(struct spi_transfer),
526			flags);
527	if (m) {
528		int i;
529		struct spi_transfer *t = (struct spi_transfer *)(m + 1);
530
531		INIT_LIST_HEAD(&m->transfers);
532		for (i = 0; i < ntrans; i++, t++)
533			spi_message_add_tail(t, m);
534	}
535	return m;
536}
537
538static inline void spi_message_free(struct spi_message *m)
539{
540	kfree(m);
541}
542
543extern int spi_setup(struct spi_device *spi);
544extern int spi_async(struct spi_device *spi, struct spi_message *message);
545
546/*---------------------------------------------------------------------------*/
547
548/* All these synchronous SPI transfer routines are utilities layered
549 * over the core async transfer primitive.  Here, "synchronous" means
550 * they will sleep uninterruptibly until the async transfer completes.
551 */
552
553extern int spi_sync(struct spi_device *spi, struct spi_message *message);
554
555/**
556 * spi_write - SPI synchronous write
557 * @spi: device to which data will be written
558 * @buf: data buffer
559 * @len: data buffer size
560 * Context: can sleep
561 *
562 * This writes the buffer and returns zero or a negative error code.
563 * Callable only from contexts that can sleep.
564 */
565static inline int
566spi_write(struct spi_device *spi, const u8 *buf, size_t len)
567{
568	struct spi_transfer	t = {
569			.tx_buf		= buf,
570			.len		= len,
571		};
572	struct spi_message	m;
573
574	spi_message_init(&m);
575	spi_message_add_tail(&t, &m);
576	return spi_sync(spi, &m);
577}
578
579/**
580 * spi_read - SPI synchronous read
581 * @spi: device from which data will be read
582 * @buf: data buffer
583 * @len: data buffer size
584 * Context: can sleep
585 *
586 * This reads the buffer and returns zero or a negative error code.
587 * Callable only from contexts that can sleep.
588 */
589static inline int
590spi_read(struct spi_device *spi, u8 *buf, size_t len)
591{
592	struct spi_transfer	t = {
593			.rx_buf		= buf,
594			.len		= len,
595		};
596	struct spi_message	m;
597
598	spi_message_init(&m);
599	spi_message_add_tail(&t, &m);
600	return spi_sync(spi, &m);
601}
602
603/* this copies txbuf and rxbuf data; for small transfers only! */
604extern int spi_write_then_read(struct spi_device *spi,
605		const u8 *txbuf, unsigned n_tx,
606		u8 *rxbuf, unsigned n_rx);
607
608/**
609 * spi_w8r8 - SPI synchronous 8 bit write followed by 8 bit read
610 * @spi: device with which data will be exchanged
611 * @cmd: command to be written before data is read back
612 * Context: can sleep
613 *
614 * This returns the (unsigned) eight bit number returned by the
615 * device, or else a negative error code.  Callable only from
616 * contexts that can sleep.
617 */
618static inline ssize_t spi_w8r8(struct spi_device *spi, u8 cmd)
619{
620	ssize_t			status;
621	u8			result;
622
623	status = spi_write_then_read(spi, &cmd, 1, &result, 1);
624
625	/* return negative errno or unsigned value */
626	return (status < 0) ? status : result;
627}
628
629/**
630 * spi_w8r16 - SPI synchronous 8 bit write followed by 16 bit read
631 * @spi: device with which data will be exchanged
632 * @cmd: command to be written before data is read back
633 * Context: can sleep
634 *
635 * This returns the (unsigned) sixteen bit number returned by the
636 * device, or else a negative error code.  Callable only from
637 * contexts that can sleep.
638 *
639 * The number is returned in wire-order, which is at least sometimes
640 * big-endian.
641 */
642static inline ssize_t spi_w8r16(struct spi_device *spi, u8 cmd)
643{
644	ssize_t			status;
645	u16			result;
646
647	status = spi_write_then_read(spi, &cmd, 1, (u8 *) &result, 2);
648
649	/* return negative errno or unsigned value */
650	return (status < 0) ? status : result;
651}
652
653/*---------------------------------------------------------------------------*/
654
655/*
656 * INTERFACE between board init code and SPI infrastructure.
657 *
658 * No SPI driver ever sees these SPI device table segments, but
659 * it's how the SPI core (or adapters that get hotplugged) grows
660 * the driver model tree.
661 *
662 * As a rule, SPI devices can't be probed.  Instead, board init code
663 * provides a table listing the devices which are present, with enough
664 * information to bind and set up the device's driver.  There's basic
665 * support for nonstatic configurations too; enough to handle adding
666 * parport adapters, or microcontrollers acting as USB-to-SPI bridges.
667 */
668
669/**
670 * struct spi_board_info - board-specific template for a SPI device
671 * @modalias: Initializes spi_device.modalias; identifies the driver.
672 * @platform_data: Initializes spi_device.platform_data; the particular
673 *	data stored there is driver-specific.
674 * @controller_data: Initializes spi_device.controller_data; some
675 *	controllers need hints about hardware setup, e.g. for DMA.
676 * @irq: Initializes spi_device.irq; depends on how the board is wired.
677 * @max_speed_hz: Initializes spi_device.max_speed_hz; based on limits
678 *	from the chip datasheet and board-specific signal quality issues.
679 * @bus_num: Identifies which spi_master parents the spi_device; unused
680 *	by spi_new_device(), and otherwise depends on board wiring.
681 * @chip_select: Initializes spi_device.chip_select; depends on how
682 *	the board is wired.
683 * @mode: Initializes spi_device.mode; based on the chip datasheet, board
684 *	wiring (some devices support both 3WIRE and standard modes), and
685 *	possibly presence of an inverter in the chipselect path.
686 *
687 * When adding new SPI devices to the device tree, these structures serve
688 * as a partial device template.  They hold information which can't always
689 * be determined by drivers.  Information that probe() can establish (such
690 * as the default transfer wordsize) is not included here.
691 *
692 * These structures are used in two places.  Their primary role is to
693 * be stored in tables of board-specific device descriptors, which are
694 * declared early in board initialization and then used (much later) to
695 * populate a controller's device tree after the that controller's driver
696 * initializes.  A secondary (and atypical) role is as a parameter to
697 * spi_new_device() call, which happens after those controller drivers
698 * are active in some dynamic board configuration models.
699 */
700struct spi_board_info {
701	/* the device name and module name are coupled, like platform_bus;
702	 * "modalias" is normally the driver name.
703	 *
704	 * platform_data goes to spi_device.dev.platform_data,
705	 * controller_data goes to spi_device.controller_data,
706	 * irq is copied too
707	 */
708	char		modalias[SPI_NAME_SIZE];
709	const void	*platform_data;
710	void		*controller_data;
711	int		irq;
712
713	/* slower signaling on noisy or low voltage boards */
714	u32		max_speed_hz;
715
716
717	/* bus_num is board specific and matches the bus_num of some
718	 * spi_master that will probably be registered later.
719	 *
720	 * chip_select reflects how this chip is wired to that master;
721	 * it's less than num_chipselect.
722	 */
723	u16		bus_num;
724	u16		chip_select;
725
726	/* mode becomes spi_device.mode, and is essential for chips
727	 * where the default of SPI_CS_HIGH = 0 is wrong.
728	 */
729	u8		mode;
730
731	/* ... may need additional spi_device chip config data here.
732	 * avoid stuff protocol drivers can set; but include stuff
733	 * needed to behave without being bound to a driver:
734	 *  - quirks like clock rate mattering when not selected
735	 */
736};
737
738#ifdef	CONFIG_SPI
739extern int
740spi_register_board_info(struct spi_board_info const *info, unsigned n);
741#else
742/* board init code may ignore whether SPI is configured or not */
743static inline int
744spi_register_board_info(struct spi_board_info const *info, unsigned n)
745	{ return 0; }
746#endif
747
748
749/* If you're hotplugging an adapter with devices (parport, usb, etc)
750 * use spi_new_device() to describe each device.  You can also call
751 * spi_unregister_device() to start making that device vanish, but
752 * normally that would be handled by spi_unregister_master().
753 *
754 * You can also use spi_alloc_device() and spi_add_device() to use a two
755 * stage registration sequence for each spi_device.  This gives the caller
756 * some more control over the spi_device structure before it is registered,
757 * but requires that caller to initialize fields that would otherwise
758 * be defined using the board info.
759 */
760extern struct spi_device *
761spi_alloc_device(struct spi_master *master);
762
763extern int
764spi_add_device(struct spi_device *spi);
765
766extern struct spi_device *
767spi_new_device(struct spi_master *, struct spi_board_info *);
768
769static inline void
770spi_unregister_device(struct spi_device *spi)
771{
772	if (spi)
773		device_unregister(&spi->dev);
774}
775
776extern const struct spi_device_id *
777spi_get_device_id(const struct spi_device *sdev);
778
779#endif /* __LINUX_SPI_H */