/include/linux/mfd/wm8400-audio.h

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  1. /*
    2. 

  2.  * wm8400 private definitions for audio
    3. 

  3.  *
    4. 

  4.  * Copyright 2008 Wolfson Microelectronics plc
    5. 

  5.  *
    6. 

  6.  * This program is free software; you can redistribute it and/or modify
    7. 

  7.  * it under the terms of the GNU General Public License as published by
    8. 

  8.  * the Free Software Foundation; either version 2 of the License, or
    9. 

  9.  * (at your option) any later version.
    10. 

  10.  *
    11. 

  11.  * This program is distributed in the hope that it will be useful,
    12. 

  12.  * but WITHOUT ANY WARRANTY; without even the implied warranty of
    13. 

  13.  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    14. 

  14.  * GNU General Public License for more details.
    15. 

  15.  *
    16. 

  16.  * You should have received a copy of the GNU General Public License
    17. 

  17.  * along with this program; if not, write to the Free Software
    18. 

  18.  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
    19. 

  19.  */
    20. 

  20. 

  21. #ifndef __LINUX_MFD_WM8400_AUDIO_H
    22. 

  22. #define __LINUX_MFD_WM8400_AUDIO_H
    23. 

  23. 

  24. #include <linux/mfd/wm8400-audio.h>
    25. 

  25. 

  26. /*
    27. 

  27.  * R2 (0x02) - Power Management (1)
    28. 

  28.  */
    29. 

  29. #define WM8400_CODEC_ENA                        0x8000  /* CODEC_ENA */
    30. 

  30. #define WM8400_CODEC_ENA_MASK                   0x8000  /* CODEC_ENA */
    31. 

  31. #define WM8400_CODEC_ENA_SHIFT                      15  /* CODEC_ENA */
    32. 

  32. #define WM8400_CODEC_ENA_WIDTH                       1  /* CODEC_ENA */
    33. 

  33. #define WM8400_SYSCLK_ENA                       0x4000  /* SYSCLK_ENA */
    34. 

  34. #define WM8400_SYSCLK_ENA_MASK                  0x4000  /* SYSCLK_ENA */
    35. 

  35. #define WM8400_SYSCLK_ENA_SHIFT                     14  /* SYSCLK_ENA */
    36. 

  36. #define WM8400_SYSCLK_ENA_WIDTH                      1  /* SYSCLK_ENA */
    37. 

  37. #define WM8400_SPK_MIX_ENA                      0x2000  /* SPK_MIX_ENA */
    38. 

  38. #define WM8400_SPK_MIX_ENA_MASK                 0x2000  /* SPK_MIX_ENA */
    39. 

  39. #define WM8400_SPK_MIX_ENA_SHIFT                    13  /* SPK_MIX_ENA */
    40. 

  40. #define WM8400_SPK_MIX_ENA_WIDTH                     1  /* SPK_MIX_ENA */
    41. 

  41. #define WM8400_SPK_ENA                          0x1000  /* SPK_ENA */
    42. 

  42. #define WM8400_SPK_ENA_MASK                     0x1000  /* SPK_ENA */
    43. 

  43. #define WM8400_SPK_ENA_SHIFT                        12  /* SPK_ENA */
    44. 

  44. #define WM8400_SPK_ENA_WIDTH                         1  /* SPK_ENA */
    45. 

  45. #define WM8400_OUT3_ENA                         0x0800  /* OUT3_ENA */
    46. 

  46. #define WM8400_OUT3_ENA_MASK                    0x0800  /* OUT3_ENA */
    47. 

  47. #define WM8400_OUT3_ENA_SHIFT                       11  /* OUT3_ENA */
    48. 

  48. #define WM8400_OUT3_ENA_WIDTH                        1  /* OUT3_ENA */
    49. 

  49. #define WM8400_OUT4_ENA                         0x0400  /* OUT4_ENA */
    50. 

  50. #define WM8400_OUT4_ENA_MASK                    0x0400  /* OUT4_ENA */
    51. 

  51. #define WM8400_OUT4_ENA_SHIFT                       10  /* OUT4_ENA */
    52. 

  52. #define WM8400_OUT4_ENA_WIDTH                        1  /* OUT4_ENA */
    53. 

  53. #define WM8400_LOUT_ENA                         0x0200  /* LOUT_ENA */
    54. 

  54. #define WM8400_LOUT_ENA_MASK                    0x0200  /* LOUT_ENA */
    55. 

  55. #define WM8400_LOUT_ENA_SHIFT                        9  /* LOUT_ENA */
    56. 

  56. #define WM8400_LOUT_ENA_WIDTH                        1  /* LOUT_ENA */
    57. 

  57. #define WM8400_ROUT_ENA                         0x0100  /* ROUT_ENA */
    58. 

  58. #define WM8400_ROUT_ENA_MASK                    0x0100  /* ROUT_ENA */
    59. 

  59. #define WM8400_ROUT_ENA_SHIFT                        8  /* ROUT_ENA */
    60. 

  60. #define WM8400_ROUT_ENA_WIDTH                        1  /* ROUT_ENA */
    61. 

  61. #define WM8400_MIC1BIAS_ENA                     0x0010  /* MIC1BIAS_ENA */
    62. 

  62. #define WM8400_MIC1BIAS_ENA_MASK                0x0010  /* MIC1BIAS_ENA */
    63. 

  63. #define WM8400_MIC1BIAS_ENA_SHIFT                    4  /* MIC1BIAS_ENA */
    64. 

  64. #define WM8400_MIC1BIAS_ENA_WIDTH                    1  /* MIC1BIAS_ENA */
    65. 

  65. #define WM8400_VMID_MODE_MASK                   0x0006  /* VMID_MODE - [2:1] */
    66. 

  66. #define WM8400_VMID_MODE_SHIFT                       1  /* VMID_MODE - [2:1] */
    67. 

  67. #define WM8400_VMID_MODE_WIDTH                       2  /* VMID_MODE - [2:1] */
    68. 

  68. #define WM8400_VREF_ENA                         0x0001  /* VREF_ENA */
    69. 

  69. #define WM8400_VREF_ENA_MASK                    0x0001  /* VREF_ENA */
    70. 

  70. #define WM8400_VREF_ENA_SHIFT                        0  /* VREF_ENA */
    71. 

  71. #define WM8400_VREF_ENA_WIDTH                        1  /* VREF_ENA */
    72. 

  72. 

  73. /*
    74. 

  74.  * R3 (0x03) - Power Management (2)
    75. 

  75.  */
    76. 

  76. #define WM8400_FLL_ENA                          0x8000  /* FLL_ENA */
    77. 

  77. #define WM8400_FLL_ENA_MASK                     0x8000  /* FLL_ENA */
    78. 

  78. #define WM8400_FLL_ENA_SHIFT                        15  /* FLL_ENA */
    79. 

  79. #define WM8400_FLL_ENA_WIDTH                         1  /* FLL_ENA */
    80. 

  80. #define WM8400_TSHUT_ENA                        0x4000  /* TSHUT_ENA */
    81. 

  81. #define WM8400_TSHUT_ENA_MASK                   0x4000  /* TSHUT_ENA */
    82. 

  82. #define WM8400_TSHUT_ENA_SHIFT                      14  /* TSHUT_ENA */
    83. 

  83. #define WM8400_TSHUT_ENA_WIDTH                       1  /* TSHUT_ENA */
    84. 

  84. #define WM8400_TSHUT_OPDIS                      0x2000  /* TSHUT_OPDIS */
    85. 

  85. #define WM8400_TSHUT_OPDIS_MASK                 0x2000  /* TSHUT_OPDIS */
    86. 

  86. #define WM8400_TSHUT_OPDIS_SHIFT                    13  /* TSHUT_OPDIS */
    87. 

  87. #define WM8400_TSHUT_OPDIS_WIDTH                     1  /* TSHUT_OPDIS */
    88. 

  88. #define WM8400_OPCLK_ENA                        0x0800  /* OPCLK_ENA */
    89. 

  89. #define WM8400_OPCLK_ENA_MASK                   0x0800  /* OPCLK_ENA */
    90. 

  90. #define WM8400_OPCLK_ENA_SHIFT                      11  /* OPCLK_ENA */
    91. 

  91. #define WM8400_OPCLK_ENA_WIDTH                       1  /* OPCLK_ENA */
    92. 

  92. #define WM8400_AINL_ENA                         0x0200  /* AINL_ENA */
    93. 

  93. #define WM8400_AINL_ENA_MASK                    0x0200  /* AINL_ENA */
    94. 

  94. #define WM8400_AINL_ENA_SHIFT                        9  /* AINL_ENA */
    95. 

  95. #define WM8400_AINL_ENA_WIDTH                        1  /* AINL_ENA */
    96. 

  96. #define WM8400_AINR_ENA                         0x0100  /* AINR_ENA */
    97. 

  97. #define WM8400_AINR_ENA_MASK                    0x0100  /* AINR_ENA */
    98. 

  98. #define WM8400_AINR_ENA_SHIFT                        8  /* AINR_ENA */
    99. 

  99. #define WM8400_AINR_ENA_WIDTH                        1  /* AINR_ENA */
    100. 

  100. #define WM8400_LIN34_ENA                        0x0080  /* LIN34_ENA */
    101. 

  101. #define WM8400_LIN34_ENA_MASK                   0x0080  /* LIN34_ENA */
    102. 

  102. #define WM8400_LIN34_ENA_SHIFT                       7  /* LIN34_ENA */
    103. 

  103. #define WM8400_LIN34_ENA_WIDTH                       1  /* LIN34_ENA */
    104. 

  104. #define WM8400_LIN12_ENA                        0x0040  /* LIN12_ENA */
    105. 

  105. #define WM8400_LIN12_ENA_MASK                   0x0040  /* LIN12_ENA */
    106. 

  106. #define WM8400_LIN12_ENA_SHIFT                       6  /* LIN12_ENA */
    107. 

  107. #define WM8400_LIN12_ENA_WIDTH                       1  /* LIN12_ENA */
    108. 

  108. #define WM8400_RIN34_ENA                        0x0020  /* RIN34_ENA */
    109. 

  109. #define WM8400_RIN34_ENA_MASK                   0x0020  /* RIN34_ENA */
    110. 

  110. #define WM8400_RIN34_ENA_SHIFT                       5  /* RIN34_ENA */
    111. 

  111. #define WM8400_RIN34_ENA_WIDTH                       1  /* RIN34_ENA */
    112. 

  112. #define WM8400_RIN12_ENA                        0x0010  /* RIN12_ENA */
    113. 

  113. #define WM8400_RIN12_ENA_MASK                   0x0010  /* RIN12_ENA */
    114. 

  114. #define WM8400_RIN12_ENA_SHIFT                       4  /* RIN12_ENA */
    115. 

  115. #define WM8400_RIN12_ENA_WIDTH                       1  /* RIN12_ENA */
    116. 

  116. #define WM8400_ADCL_ENA                         0x0002  /* ADCL_ENA */
    117. 

  117. #define WM8400_ADCL_ENA_MASK                    0x0002  /* ADCL_ENA */
    118. 

  118. #define WM8400_ADCL_ENA_SHIFT                        1  /* ADCL_ENA */
    119. 

  119. #define WM8400_ADCL_ENA_WIDTH                        1  /* ADCL_ENA */
    120. 

  120. #define WM8400_ADCR_ENA                         0x0001  /* ADCR_ENA */
    121. 

  121. #define WM8400_ADCR_ENA_MASK                    0x0001  /* ADCR_ENA */
    122. 

  122. #define WM8400_ADCR_ENA_SHIFT                        0  /* ADCR_ENA */
    123. 

  123. #define WM8400_ADCR_ENA_WIDTH                        1  /* ADCR_ENA */
    124. 

  124. 

  125. /*
    126. 

  126.  * R4 (0x04) - Power Management (3)
    127. 

  127.  */
    128. 

  128. #define WM8400_LON_ENA                          0x2000  /* LON_ENA */
    129. 

  129. #define WM8400_LON_ENA_MASK                     0x2000  /* LON_ENA */
    130. 

  130. #define WM8400_LON_ENA_SHIFT                        13  /* LON_ENA */
    131. 

  131. #define WM8400_LON_ENA_WIDTH                         1  /* LON_ENA */
    132. 

  132. #define WM8400_LOP_ENA                          0x1000  /* LOP_ENA */
    133. 

  133. #define WM8400_LOP_ENA_MASK                     0x1000  /* LOP_ENA */
    134. 

  134. #define WM8400_LOP_ENA_SHIFT                        12  /* LOP_ENA */
    135. 

  135. #define WM8400_LOP_ENA_WIDTH                         1  /* LOP_ENA */
    136. 

  136. #define WM8400_RON_ENA                          0x0800  /* RON_ENA */
    137. 

  137. #define WM8400_RON_ENA_MASK                     0x0800  /* RON_ENA */
    138. 

  138. #define WM8400_RON_ENA_SHIFT                        11  /* RON_ENA */
    139. 

  139. #define WM8400_RON_ENA_WIDTH                         1  /* RON_ENA */
    140. 

  140. #define WM8400_ROP_ENA                          0x0400  /* ROP_ENA */
    141. 

  141. #define WM8400_ROP_ENA_MASK                     0x0400  /* ROP_ENA */
    142. 

  142. #define WM8400_ROP_ENA_SHIFT                        10  /* ROP_ENA */
    143. 

  143. #define WM8400_ROP_ENA_WIDTH                         1  /* ROP_ENA */
    144. 

  144. #define WM8400_LOPGA_ENA                        0x0080  /* LOPGA_ENA */
    145. 

  145. #define WM8400_LOPGA_ENA_MASK                   0x0080  /* LOPGA_ENA */
    146. 

  146. #define WM8400_LOPGA_ENA_SHIFT                       7  /* LOPGA_ENA */
    147. 

  147. #define WM8400_LOPGA_ENA_WIDTH                       1  /* LOPGA_ENA */
    148. 

  148. #define WM8400_ROPGA_ENA                        0x0040  /* ROPGA_ENA */
    149. 

  149. #define WM8400_ROPGA_ENA_MASK                   0x0040  /* ROPGA_ENA */
    150. 

  150. #define WM8400_ROPGA_ENA_SHIFT                       6  /* ROPGA_ENA */
    151. 

  151. #define WM8400_ROPGA_ENA_WIDTH                       1  /* ROPGA_ENA */
    152. 

  152. #define WM8400_LOMIX_ENA                        0x0020  /* LOMIX_ENA */
    153. 

  153. #define WM8400_LOMIX_ENA_MASK                   0x0020  /* LOMIX_ENA */
    154. 

  154. #define WM8400_LOMIX_ENA_SHIFT                       5  /* LOMIX_ENA */
    155. 

  155. #define WM8400_LOMIX_ENA_WIDTH                       1  /* LOMIX_ENA */
    156. 

  156. #define WM8400_ROMIX_ENA                        0x0010  /* ROMIX_ENA */
    157. 

  157. #define WM8400_ROMIX_ENA_MASK                   0x0010  /* ROMIX_ENA */
    158. 

  158. #define WM8400_ROMIX_ENA_SHIFT                       4  /* ROMIX_ENA */
    159. 

  159. #define WM8400_ROMIX_ENA_WIDTH                       1  /* ROMIX_ENA */
    160. 

  160. #define WM8400_DACL_ENA                         0x0002  /* DACL_ENA */
    161. 

  161. #define WM8400_DACL_ENA_MASK                    0x0002  /* DACL_ENA */
    162. 

  162. #define WM8400_DACL_ENA_SHIFT                        1  /* DACL_ENA */
    163. 

  163. #define WM8400_DACL_ENA_WIDTH                        1  /* DACL_ENA */
    164. 

  164. #define WM8400_DACR_ENA                         0x0001  /* DACR_ENA */
    165. 

  165. #define WM8400_DACR_ENA_MASK                    0x0001  /* DACR_ENA */
    166. 

  166. #define WM8400_DACR_ENA_SHIFT                        0  /* DACR_ENA */
    167. 

  167. #define WM8400_DACR_ENA_WIDTH                        1  /* DACR_ENA */
    168. 

  168. 

  169. /*
    170. 

  170.  * R5 (0x05) - Audio Interface (1)
    171. 

  171.  */
    172. 

  172. #define WM8400_AIFADCL_SRC                      0x8000  /* AIFADCL_SRC */
    173. 

  173. #define WM8400_AIFADCL_SRC_MASK                 0x8000  /* AIFADCL_SRC */
    174. 

  174. #define WM8400_AIFADCL_SRC_SHIFT                    15  /* AIFADCL_SRC */
    175. 

  175. #define WM8400_AIFADCL_SRC_WIDTH                     1  /* AIFADCL_SRC */
    176. 

  176. #define WM8400_AIFADCR_SRC                      0x4000  /* AIFADCR_SRC */
    177. 

  177. #define WM8400_AIFADCR_SRC_MASK                 0x4000  /* AIFADCR_SRC */
    178. 

  178. #define WM8400_AIFADCR_SRC_SHIFT                    14  /* AIFADCR_SRC */
    179. 

  179. #define WM8400_AIFADCR_SRC_WIDTH                     1  /* AIFADCR_SRC */
    180. 

  180. #define WM8400_AIFADC_TDM                       0x2000  /* AIFADC_TDM */
    181. 

  181. #define WM8400_AIFADC_TDM_MASK                  0x2000  /* AIFADC_TDM */
    182. 

  182. #define WM8400_AIFADC_TDM_SHIFT                     13  /* AIFADC_TDM */
    183. 

  183. #define WM8400_AIFADC_TDM_WIDTH                      1  /* AIFADC_TDM */
    184. 

  184. #define WM8400_AIFADC_TDM_CHAN                  0x1000  /* AIFADC_TDM_CHAN */
    185. 

  185. #define WM8400_AIFADC_TDM_CHAN_MASK             0x1000  /* AIFADC_TDM_CHAN */
    186. 

  186. #define WM8400_AIFADC_TDM_CHAN_SHIFT                12  /* AIFADC_TDM_CHAN */
    187. 

  187. #define WM8400_AIFADC_TDM_CHAN_WIDTH                 1  /* AIFADC_TDM_CHAN */
    188. 

  188. #define WM8400_AIF_BCLK_INV                     0x0100  /* AIF_BCLK_INV */
    189. 

  189. #define WM8400_AIF_BCLK_INV_MASK                0x0100  /* AIF_BCLK_INV */
    190. 

  190. #define WM8400_AIF_BCLK_INV_SHIFT                    8  /* AIF_BCLK_INV */
    191. 

  191. #define WM8400_AIF_BCLK_INV_WIDTH                    1  /* AIF_BCLK_INV */
    192. 

  192. #define WM8400_AIF_LRCLK_INV                    0x0080  /* AIF_LRCLK_INV */
    193. 

  193. #define WM8400_AIF_LRCLK_INV_MASK               0x0080  /* AIF_LRCLK_INV */
    194. 

  194. #define WM8400_AIF_LRCLK_INV_SHIFT                   7  /* AIF_LRCLK_INV */
    195. 

  195. #define WM8400_AIF_LRCLK_INV_WIDTH                   1  /* AIF_LRCLK_INV */
    196. 

  196. #define WM8400_AIF_WL_MASK                      0x0060  /* AIF_WL - [6:5] */
    197. 

  197. #define WM8400_AIF_WL_SHIFT                          5  /* AIF_WL - [6:5] */
    198. 

  198. #define WM8400_AIF_WL_WIDTH                          2  /* AIF_WL - [6:5] */
    199. 

  199. #define WM8400_AIF_WL_16BITS			(0 << 5)
    200. 

  200. #define WM8400_AIF_WL_20BITS			(1 << 5)
    201. 

  201. #define WM8400_AIF_WL_24BITS			(2 << 5)
    202. 

  202. #define WM8400_AIF_WL_32BITS			(3 << 5)
    203. 

  203. #define WM8400_AIF_FMT_MASK                     0x0018  /* AIF_FMT - [4:3] */
    204. 

  204. #define WM8400_AIF_FMT_SHIFT                         3  /* AIF_FMT - [4:3] */
    205. 

  205. #define WM8400_AIF_FMT_WIDTH                         2  /* AIF_FMT - [4:3] */
    206. 

  206. #define WM8400_AIF_FMT_RIGHTJ			(0 << 3)
    207. 

  207. #define WM8400_AIF_FMT_LEFTJ			(1 << 3)
    208. 

  208. #define WM8400_AIF_FMT_I2S			(2 << 3)
    209. 

  209. #define WM8400_AIF_FMT_DSP			(3 << 3)
    210. 

  210. 

  211. /*
    212. 

  212.  * R6 (0x06) - Audio Interface (2)
    213. 

  213.  */
    214. 

  214. #define WM8400_DACL_SRC                         0x8000  /* DACL_SRC */
    215. 

  215. #define WM8400_DACL_SRC_MASK                    0x8000  /* DACL_SRC */
    216. 

  216. #define WM8400_DACL_SRC_SHIFT                       15  /* DACL_SRC */
    217. 

  217. #define WM8400_DACL_SRC_WIDTH                        1  /* DACL_SRC */
    218. 

  218. #define WM8400_DACR_SRC                         0x4000  /* DACR_SRC */
    219. 

  219. #define WM8400_DACR_SRC_MASK                    0x4000  /* DACR_SRC */
    220. 

  220. #define WM8400_DACR_SRC_SHIFT                       14  /* DACR_SRC */
    221. 

  221. #define WM8400_DACR_SRC_WIDTH                        1  /* DACR_SRC */
    222. 

  222. #define WM8400_AIFDAC_TDM                       0x2000  /* AIFDAC_TDM */
    223. 

  223. #define WM8400_AIFDAC_TDM_MASK                  0x2000  /* AIFDAC_TDM */
    224. 

  224. #define WM8400_AIFDAC_TDM_SHIFT                     13  /* AIFDAC_TDM */
    225. 

  225. #define WM8400_AIFDAC_TDM_WIDTH                      1  /* AIFDAC_TDM */
    226. 

  226. #define WM8400_AIFDAC_TDM_CHAN                  0x1000  /* AIFDAC_TDM_CHAN */
    227. 

  227. #define WM8400_AIFDAC_TDM_CHAN_MASK             0x1000  /* AIFDAC_TDM_CHAN */
    228. 

  228. #define WM8400_AIFDAC_TDM_CHAN_SHIFT                12  /* AIFDAC_TDM_CHAN */
    229. 

  229. #define WM8400_AIFDAC_TDM_CHAN_WIDTH                 1  /* AIFDAC_TDM_CHAN */
    230. 

  230. #define WM8400_DAC_BOOST_MASK                   0x0C00  /* DAC_BOOST - [11:10] */
    231. 

  231. #define WM8400_DAC_BOOST_SHIFT                      10  /* DAC_BOOST - [11:10] */
    232. 

  232. #define WM8400_DAC_BOOST_WIDTH                       2  /* DAC_BOOST - [11:10] */
    233. 

  233. #define WM8400_DAC_COMP                         0x0010  /* DAC_COMP */
    234. 

  234. #define WM8400_DAC_COMP_MASK                    0x0010  /* DAC_COMP */
    235. 

  235. #define WM8400_DAC_COMP_SHIFT                        4  /* DAC_COMP */
    236. 

  236. #define WM8400_DAC_COMP_WIDTH                        1  /* DAC_COMP */
    237. 

  237. #define WM8400_DAC_COMPMODE                     0x0008  /* DAC_COMPMODE */
    238. 

  238. #define WM8400_DAC_COMPMODE_MASK                0x0008  /* DAC_COMPMODE */
    239. 

  239. #define WM8400_DAC_COMPMODE_SHIFT                    3  /* DAC_COMPMODE */
    240. 

  240. #define WM8400_DAC_COMPMODE_WIDTH                    1  /* DAC_COMPMODE */
    241. 

  241. #define WM8400_ADC_COMP                         0x0004  /* ADC_COMP */
    242. 

  242. #define WM8400_ADC_COMP_MASK                    0x0004  /* ADC_COMP */
    243. 

  243. #define WM8400_ADC_COMP_SHIFT                        2  /* ADC_COMP */
    244. 

  244. #define WM8400_ADC_COMP_WIDTH                        1  /* ADC_COMP */
    245. 

  245. #define WM8400_ADC_COMPMODE                     0x0002  /* ADC_COMPMODE */
    246. 

  246. #define WM8400_ADC_COMPMODE_MASK                0x0002  /* ADC_COMPMODE */
    247. 

  247. #define WM8400_ADC_COMPMODE_SHIFT                    1  /* ADC_COMPMODE */
    248. 

  248. #define WM8400_ADC_COMPMODE_WIDTH                    1  /* ADC_COMPMODE */
    249. 

  249. #define WM8400_LOOPBACK                         0x0001  /* LOOPBACK */
    250. 

  250. #define WM8400_LOOPBACK_MASK                    0x0001  /* LOOPBACK */
    251. 

  251. #define WM8400_LOOPBACK_SHIFT                        0  /* LOOPBACK */
    252. 

  252. #define WM8400_LOOPBACK_WIDTH                        1  /* LOOPBACK */
    253. 

  253. 

  254. /*
    255. 

  255.  * R7 (0x07) - Clocking (1)
    256. 

  256.  */
    257. 

  257. #define WM8400_TOCLK_RATE                       0x8000  /* TOCLK_RATE */
    258. 

  258. #define WM8400_TOCLK_RATE_MASK                  0x8000  /* TOCLK_RATE */
    259. 

  259. #define WM8400_TOCLK_RATE_SHIFT                     15  /* TOCLK_RATE */
    260. 

  260. #define WM8400_TOCLK_RATE_WIDTH                      1  /* TOCLK_RATE */
    261. 

  261. #define WM8400_TOCLK_ENA                        0x4000  /* TOCLK_ENA */
    262. 

  262. #define WM8400_TOCLK_ENA_MASK                   0x4000  /* TOCLK_ENA */
    263. 

  263. #define WM8400_TOCLK_ENA_SHIFT                      14  /* TOCLK_ENA */
    264. 

  264. #define WM8400_TOCLK_ENA_WIDTH                       1  /* TOCLK_ENA */
    265. 

  265. #define WM8400_OPCLKDIV_MASK                    0x1E00  /* OPCLKDIV - [12:9] */
    266. 

  266. #define WM8400_OPCLKDIV_SHIFT                        9  /* OPCLKDIV - [12:9] */
    267. 

  267. #define WM8400_OPCLKDIV_WIDTH                        4  /* OPCLKDIV - [12:9] */
    268. 

  268. #define WM8400_DCLKDIV_MASK                     0x01C0  /* DCLKDIV - [8:6] */
    269. 

  269. #define WM8400_DCLKDIV_SHIFT                         6  /* DCLKDIV - [8:6] */
    270. 

  270. #define WM8400_DCLKDIV_WIDTH                         3  /* DCLKDIV - [8:6] */
    271. 

  271. #define WM8400_BCLK_DIV_MASK                    0x001E  /* BCLK_DIV - [4:1] */
    272. 

  272. #define WM8400_BCLK_DIV_SHIFT                        1  /* BCLK_DIV - [4:1] */
    273. 

  273. #define WM8400_BCLK_DIV_WIDTH                        4  /* BCLK_DIV - [4:1] */
    274. 

  274. 

  275. /*
    276. 

  276.  * R8 (0x08) - Clocking (2)
    277. 

  277.  */
    278. 

  278. #define WM8400_MCLK_SRC                         0x8000  /* MCLK_SRC */
    279. 

  279. #define WM8400_MCLK_SRC_MASK                    0x8000  /* MCLK_SRC */
    280. 

  280. #define WM8400_MCLK_SRC_SHIFT                       15  /* MCLK_SRC */
    281. 

  281. #define WM8400_MCLK_SRC_WIDTH                        1  /* MCLK_SRC */
    282. 

  282. #define WM8400_SYSCLK_SRC                       0x4000  /* SYSCLK_SRC */
    283. 

  283. #define WM8400_SYSCLK_SRC_MASK                  0x4000  /* SYSCLK_SRC */
    284. 

  284. #define WM8400_SYSCLK_SRC_SHIFT                     14  /* SYSCLK_SRC */
    285. 

  285. #define WM8400_SYSCLK_SRC_WIDTH                      1  /* SYSCLK_SRC */
    286. 

  286. #define WM8400_CLK_FORCE                        0x2000  /* CLK_FORCE */
    287. 

  287. #define WM8400_CLK_FORCE_MASK                   0x2000  /* CLK_FORCE */
    288. 

  288. #define WM8400_CLK_FORCE_SHIFT                      13  /* CLK_FORCE */
    289. 

  289. #define WM8400_CLK_FORCE_WIDTH                       1  /* CLK_FORCE */
    290. 

  290. #define WM8400_MCLK_DIV_MASK                    0x1800  /* MCLK_DIV - [12:11] */
    291. 

  291. #define WM8400_MCLK_DIV_SHIFT                       11  /* MCLK_DIV - [12:11] */
    292. 

  292. #define WM8400_MCLK_DIV_WIDTH                        2  /* MCLK_DIV - [12:11] */
    293. 

  293. #define WM8400_MCLK_INV                         0x0400  /* MCLK_INV */
    294. 

  294. #define WM8400_MCLK_INV_MASK                    0x0400  /* MCLK_INV */
    295. 

  295. #define WM8400_MCLK_INV_SHIFT                       10  /* MCLK_INV */
    296. 

  296. #define WM8400_MCLK_INV_WIDTH                        1  /* MCLK_INV */
    297. 

  297. #define WM8400_ADC_CLKDIV_MASK                  0x00E0  /* ADC_CLKDIV - [7:5] */
    298. 

  298. #define WM8400_ADC_CLKDIV_SHIFT                      5  /* ADC_CLKDIV - [7:5] */
    299. 

  299. #define WM8400_ADC_CLKDIV_WIDTH                      3  /* ADC_CLKDIV - [7:5] */
    300. 

  300. #define WM8400_DAC_CLKDIV_MASK                  0x001C  /* DAC_CLKDIV - [4:2] */
    301. 

  301. #define WM8400_DAC_CLKDIV_SHIFT                      2  /* DAC_CLKDIV - [4:2] */
    302. 

  302. #define WM8400_DAC_CLKDIV_WIDTH                      3  /* DAC_CLKDIV - [4:2] */
    303. 

  303. 

  304. /*
    305. 

  305.  * R9 (0x09) - Audio Interface (3)
    306. 

  306.  */
    307. 

  307. #define WM8400_AIF_MSTR1                        0x8000  /* AIF_MSTR1 */
    308. 

  308. #define WM8400_AIF_MSTR1_MASK                   0x8000  /* AIF_MSTR1 */
    309. 

  309. #define WM8400_AIF_MSTR1_SHIFT                      15  /* AIF_MSTR1 */
    310. 

  310. #define WM8400_AIF_MSTR1_WIDTH                       1  /* AIF_MSTR1 */
    311. 

  311. #define WM8400_AIF_MSTR2                        0x4000  /* AIF_MSTR2 */
    312. 

  312. #define WM8400_AIF_MSTR2_MASK                   0x4000  /* AIF_MSTR2 */
    313. 

  313. #define WM8400_AIF_MSTR2_SHIFT                      14  /* AIF_MSTR2 */
    314. 

  314. #define WM8400_AIF_MSTR2_WIDTH                       1  /* AIF_MSTR2 */
    315. 

  315. #define WM8400_AIF_SEL                          0x2000  /* AIF_SEL */
    316. 

  316. #define WM8400_AIF_SEL_MASK                     0x2000  /* AIF_SEL */
    317. 

  317. #define WM8400_AIF_SEL_SHIFT                        13  /* AIF_SEL */
    318. 

  318. #define WM8400_AIF_SEL_WIDTH                         1  /* AIF_SEL */
    319. 

  319. #define WM8400_ADCLRC_DIR                       0x0800  /* ADCLRC_DIR */
    320. 

  320. #define WM8400_ADCLRC_DIR_MASK                  0x0800  /* ADCLRC_DIR */
    321. 

  321. #define WM8400_ADCLRC_DIR_SHIFT                     11  /* ADCLRC_DIR */
    322. 

  322. #define WM8400_ADCLRC_DIR_WIDTH                      1  /* ADCLRC_DIR */
    323. 

  323. #define WM8400_ADCLRC_RATE_MASK                 0x07FF  /* ADCLRC_RATE - [10:0] */
    324. 

  324. #define WM8400_ADCLRC_RATE_SHIFT                     0  /* ADCLRC_RATE - [10:0] */
    325. 

  325. #define WM8400_ADCLRC_RATE_WIDTH                    11  /* ADCLRC_RATE - [10:0] */
    326. 

  326. 

  327. /*
    328. 

  328.  * R10 (0x0A) - Audio Interface (4)
    329. 

  329.  */
    330. 

  330. #define WM8400_ALRCGPIO1                        0x8000  /* ALRCGPIO1 */
    331. 

  331. #define WM8400_ALRCGPIO1_MASK                   0x8000  /* ALRCGPIO1 */
    332. 

  332. #define WM8400_ALRCGPIO1_SHIFT                      15  /* ALRCGPIO1 */
    333. 

  333. #define WM8400_ALRCGPIO1_WIDTH                       1  /* ALRCGPIO1 */
    334. 

  334. #define WM8400_ALRCBGPIO6                       0x4000  /* ALRCBGPIO6 */
    335. 

  335. #define WM8400_ALRCBGPIO6_MASK                  0x4000  /* ALRCBGPIO6 */
    336. 

  336. #define WM8400_ALRCBGPIO6_SHIFT                     14  /* ALRCBGPIO6 */
    337. 

  337. #define WM8400_ALRCBGPIO6_WIDTH                      1  /* ALRCBGPIO6 */
    338. 

  338. #define WM8400_AIF_TRIS                         0x2000  /* AIF_TRIS */
    339. 

  339. #define WM8400_AIF_TRIS_MASK                    0x2000  /* AIF_TRIS */
    340. 

  340. #define WM8400_AIF_TRIS_SHIFT                       13  /* AIF_TRIS */
    341. 

  341. #define WM8400_AIF_TRIS_WIDTH                        1  /* AIF_TRIS */
    342. 

  342. #define WM8400_DACLRC_DIR                       0x0800  /* DACLRC_DIR */
    343. 

  343. #define WM8400_DACLRC_DIR_MASK                  0x0800  /* DACLRC_DIR */
    344. 

  344. #define WM8400_DACLRC_DIR_SHIFT                     11  /* DACLRC_DIR */
    345. 

  345. #define WM8400_DACLRC_DIR_WIDTH                      1  /* DACLRC_DIR */
    346. 

  346. #define WM8400_DACLRC_RATE_MASK                 0x07FF  /* DACLRC_RATE - [10:0] */
    347. 

  347. #define WM8400_DACLRC_RATE_SHIFT                     0  /* DACLRC_RATE - [10:0] */
    348. 

  348. #define WM8400_DACLRC_RATE_WIDTH                    11  /* DACLRC_RATE - [10:0] */
    349. 

  349. 

  350. /*
    351. 

  351.  * R11 (0x0B) - DAC CTRL
    352. 

  352.  */
    353. 

  353. #define WM8400_DAC_SDMCLK_RATE                  0x2000  /* DAC_SDMCLK_RATE */
    354. 

  354. #define WM8400_DAC_SDMCLK_RATE_MASK             0x2000  /* DAC_SDMCLK_RATE */
    355. 

  355. #define WM8400_DAC_SDMCLK_RATE_SHIFT                13  /* DAC_SDMCLK_RATE */
    356. 

  356. #define WM8400_DAC_SDMCLK_RATE_WIDTH                 1  /* DAC_SDMCLK_RATE */
    357. 

  357. #define WM8400_AIF_LRCLKRATE                    0x0400  /* AIF_LRCLKRATE */
    358. 

  358. #define WM8400_AIF_LRCLKRATE_MASK               0x0400  /* AIF_LRCLKRATE */
    359. 

  359. #define WM8400_AIF_LRCLKRATE_SHIFT                  10  /* AIF_LRCLKRATE */
    360. 

  360. #define WM8400_AIF_LRCLKRATE_WIDTH                   1  /* AIF_LRCLKRATE */
    361. 

  361. #define WM8400_DAC_MONO                         0x0200  /* DAC_MONO */
    362. 

  362. #define WM8400_DAC_MONO_MASK                    0x0200  /* DAC_MONO */
    363. 

  363. #define WM8400_DAC_MONO_SHIFT                        9  /* DAC_MONO */
    364. 

  364. #define WM8400_DAC_MONO_WIDTH                        1  /* DAC_MONO */
    365. 

  365. #define WM8400_DAC_SB_FILT                      0x0100  /* DAC_SB_FILT */
    366. 

  366. #define WM8400_DAC_SB_FILT_MASK                 0x0100  /* DAC_SB_FILT */
    367. 

  367. #define WM8400_DAC_SB_FILT_SHIFT                     8  /* DAC_SB_FILT */
    368. 

  368. #define WM8400_DAC_SB_FILT_WIDTH                     1  /* DAC_SB_FILT */
    369. 

  369. #define WM8400_DAC_MUTERATE                     0x0080  /* DAC_MUTERATE */
    370. 

  370. #define WM8400_DAC_MUTERATE_MASK                0x0080  /* DAC_MUTERATE */
    371. 

  371. #define WM8400_DAC_MUTERATE_SHIFT                    7  /* DAC_MUTERATE */
    372. 

  372. #define WM8400_DAC_MUTERATE_WIDTH                    1  /* DAC_MUTERATE */
    373. 

  373. #define WM8400_DAC_MUTEMODE                     0x0040  /* DAC_MUTEMODE */
    374. 

  374. #define WM8400_DAC_MUTEMODE_MASK                0x0040  /* DAC_MUTEMODE */
    375. 

  375. #define WM8400_DAC_MUTEMODE_SHIFT                    6  /* DAC_MUTEMODE */
    376. 

  376. #define WM8400_DAC_MUTEMODE_WIDTH                    1  /* DAC_MUTEMODE */
    377. 

  377. #define WM8400_DEEMP_MASK                       0x0030  /* DEEMP - [5:4] */
    378. 

  378. #define WM8400_DEEMP_SHIFT                           4  /* DEEMP - [5:4] */
    379. 

  379. #define WM8400_DEEMP_WIDTH                           2  /* DEEMP - [5:4] */
    380. 

  380. #define WM8400_DAC_MUTE                         0x0004  /* DAC_MUTE */
    381. 

  381. #define WM8400_DAC_MUTE_MASK                    0x0004  /* DAC_MUTE */
    382. 

  382. #define WM8400_DAC_MUTE_SHIFT                        2  /* DAC_MUTE */
    383. 

  383. #define WM8400_DAC_MUTE_WIDTH                        1  /* DAC_MUTE */
    384. 

  384. #define WM8400_DACL_DATINV                      0x0002  /* DACL_DATINV */
    385. 

  385. #define WM8400_DACL_DATINV_MASK                 0x0002  /* DACL_DATINV */
    386. 

  386. #define WM8400_DACL_DATINV_SHIFT                     1  /* DACL_DATINV */
    387. 

  387. #define WM8400_DACL_DATINV_WIDTH                     1  /* DACL_DATINV */
    388. 

  388. #define WM8400_DACR_DATINV                      0x0001  /* DACR_DATINV */
    389. 

  389. #define WM8400_DACR_DATINV_MASK                 0x0001  /* DACR_DATINV */
    390. 

  390. #define WM8400_DACR_DATINV_SHIFT                     0  /* DACR_DATINV */
    391. 

  391. #define WM8400_DACR_DATINV_WIDTH                     1  /* DACR_DATINV */
    392. 

  392. 

  393. /*
    394. 

  394.  * R12 (0x0C) - Left DAC Digital Volume
    395. 

  395.  */
    396. 

  396. #define WM8400_DAC_VU                           0x0100  /* DAC_VU */
    397. 

  397. #define WM8400_DAC_VU_MASK                      0x0100  /* DAC_VU */
    398. 

  398. #define WM8400_DAC_VU_SHIFT                          8  /* DAC_VU */
    399. 

  399. #define WM8400_DAC_VU_WIDTH                          1  /* DAC_VU */
    400. 

  400. #define WM8400_DACL_VOL_MASK                    0x00FF  /* DACL_VOL - [7:0] */
    401. 

  401. #define WM8400_DACL_VOL_SHIFT                        0  /* DACL_VOL - [7:0] */
    402. 

  402. #define WM8400_DACL_VOL_WIDTH                        8  /* DACL_VOL - [7:0] */
    403. 

  403. 

  404. /*
    405. 

  405.  * R13 (0x0D) - Right DAC Digital Volume
    406. 

  406.  */
    407. 

  407. #define WM8400_DAC_VU                           0x0100  /* DAC_VU */
    408. 

  408. #define WM8400_DAC_VU_MASK                      0x0100  /* DAC_VU */
    409. 

  409. #define WM8400_DAC_VU_SHIFT                          8  /* DAC_VU */
    410. 

  410. #define WM8400_DAC_VU_WIDTH                          1  /* DAC_VU */
    411. 

  411. #define WM8400_DACR_VOL_MASK                    0x00FF  /* DACR_VOL - [7:0] */
    412. 

  412. #define WM8400_DACR_VOL_SHIFT                        0  /* DACR_VOL - [7:0] */
    413. 

  413. #define WM8400_DACR_VOL_WIDTH                        8  /* DACR_VOL - [7:0] */
    414. 

  414. 

  415. /*
    416. 

  416.  * R14 (0x0E) - Digital Side Tone
    417. 

  417.  */
    418. 

  418. #define WM8400_ADCL_DAC_SVOL_MASK               0x1E00  /*   ADCL_DAC_SVOL - [12:9] */
    419. 

  419. #define WM8400_ADCL_DAC_SVOL_SHIFT                   9  /*   ADCL_DAC_SVOL - [12:9] */
    420. 

  420. #define WM8400_ADCL_DAC_SVOL_WIDTH                   4  /*   ADCL_DAC_SVOL - [12:9] */
    421. 

  421. #define WM8400_ADCR_DAC_SVOL_MASK               0x01E0  /* ADCR_DAC_SVOL - [8:5] */
    422. 

  422. #define WM8400_ADCR_DAC_SVOL_SHIFT                   5  /* ADCR_DAC_SVOL - [8:5] */
    423. 

  423. #define WM8400_ADCR_DAC_SVOL_WIDTH                   4  /* ADCR_DAC_SVOL - [8:5] */
    424. 

  424. #define WM8400_ADC_TO_DACL_MASK                 0x000C  /* ADC_TO_DACL - [3:2] */
    425. 

  425. #define WM8400_ADC_TO_DACL_SHIFT                     2  /* ADC_TO_DACL - [3:2] */
    426. 

  426. #define WM8400_ADC_TO_DACL_WIDTH                     2  /* ADC_TO_DACL - [3:2] */
    427. 

  427. #define WM8400_ADC_TO_DACR_MASK                 0x0003  /* ADC_TO_DACR - [1:0] */
    428. 

  428. #define WM8400_ADC_TO_DACR_SHIFT                     0  /* ADC_TO_DACR - [1:0] */
    429. 

  429. #define WM8400_ADC_TO_DACR_WIDTH                     2  /* ADC_TO_DACR - [1:0] */
    430. 

  430. 

  431. /*
    432. 

  432.  * R15 (0x0F) - ADC CTRL
    433. 

  433.  */
    434. 

  434. #define WM8400_ADC_HPF_ENA                      0x0100  /* ADC_HPF_ENA */
    435. 

  435. #define WM8400_ADC_HPF_ENA_MASK                 0x0100  /* ADC_HPF_ENA */
    436. 

  436. #define WM8400_ADC_HPF_ENA_SHIFT                     8  /* ADC_HPF_ENA */
    437. 

  437. #define WM8400_ADC_HPF_ENA_WIDTH                     1  /* ADC_HPF_ENA */
    438. 

  438. #define WM8400_ADC_HPF_CUT_MASK                 0x0060  /* ADC_HPF_CUT - [6:5] */
    439. 

  439. #define WM8400_ADC_HPF_CUT_SHIFT                     5  /* ADC_HPF_CUT - [6:5] */
    440. 

  440. #define WM8400_ADC_HPF_CUT_WIDTH                     2  /* ADC_HPF_CUT - [6:5] */
    441. 

  441. #define WM8400_ADCL_DATINV                      0x0002  /* ADCL_DATINV */
    442. 

  442. #define WM8400_ADCL_DATINV_MASK                 0x0002  /* ADCL_DATINV */
    443. 

  443. #define WM8400_ADCL_DATINV_SHIFT                     1  /* ADCL_DATINV */
    444. 

  444. #define WM8400_ADCL_DATINV_WIDTH                     1  /* ADCL_DATINV */
    445. 

  445. #define WM8400_ADCR_DATINV                      0x0001  /* ADCR_DATINV */
    446. 

  446. #define WM8400_ADCR_DATINV_MASK                 0x0001  /* ADCR_DATINV */
    447. 

  447. #define WM8400_ADCR_DATINV_SHIFT                     0  /* ADCR_DATINV */
    448. 

  448. #define WM8400_ADCR_DATINV_WIDTH                     1  /* ADCR_DATINV */
    449. 

  449. 

  450. /*
    451. 

  451.  * R16 (0x10) - Left ADC Digital Volume
    452. 

  452.  */
    453. 

  453. #define WM8400_ADC_VU                           0x0100  /* ADC_VU */
    454. 

  454. #define WM8400_ADC_VU_MASK                      0x0100  /* ADC_VU */
    455. 

  455. #define WM8400_ADC_VU_SHIFT                          8  /* ADC_VU */
    456. 

  456. #define WM8400_ADC_VU_WIDTH                          1  /* ADC_VU */
    457. 

  457. #define WM8400_ADCL_VOL_MASK                    0x00FF  /* ADCL_VOL - [7:0] */
    458. 

  458. #define WM8400_ADCL_VOL_SHIFT                        0  /* ADCL_VOL - [7:0] */
    459. 

  459. #define WM8400_ADCL_VOL_WIDTH                        8  /* ADCL_VOL - [7:0] */
    460. 

  460. 

  461. /*
    462. 

  462.  * R17 (0x11) - Right ADC Digital Volume
    463. 

  463.  */
    464. 

  464. #define WM8400_ADC_VU                           0x0100  /* ADC_VU */
    465. 

  465. #define WM8400_ADC_VU_MASK                      0x0100  /* ADC_VU */
    466. 

  466. #define WM8400_ADC_VU_SHIFT                          8  /* ADC_VU */
    467. 

  467. #define WM8400_ADC_VU_WIDTH                          1  /* ADC_VU */
    468. 

  468. #define WM8400_ADCR_VOL_MASK                    0x00FF  /* ADCR_VOL - [7:0] */
    469. 

  469. #define WM8400_ADCR_VOL_SHIFT                        0  /* ADCR_VOL - [7:0] */
    470. 

  470. #define WM8400_ADCR_VOL_WIDTH                        8  /* ADCR_VOL - [7:0] */
    471. 

  471. 

  472. /*
    473. 

  473.  * R24 (0x18) - Left Line Input 1&2 Volume
    474. 

  474.  */
    475. 

  475. #define WM8400_IPVU                             0x0100  /* IPVU */
    476. 

  476. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
    477. 

  477. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
    478. 

  478. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
    479. 

  479. #define WM8400_LI12MUTE                         0x0080  /* LI12MUTE */
    480. 

  480. #define WM8400_LI12MUTE_MASK                    0x0080  /* LI12MUTE */
    481. 

  481. #define WM8400_LI12MUTE_SHIFT                        7  /* LI12MUTE */
    482. 

  482. #define WM8400_LI12MUTE_WIDTH                        1  /* LI12MUTE */
    483. 

  483. #define WM8400_LI12ZC                           0x0040  /* LI12ZC */
    484. 

  484. #define WM8400_LI12ZC_MASK                      0x0040  /* LI12ZC */
    485. 

  485. #define WM8400_LI12ZC_SHIFT                          6  /* LI12ZC */
    486. 

  486. #define WM8400_LI12ZC_WIDTH                          1  /* LI12ZC */
    487. 

  487. #define WM8400_LIN12VOL_MASK                    0x001F  /* LIN12VOL - [4:0] */
    488. 

  488. #define WM8400_LIN12VOL_SHIFT                        0  /* LIN12VOL - [4:0] */
    489. 

  489. #define WM8400_LIN12VOL_WIDTH                        5  /* LIN12VOL - [4:0] */
    490. 

  490. 

  491. /*
    492. 

  492.  * R25 (0x19) - Left Line Input 3&4 Volume
    493. 

  493.  */
    494. 

  494. #define WM8400_IPVU                             0x0100  /* IPVU */
    495. 

  495. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
    496. 

  496. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
    497. 

  497. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
    498. 

  498. #define WM8400_LI34MUTE                         0x0080  /* LI34MUTE */
    499. 

  499. #define WM8400_LI34MUTE_MASK                    0x0080  /* LI34MUTE */
    500. 

  500. #define WM8400_LI34MUTE_SHIFT                        7  /* LI34MUTE */
    501. 

  501. #define WM8400_LI34MUTE_WIDTH                        1  /* LI34MUTE */
    502. 

  502. #define WM8400_LI34ZC                           0x0040  /* LI34ZC */
    503. 

  503. #define WM8400_LI34ZC_MASK                      0x0040  /* LI34ZC */
    504. 

  504. #define WM8400_LI34ZC_SHIFT                          6  /* LI34ZC */
    505. 

  505. #define WM8400_LI34ZC_WIDTH                          1  /* LI34ZC */
    506. 

  506. #define WM8400_LIN34VOL_MASK                    0x001F  /* LIN34VOL - [4:0] */
    507. 

  507. #define WM8400_LIN34VOL_SHIFT                        0  /* LIN34VOL - [4:0] */
    508. 

  508. #define WM8400_LIN34VOL_WIDTH                        5  /* LIN34VOL - [4:0] */
    509. 

  509. 

  510. /*
    511. 

  511.  * R26 (0x1A) - Right Line Input 1&2 Volume
    512. 

  512.  */
    513. 

  513. #define WM8400_IPVU                             0x0100  /* IPVU */
    514. 

  514. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
    515. 

  515. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
    516. 

  516. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
    517. 

  517. #define WM8400_RI12MUTE                         0x0080  /* RI12MUTE */
    518. 

  518. #define WM8400_RI12MUTE_MASK                    0x0080  /* RI12MUTE */
    519. 

  519. #define WM8400_RI12MUTE_SHIFT                        7  /* RI12MUTE */
    520. 

  520. #define WM8400_RI12MUTE_WIDTH                        1  /* RI12MUTE */
    521. 

  521. #define WM8400_RI12ZC                           0x0040  /* RI12ZC */
    522. 

  522. #define WM8400_RI12ZC_MASK                      0x0040  /* RI12ZC */
    523. 

  523. #define WM8400_RI12ZC_SHIFT                          6  /* RI12ZC */
    524. 

  524. #define WM8400_RI12ZC_WIDTH                          1  /* RI12ZC */
    525. 

  525. #define WM8400_RIN12VOL_MASK                    0x001F  /* RIN12VOL - [4:0] */
    526. 

  526. #define WM8400_RIN12VOL_SHIFT                        0  /* RIN12VOL - [4:0] */
    527. 

  527. #define WM8400_RIN12VOL_WIDTH                        5  /* RIN12VOL - [4:0] */
    528. 

  528. 

  529. /*
    530. 

  530.  * R27 (0x1B) - Right Line Input 3&4 Volume
    531. 

  531.  */
    532. 

  532. #define WM8400_IPVU                             0x0100  /* IPVU */
    533. 

  533. #define WM8400_IPVU_MASK                        0x0100  /* IPVU */
    534. 

  534. #define WM8400_IPVU_SHIFT                            8  /* IPVU */
    535. 

  535. #define WM8400_IPVU_WIDTH                            1  /* IPVU */
    536. 

  536. #define WM8400_RI34MUTE                         0x0080  /* RI34MUTE */
    537. 

  537. #define WM8400_RI34MUTE_MASK                    0x0080  /* RI34MUTE */
    538. 

  538. #define WM8400_RI34MUTE_SHIFT                        7  /* RI34MUTE */
    539. 

  539. #define WM8400_RI34MUTE_WIDTH                        1  /* RI34MUTE */
    540. 

  540. #define WM8400_RI34ZC                           0x0040  /* RI34ZC */
    541. 

  541. #define WM8400_RI34ZC_MASK                      0x0040  /* RI34ZC */
    542. 

  542. #define WM8400_RI34ZC_SHIFT                          6  /* RI34ZC */
    543. 

  543. #define WM8400_RI34ZC_WIDTH                          1  /* RI34ZC */
    544. 

  544. #define WM8400_RIN34VOL_MASK                    0x001F  /* RIN34VOL - [4:0] */
    545. 

  545. #define WM8400_RIN34VOL_SHIFT                        0  /* RIN34VOL - [4:0] */
    546. 

  546. #define WM8400_RIN34VOL_WIDTH                        5  /* RIN34VOL - [4:0] */
    547. 

  547. 

  548. /*
    549. 

  549.  * R28 (0x1C) - Left Output Volume
    550. 

  550.  */
    551. 

  551. #define WM8400_OPVU                             0x0100  /* OPVU */
    552. 

  552. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
    553. 

  553. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
    554. 

  554. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
    555. 

  555. #define WM8400_LOZC                             0x0080  /* LOZC */
    556. 

  556. #define WM8400_LOZC_MASK                        0x0080  /* LOZC */
    557. 

  557. #define WM8400_LOZC_SHIFT                            7  /* LOZC */
    558. 

  558. #define WM8400_LOZC_WIDTH                            1  /* LOZC */
    559. 

  559. #define WM8400_LOUTVOL_MASK                     0x007F  /* LOUTVOL - [6:0] */
    560. 

  560. #define WM8400_LOUTVOL_SHIFT                         0  /* LOUTVOL - [6:0] */
    561. 

  561. #define WM8400_LOUTVOL_WIDTH                         7  /* LOUTVOL - [6:0] */
    562. 

  562. 

  563. /*
    564. 

  564.  * R29 (0x1D) - Right Output Volume
    565. 

  565.  */
    566. 

  566. #define WM8400_OPVU                             0x0100  /* OPVU */
    567. 

  567. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
    568. 

  568. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
    569. 

  569. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
    570. 

  570. #define WM8400_ROZC                             0x0080  /* ROZC */
    571. 

  571. #define WM8400_ROZC_MASK                        0x0080  /* ROZC */
    572. 

  572. #define WM8400_ROZC_SHIFT                            7  /* ROZC */
    573. 

  573. #define WM8400_ROZC_WIDTH                            1  /* ROZC */
    574. 

  574. #define WM8400_ROUTVOL_MASK                     0x007F  /* ROUTVOL - [6:0] */
    575. 

  575. #define WM8400_ROUTVOL_SHIFT                         0  /* ROUTVOL - [6:0] */
    576. 

  576. #define WM8400_ROUTVOL_WIDTH                         7  /* ROUTVOL - [6:0] */
    577. 

  577. 

  578. /*
    579. 

  579.  * R30 (0x1E) - Line Outputs Volume
    580. 

  580.  */
    581. 

  581. #define WM8400_LONMUTE                          0x0040  /* LONMUTE */
    582. 

  582. #define WM8400_LONMUTE_MASK                     0x0040  /* LONMUTE */
    583. 

  583. #define WM8400_LONMUTE_SHIFT                         6  /* LONMUTE */
    584. 

  584. #define WM8400_LONMUTE_WIDTH                         1  /* LONMUTE */
    585. 

  585. #define WM8400_LOPMUTE                          0x0020  /* LOPMUTE */
    586. 

  586. #define WM8400_LOPMUTE_MASK                     0x0020  /* LOPMUTE */
    587. 

  587. #define WM8400_LOPMUTE_SHIFT                         5  /* LOPMUTE */
    588. 

  588. #define WM8400_LOPMUTE_WIDTH                         1  /* LOPMUTE */
    589. 

  589. #define WM8400_LOATTN                           0x0010  /* LOATTN */
    590. 

  590. #define WM8400_LOATTN_MASK                      0x0010  /* LOATTN */
    591. 

  591. #define WM8400_LOATTN_SHIFT                          4  /* LOATTN */
    592. 

  592. #define WM8400_LOATTN_WIDTH                          1  /* LOATTN */
    593. 

  593. #define WM8400_RONMUTE                          0x0004  /* RONMUTE */
    594. 

  594. #define WM8400_RONMUTE_MASK                     0x0004  /* RONMUTE */
    595. 

  595. #define WM8400_RONMUTE_SHIFT                         2  /* RONMUTE */
    596. 

  596. #define WM8400_RONMUTE_WIDTH                         1  /* RONMUTE */
    597. 

  597. #define WM8400_ROPMUTE                          0x0002  /* ROPMUTE */
    598. 

  598. #define WM8400_ROPMUTE_MASK                     0x0002  /* ROPMUTE */
    599. 

  599. #define WM8400_ROPMUTE_SHIFT                         1  /* ROPMUTE */
    600. 

  600. #define WM8400_ROPMUTE_WIDTH                         1  /* ROPMUTE */
    601. 

  601. #define WM8400_ROATTN                           0x0001  /* ROATTN */
    602. 

  602. #define WM8400_ROATTN_MASK                      0x0001  /* ROATTN */
    603. 

  603. #define WM8400_ROATTN_SHIFT                          0  /* ROATTN */
    604. 

  604. #define WM8400_ROATTN_WIDTH                          1  /* ROATTN */
    605. 

  605. 

  606. /*
    607. 

  607.  * R31 (0x1F) - Out3/4 Volume
    608. 

  608.  */
    609. 

  609. #define WM8400_OUT3MUTE                         0x0020  /* OUT3MUTE */
    610. 

  610. #define WM8400_OUT3MUTE_MASK                    0x0020  /* OUT3MUTE */
    611. 

  611. #define WM8400_OUT3MUTE_SHIFT                        5  /* OUT3MUTE */
    612. 

  612. #define WM8400_OUT3MUTE_WIDTH                        1  /* OUT3MUTE */
    613. 

  613. #define WM8400_OUT3ATTN                         0x0010  /* OUT3ATTN */
    614. 

  614. #define WM8400_OUT3ATTN_MASK                    0x0010  /* OUT3ATTN */
    615. 

  615. #define WM8400_OUT3ATTN_SHIFT                        4  /* OUT3ATTN */
    616. 

  616. #define WM8400_OUT3ATTN_WIDTH                        1  /* OUT3ATTN */
    617. 

  617. #define WM8400_OUT4MUTE                         0x0002  /* OUT4MUTE */
    618. 

  618. #define WM8400_OUT4MUTE_MASK                    0x0002  /* OUT4MUTE */
    619. 

  619. #define WM8400_OUT4MUTE_SHIFT                        1  /* OUT4MUTE */
    620. 

  620. #define WM8400_OUT4MUTE_WIDTH                        1  /* OUT4MUTE */
    621. 

  621. #define WM8400_OUT4ATTN                         0x0001  /* OUT4ATTN */
    622. 

  622. #define WM8400_OUT4ATTN_MASK                    0x0001  /* OUT4ATTN */
    623. 

  623. #define WM8400_OUT4ATTN_SHIFT                        0  /* OUT4ATTN */
    624. 

  624. #define WM8400_OUT4ATTN_WIDTH                        1  /* OUT4ATTN */
    625. 

  625. 

  626. /*
    627. 

  627.  * R32 (0x20) - Left OPGA Volume
    628. 

  628.  */
    629. 

  629. #define WM8400_OPVU                             0x0100  /* OPVU */
    630. 

  630. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
    631. 

  631. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
    632. 

  632. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
    633. 

  633. #define WM8400_LOPGAZC                          0x0080  /* LOPGAZC */
    634. 

  634. #define WM8400_LOPGAZC_MASK                     0x0080  /* LOPGAZC */
    635. 

  635. #define WM8400_LOPGAZC_SHIFT                         7  /* LOPGAZC */
    636. 

  636. #define WM8400_LOPGAZC_WIDTH                         1  /* LOPGAZC */
    637. 

  637. #define WM8400_LOPGAVOL_MASK                    0x007F  /* LOPGAVOL - [6:0] */
    638. 

  638. #define WM8400_LOPGAVOL_SHIFT                        0  /* LOPGAVOL - [6:0] */
    639. 

  639. #define WM8400_LOPGAVOL_WIDTH                        7  /* LOPGAVOL - [6:0] */
    640. 

  640. 

  641. /*
    642. 

  642.  * R33 (0x21) - Right OPGA Volume
    643. 

  643.  */
    644. 

  644. #define WM8400_OPVU                             0x0100  /* OPVU */
    645. 

  645. #define WM8400_OPVU_MASK                        0x0100  /* OPVU */
    646. 

  646. #define WM8400_OPVU_SHIFT                            8  /* OPVU */
    647. 

  647. #define WM8400_OPVU_WIDTH                            1  /* OPVU */
    648. 

  648. #define WM8400_ROPGAZC                          0x0080  /* ROPGAZC */
    649. 

  649. #define WM8400_ROPGAZC_MASK                     0x0080  /* ROPGAZC */
    650. 

  650. #define WM8400_ROPGAZC_SHIFT                         7  /* ROPGAZC */
    651. 

  651. #define WM8400_ROPGAZC_WIDTH                         1  /* ROPGAZC */
    652. 

  652. #define WM8400_ROPGAVOL_MASK                    0x007F  /* ROPGAVOL - [6:0] */
    653. 

  653. #define WM8400_ROPGAVOL_SHIFT                        0  /* ROPGAVOL - [6:0] */
    654. 

  654. #define WM8400_ROPGAVOL_WIDTH                        7  /* ROPGAVOL - [6:0] */
    655. 

  655. 

  656. /*
    657. 

  657.  * R34 (0x22) - Speaker Volume
    658. 

  658.  */
    659. 

  659. #define WM8400_SPKATTN_MASK                     0x0003  /* SPKATTN - [1:0] */
    660. 

  660. #define WM8400_SPKATTN_SHIFT                         0  /* SPKATTN - [1:0] */
    661. 

  661. #define WM8400_SPKATTN_WIDTH                         2  /* SPKATTN - [1:0] */
    662. 

  662. 

  663. /*
    664. 

  664.  * R35 (0x23) - ClassD1
    665. 

  665.  */
    666. 

  666. #define WM8400_CDMODE                           0x0100  /* CDMODE */
    667. 

  667. #define WM8400_CDMODE_MASK                      0x0100  /* CDMODE */
    668. 

  668. #define WM8400_CDMODE_SHIFT                          8  /* CDMODE */
    669. 

  669. #define WM8400_CDMODE_WIDTH                          1  /* CDMODE */
    670. 

  670. #define WM8400_CLASSD_CLK_SEL                   0x0080  /* CLASSD_CLK_SEL */
    671. 

  671. #define WM8400_CLASSD_CLK_SEL_MASK              0x0080  /* CLASSD_CLK_SEL */
    672. 

  672. #define WM8400_CLASSD_CLK_SEL_SHIFT                  7  /* CLASSD_CLK_SEL */
    673. 

  673. #define WM8400_CLASSD_CLK_SEL_WIDTH                  1  /* CLASSD_CLK_SEL */
    674. 

  674. #define WM8400_CD_SRCTRL                        0x0040  /* CD_SRCTRL */
    675. 

  675. #define WM8400_CD_SRCTRL_MASK                   0x0040  /* CD_SRCTRL */
    676. 

  676. #define WM8400_CD_SRCTRL_SHIFT                       6  /* CD_SRCTRL */
    677. 

  677. #define WM8400_CD_SRCTRL_WIDTH                       1  /* CD_SRCTRL */
    678. 

  678. #define WM8400_SPKNOPOP                         0x0020  /* SPKNOPOP */
    679. 

  679. #define WM8400_SPKNOPOP_MASK                    0x0020  /* SPKNOPOP */
    680. 

  680. #define WM8400_SPKNOPOP_SHIFT                        5  /* SPKNOPOP */
    681. 

  681. #define WM8400_SPKNOPOP_WIDTH                        1  /* SPKNOPOP */
    682. 

  682. #define WM8400_DBLERATE                         0x0010  /* DBLERATE */
    683. 

  683. #define WM8400_DBLERATE_MASK                    0x0010  /* DBLERATE */
    684. 

  684. #define WM8400_DBLERATE_SHIFT                        4  /* DBLERATE */
    685. 

  685. #define WM8400_DBLERATE_WIDTH                        1  /* DBLERATE */
    686. 

  686. #define WM8400_LOOPTEST                         0x0008  /* LOOPTEST */
    687. 

  687. #define WM8400_LOOPTEST_MASK                    0x0008  /* LOOPTEST */
    688. 

  688. #define WM8400_LOOPTEST_SHIFT                        3  /* LOOPTEST */
    689. 

  689. #define WM8400_LOOPTEST_WIDTH                        1  /* LOOPTEST */
    690. 

  690. #define WM8400_HALFABBIAS                       0x0004  /* HALFABBIAS */
    691. 

  691. #define WM8400_HALFABBIAS_MASK                  0x0004  /* HALFABBIAS */
    692. 

  692. #define WM8400_HALFABBIAS_SHIFT                      2  /* HALFABBIAS */
    693. 

  693. #define WM8400_HALFABBIAS_WIDTH                      1  /* HALFABBIAS */
    694. 

  694. #define WM8400_TRIDEL_MASK                      0x0003  /* TRIDEL - [1:0] */
    695. 

  695. #define WM8400_TRIDEL_SHIFT                          0  /* TRIDEL - [1:0] */
    696. 

  696. #define WM8400_TRIDEL_WIDTH                          2  /* TRIDEL - [1:0] */
    697. 

  697. 

  698. /*
    699. 

  699.  * R37 (0x25) - ClassD3
    700. 

  700.  */
    701. 

  701. #define WM8400_DCGAIN_MASK                      0x0038  /* DCGAIN - [5:3] */
    702. 

  702. #define WM8400_DCGAIN_SHIFT                          3  /* DCGAIN - [5:3] */
    703. 

  703. #define WM8400_DCGAIN_WIDTH                          3  /* DCGAIN - [5:3] */
    704. 

  704. #define WM8400_ACGAIN_MASK                      0x0007  /* ACGAIN - [2:0] */
    705. 

  705. #define WM8400_ACGAIN_SHIFT                          0  /* ACGAIN - [2:0] */
    706. 

  706. #define WM8400_ACGAIN_WIDTH                          3  /* ACGAIN - [2:0] */
    707. 

  707. 

  708. /*
    709. 

  709.  * R39 (0x27) - Input Mixer1
    710. 

  710.  */
    711. 

  711. #define WM8400_AINLMODE_MASK                    0x000C  /* AINLMODE - [3:2] */
    712. 

  712. #define WM8400_AINLMODE_SHIFT                        2  /* AINLMODE - [3:2] */
    713. 

  713. #define WM8400_AINLMODE_WIDTH                        2  /* AINLMODE - [3:2] */
    714. 

  714. #define WM8400_AINRMODE_MASK                    0x0003  /* AINRMODE - [1:0] */
    715. 

  715. #define WM8400_AINRMODE_SHIFT                        0  /* AINRMODE - [1:0] */
    716. 

  716. #define WM8400_AINRMODE_WIDTH                        2  /* AINRMODE - [1:0] */
    717. 

  717. 

  718. /*
    719. 

  719.  * R40 (0x28) - Input Mixer2
    720. 

  720.  */
    721. 

  721. #define WM8400_LMP4                             0x0080  /* LMP4 */
    722. 

  722. #define WM8400_LMP4_MASK                        0x0080  /* LMP4 */
    723. 

  723. #define WM8400_LMP4_SHIFT                            7  /* LMP4 */
    724. 

  724. #define WM8400_LMP4_WIDTH                            1  /* LMP4 */
    725. 

  725. #define WM8400_LMN3                             0x0040  /* LMN3 */
    726. 

  726. #define WM8400_LMN3_MASK                        0x0040  /* LMN3 */
    727. 

  727. #define WM8400_LMN3_SHIFT                            6  /* LMN3 */
    728. 

  728. #define WM8400_LMN3_WIDTH                            1  /* LMN3 */
    729. 

  729. #define WM8400_LMP2                             0x0020  /* LMP2 */
    730. 

  730. #define WM8400_LMP2_MASK                        0x0020  /* LMP2 */
    731. 

  731. #define WM8400_LMP2_SHIFT                            5  /* LMP2 */
    732. 

  732. #define WM8400_LMP2_WIDTH                            1  /* LMP2 */
    733. 

  733. #define WM8400_LMN1                             0x0010  /* LMN1 */
    734. 

  734. #define WM8400_LMN1_MASK                        0x0010  /* LMN1 */
    735. 

  735. #define WM8400_LMN1_SHIFT                            4  /* LMN1 */
    736. 

  736. #define WM8400_LMN1_WIDTH                            1  /* LMN1 */
    737. 

  737. #define WM8400_RMP4                             0x0008  /* RMP4 */
    738. 

  738. #define WM8400_RMP4_MASK                        0x0008  /* RMP4 */
    739. 

  739. #define WM8400_RMP4_SHIFT                            3  /* RMP4 */
    740. 

  740. #define WM8400_RMP4_WIDTH                            1  /* RMP4 */
    741. 

  741. #define WM8400_RMN3                             0x0004  /* RMN3 */
    742. 

  742. #define WM8400_RMN3_MASK                        0x0004  /* RMN3 */
    743. 

  743. #define WM8400_RMN3_SHIFT                            2  /* RMN3 */
    744. 

  744. #define WM8400_RMN3_WIDTH                            1  /* RMN3 */
    745. 

  745. #define WM8400_RMP2                             0x0002  /* RMP2 */
    746. 

  746. #define WM8400_RMP2_MASK                        0x0002  /* RMP2 */
    747. 

  747. #define WM8400_RMP2_SHIFT                            1  /* RMP2 */
    748. 

  748. #define WM8400_RMP2_WIDTH                            1  /* RMP2 */
    749. 

  749. #define WM8400_RMN1                             0x0001  /* RMN1 */
    750. 

  750. #define WM8400_RMN1_MASK                        0x0001  /* RMN1 */
    751. 

  751. #define WM8400_RMN1_SHIFT                            0  /* RMN1 */
    752. 

  752. #define WM8400_RMN1_WIDTH                            1  /* RMN1 */
    753. 

  753. 

  754. /*
    755. 

  755.  * R41 (0x29) - Input Mixer3
    756. 

  756.  */
    757. 

  757. #define WM8400_L34MNB                           0x0100  /* L34MNB */
    758. 

  758. #define WM8400_L34MNB_MASK                      0x0100  /* L34MNB */
    759. 

  759. #define WM8400_L34MNB_SHIFT                          8  /* L34MNB */
    760. 

  760. #define WM8400_L34MNB_WIDTH                          1  /* L34MNB */
    761. 

  761. #define WM8400_L34MNBST                         0x0080  /* L34MNBST */
    762. 

  762. #define WM8400_L34MNBST_MASK                    0x0080  /* L34MNBST */
    763. 

  763. #define WM8400_L34MNBST_SHIFT                        7  /* L34MNBST */
    764. 

  764. #define WM8400_L34MNBST_WIDTH                        1  /* L34MNBST */
    765. 

  765. #define WM8400_L12MNB                           0x0020  /* L12MNB */
    766. 

  766. #define WM8400_L12MNB_MASK                      0x0020  /* L12MNB */
    767. 

  767. #define WM8400_L12MNB_SHIFT                          5  /* L12MNB */
    768. 

  768. #define WM8400_L12MNB_WIDTH                          1  /* L12MNB */
    769. 

  769. #define WM8400_L12MNBST                         0x0010  /* L12MNBST */
    770. 

  770. #define WM8400_L12MNBST_MASK                    0x0010  /* L12MNBST */
    771. 

  771. #define WM8400_L12MNBST_SHIFT                        4  /* L12MNBST */
    772. 

  772. #define WM8400_L12MNBST_WIDTH                        1  /* L12MNBST */
    773. 

  773. #define WM8400_LDBVOL_MASK                      0x0007  /* LDBVOL - [2:0] */
    774. 

  774. #define WM8400_LDBVOL_SHIFT                          0  /* LDBVOL - [2:0] */
    775. 

  775. #define WM8400_LDBVOL_WIDTH                          3  /* LDBVOL - [2:0] */
    776. 

  776. 

  777. /*
    778. 

  778.  * R42 (0x2A) - Input Mixer4
    779. 

  779.  */
    780. 

  780. #define WM8400_R34MNB                           0x0100  /* R34MNB */
    781. 

  781. #define WM8400_R34MNB_MASK                      0x0100  /* R34MNB */
    782. 

  782. #define WM8400_R34MNB_SHIFT                          8  /* R34MNB */
    783. 

  783. #define WM8400_R34MNB_WIDTH                          1  /* R34MNB */
    784. 

  784. #define WM8400_R34MNBST                         0x0080  /* R34MNBST */
    785. 

  785. #define WM8400_R34MNBST_MASK                    0x0080  /* R34MNBST */
    786. 

  786. #define WM8400_R34MNBST_SHIFT                        7  /* R34MNBST */
    787. 

  787. #define WM8400_R34MNBST_WIDTH                        1  /* R34MNBST */
    788. 

  788. #define WM8400_R12MNB                           0x0020  /* R12MNB */
    789. 

  789. #define WM8400_R12MNB_MASK                      0x0020  /* R12MNB */
    790. 

  790. #define WM8400_R12MNB_SHIFT                          5  /* R12MNB */
    791. 

  791. #define WM8400_R12MNB_WIDTH                          1  /* R12MNB */
    792. 

  792. #define WM8400_R12MNBST                         0x0010  /* R12MNBST */
    793. 

  793. #define WM8400_R12MNBST_MASK                    0x0010  /* R12MNBST */
    794. 

  794. #define WM8400_R12MNBST_SHIFT                        4  /* R12MNBST */
    795. 

  795. #define WM8400_R12MNBST_WIDTH                        1  /* R12MNBST */
    796. 

  796. #define WM8400_RDBVOL_MASK                      0x0007  /* RDBVOL - [2:0] */
    797. 

  797. #define WM8400_RDBVOL_SHIFT                          0  /* RDBVOL - [2:0] */
    798. 

  798. #define WM8400_RDBVOL_WIDTH                          3  /* RDBVOL - [2:0] */
    799. 

  799. 

  800. /*
    801. 

  801.  * R43 (0x2B) - Input Mixer5
    802. 

  802.  */
    803. 

  803. #define WM8400_LI2BVOL_MASK                     0x01C0  /* LI2BVOL - [8:6] */
    804. 

  804. #define WM8400_LI2BVOL_SHIFT                         6  /* LI2BVOL - [8:6] */
    805. 

  805. #define WM8400_LI2BVOL_WIDTH                         3  /* LI2BVOL - [8:6] */
    806. 

  806. #define WM8400_LR4BVOL_MASK                     0x0038  /* LR4BVOL - [5:3] */
    807. 

  807. #define WM8400_LR4BVOL_SHIFT                         3  /* LR4BVOL - [5:3] */
    808. 

  808. #define WM8400_LR4BVOL_WIDTH                         3  /* LR4BVOL - [5:3] */
    809. 

  809. #define WM8400_LL4BVOL_MASK                     0x0007  /* LL4BVOL - [2:0] */
    810. 

  810. #define WM8400_LL4BVOL_SHIFT                         0  /* LL4BVOL - [2:0] */
    811. 

  811. #define WM8400_LL4BVOL_WIDTH                         3  /* LL4BVOL - [2:0] */
    812. 

  812. 

  813. /*
    814. 

  814.  * R44 (0x2C) - Input Mixer6
    815. 

  815.  */
    816. 

  816. #define WM8400_RI2BVOL_MASK                     0x01C0  /* RI2BVOL - [8:6] */
    817. 

  817. #define WM8400_RI2BVOL_SHIFT                         6  /* RI2BVOL - [8:6] */
    818. 

  818. #define WM8400_RI2BVOL_WIDTH                         3  /* RI2BVOL - [8:6] */
    819. 

  819. #define WM8400_RL4BVOL_MASK                     0x0038  /* RL4BVOL - [5:3] */
    820. 

  820. #define WM8400_RL4BVOL_SHIFT                         3  /* RL4BVOL - [5:3] */
    821. 

  821. #define WM8400_RL4BVOL_WIDTH                         3  /* RL4BVOL - [5:3] */
    822. 

  822. #define WM8400_RR4BVOL_MASK                     0x0007  /* RR4BVOL - [2:0] */
    823. 

  823. #define WM8400_RR4BVOL_SHIFT…
    824.