/include/drm/kgsl_drm.h
C++ Header | 221 lines | 139 code | 44 blank | 38 comment | 0 complexity | 0e05203a50a7feca9d50b6214a7d4749 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1/* Copyright (c) 2009-2010, Code Aurora Forum. All rights reserved. 2 * 3 * Redistribution and use in source and binary forms, with or without 4 * modification, are permitted provided that the following conditions are 5 * met: 6 * * Redistributions of source code must retain the above copyright 7 * notice, this list of conditions and the following disclaimer. 8 * * Redistributions in binary form must reproduce the above 9 * copyright notice, this list of conditions and the following 10 * disclaimer in the documentation and/or other materials provided 11 * with the distribution. 12 * * Neither the name of Code Aurora Forum, Inc. nor the names of its 13 * contributors may be used to endorse or promote products derived 14 * from this software without specific prior written permission. 15 * 16 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED 17 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 18 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS 20 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR 23 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 24 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE 25 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN 26 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 27 * 28 */ 29 30#ifndef _KGSL_DRM_H_ 31#define _KGSL_DRM_H_ 32 33#include "drm.h" 34 35#define DRM_KGSL_GEM_CREATE 0x00 36#define DRM_KGSL_GEM_PREP 0x01 37#define DRM_KGSL_GEM_SETMEMTYPE 0x02 38#define DRM_KGSL_GEM_GETMEMTYPE 0x03 39#define DRM_KGSL_GEM_MMAP 0x04 40#define DRM_KGSL_GEM_ALLOC 0x05 41#define DRM_KGSL_GEM_BIND_GPU 0x06 42#define DRM_KGSL_GEM_UNBIND_GPU 0x07 43 44#define DRM_KGSL_GEM_GET_BUFINFO 0x08 45#define DRM_KGSL_GEM_SET_BUFCOUNT 0x09 46#define DRM_KGSL_GEM_SET_ACTIVE 0x0A 47#define DRM_KGSL_GEM_LOCK_HANDLE 0x0B 48#define DRM_KGSL_GEM_UNLOCK_HANDLE 0x0C 49#define DRM_KGSL_GEM_UNLOCK_ON_TS 0x0D 50#define DRM_KGSL_GEM_CREATE_FD 0x0E 51 52#define DRM_IOCTL_KGSL_GEM_CREATE \ 53DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE, struct drm_kgsl_gem_create) 54 55#define DRM_IOCTL_KGSL_GEM_PREP \ 56DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_PREP, struct drm_kgsl_gem_prep) 57 58#define DRM_IOCTL_KGSL_GEM_SETMEMTYPE \ 59DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SETMEMTYPE, \ 60struct drm_kgsl_gem_memtype) 61 62#define DRM_IOCTL_KGSL_GEM_GETMEMTYPE \ 63DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GETMEMTYPE, \ 64struct drm_kgsl_gem_memtype) 65 66#define DRM_IOCTL_KGSL_GEM_MMAP \ 67DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_MMAP, struct drm_kgsl_gem_mmap) 68 69#define DRM_IOCTL_KGSL_GEM_ALLOC \ 70DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_ALLOC, struct drm_kgsl_gem_alloc) 71 72#define DRM_IOCTL_KGSL_GEM_BIND_GPU \ 73DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_BIND_GPU, struct drm_kgsl_gem_bind_gpu) 74 75#define DRM_IOCTL_KGSL_GEM_UNBIND_GPU \ 76DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNBIND_GPU, \ 77struct drm_kgsl_gem_bind_gpu) 78 79#define DRM_IOCTL_KGSL_GEM_GET_BUFINFO \ 80DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_GET_BUFINFO, \ 81 struct drm_kgsl_gem_bufinfo) 82 83#define DRM_IOCTL_KGSL_GEM_SET_BUFCOUNT \ 84DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_BUFCOUNT, \ 85 struct drm_kgsl_gem_bufcount) 86 87#define DRM_IOCTL_KGSL_GEM_SET_ACTIVE \ 88DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_SET_ACTIVE, \ 89 struct drm_kgsl_gem_active) 90 91#define DRM_IOCTL_KGSL_GEM_LOCK_HANDLE \ 92DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_LOCK_HANDLE, \ 93struct drm_kgsl_gem_lock_handles) 94 95#define DRM_IOCTL_KGSL_GEM_UNLOCK_HANDLE \ 96DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_HANDLE, \ 97struct drm_kgsl_gem_unlock_handles) 98 99#define DRM_IOCTL_KGSL_GEM_UNLOCK_ON_TS \ 100DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_UNLOCK_ON_TS, \ 101struct drm_kgsl_gem_unlock_on_ts) 102 103#define DRM_IOCTL_KGSL_GEM_CREATE_FD \ 104DRM_IOWR(DRM_COMMAND_BASE + DRM_KGSL_GEM_CREATE_FD, \ 105struct drm_kgsl_gem_create_fd) 106 107/* Maximum number of sub buffers per GEM object */ 108#define DRM_KGSL_GEM_MAX_BUFFERS 2 109 110/* Memory types - these define the source and caching policies 111 of the GEM memory chunk */ 112 113/* Legacy definitions left for compatability */ 114 115#define DRM_KGSL_GEM_TYPE_EBI 0 116#define DRM_KGSL_GEM_TYPE_SMI 1 117#define DRM_KGSL_GEM_TYPE_KMEM 2 118#define DRM_KGSL_GEM_TYPE_KMEM_NOCACHE 3 119#define DRM_KGSL_GEM_TYPE_MEM_MASK 0xF 120 121/* Contiguous memory (PMEM) */ 122#define DRM_KGSL_GEM_TYPE_PMEM 0x000100 123 124/* PMEM memory types */ 125#define DRM_KGSL_GEM_PMEM_EBI 0x001000 126#define DRM_KGSL_GEM_PMEM_SMI 0x002000 127 128/* Standard paged memory */ 129#define DRM_KGSL_GEM_TYPE_MEM 0x010000 130 131/* Caching controls */ 132#define DRM_KGSL_GEM_CACHE_NONE 0x000000 133#define DRM_KGSL_GEM_CACHE_WCOMBINE 0x100000 134#define DRM_KGSL_GEM_CACHE_WTHROUGH 0x200000 135#define DRM_KGSL_GEM_CACHE_WBACK 0x400000 136#define DRM_KGSL_GEM_CACHE_WBACKWA 0x800000 137#define DRM_KGSL_GEM_CACHE_MASK 0xF00000 138 139/* FD based objects */ 140#define DRM_KGSL_GEM_TYPE_FD_FBMEM 0x1000000 141#define DRM_KGSL_GEM_TYPE_FD_MASK 0xF000000 142 143/* Timestamp types */ 144#define DRM_KGSL_GEM_TS_3D 0x00000430 145#define DRM_KGSL_GEM_TS_2D 0x00000180 146 147 148struct drm_kgsl_gem_create { 149 uint32_t size; 150 uint32_t handle; 151}; 152 153struct drm_kgsl_gem_prep { 154 uint32_t handle; 155 uint32_t phys; 156 uint64_t offset; 157}; 158 159struct drm_kgsl_gem_memtype { 160 uint32_t handle; 161 uint32_t type; 162}; 163 164struct drm_kgsl_gem_mmap { 165 uint32_t handle; 166 uint32_t size; 167 uint32_t hostptr; 168 uint64_t offset; 169}; 170 171struct drm_kgsl_gem_alloc { 172 uint32_t handle; 173 uint64_t offset; 174}; 175 176struct drm_kgsl_gem_bind_gpu { 177 uint32_t handle; 178 uint32_t gpuptr; 179}; 180 181struct drm_kgsl_gem_bufinfo { 182 uint32_t handle; 183 uint32_t count; 184 uint32_t active; 185 uint32_t offset[DRM_KGSL_GEM_MAX_BUFFERS]; 186 uint32_t gpuaddr[DRM_KGSL_GEM_MAX_BUFFERS]; 187}; 188 189struct drm_kgsl_gem_bufcount { 190 uint32_t handle; 191 uint32_t bufcount; 192}; 193 194struct drm_kgsl_gem_active { 195 uint32_t handle; 196 uint32_t active; 197}; 198 199struct drm_kgsl_gem_lock_handles { 200 uint32_t num_handles; 201 uint32_t *handle_list; 202 uint32_t pid; 203 uint32_t lock_id; /* Returned lock id used for unlocking */ 204}; 205 206struct drm_kgsl_gem_unlock_handles { 207 uint32_t lock_id; 208}; 209 210struct drm_kgsl_gem_unlock_on_ts { 211 uint32_t lock_id; 212 uint32_t timestamp; /* This field is a hw generated ts */ 213 uint32_t type; /* Which pipe to check for ts generation */ 214}; 215 216struct drm_kgsl_gem_create_fd { 217 uint32_t fd; 218 uint32_t handle; 219}; 220 221#endif