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/arch/mips/include/asm/asmmacro.h

https://bitbucket.org/thekraven/iscream_thunderc-2.6.35
C++ Header | 92 lines | 69 code | 13 blank | 10 comment | 0 complexity | 7a8e489b4eebd310cf0e7c4bbe66cceb MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
 1/*
 2 * This file is subject to the terms and conditions of the GNU General Public
 3 * License.  See the file "COPYING" in the main directory of this archive
 4 * for more details.
 5 *
 6 * Copyright (C) 2003 Ralf Baechle
 7 */
 8#ifndef _ASM_ASMMACRO_H
 9#define _ASM_ASMMACRO_H
10
11#include <asm/hazards.h>
12
13#ifdef CONFIG_32BIT
14#include <asm/asmmacro-32.h>
15#endif
16#ifdef CONFIG_64BIT
17#include <asm/asmmacro-64.h>
18#endif
19#ifdef CONFIG_MIPS_MT_SMTC
20#include <asm/mipsmtregs.h>
21#endif
22
23#ifdef CONFIG_MIPS_MT_SMTC
24	.macro	local_irq_enable reg=t0
25	mfc0	\reg, CP0_TCSTATUS
26	ori	\reg, \reg, TCSTATUS_IXMT
27	xori	\reg, \reg, TCSTATUS_IXMT
28	mtc0	\reg, CP0_TCSTATUS
29	_ehb
30	.endm
31
32	.macro	local_irq_disable reg=t0
33	mfc0	\reg, CP0_TCSTATUS
34	ori	\reg, \reg, TCSTATUS_IXMT
35	mtc0	\reg, CP0_TCSTATUS
36	_ehb
37	.endm
38#elif defined(CONFIG_CPU_MIPSR2)
39	.macro	local_irq_enable reg=t0
40	ei
41	irq_enable_hazard
42	.endm
43
44	.macro	local_irq_disable reg=t0
45	di
46	irq_disable_hazard
47	.endm
48#else
49	.macro	local_irq_enable reg=t0
50	mfc0	\reg, CP0_STATUS
51	ori	\reg, \reg, 1
52	mtc0	\reg, CP0_STATUS
53	irq_enable_hazard
54	.endm
55
56	.macro	local_irq_disable reg=t0
57	mfc0	\reg, CP0_STATUS
58	ori	\reg, \reg, 1
59	xori	\reg, \reg, 1
60	mtc0	\reg, CP0_STATUS
61	irq_disable_hazard
62	.endm
63#endif /* CONFIG_MIPS_MT_SMTC */
64
65/*
66 * Temporary until all gas have MT ASE support
67 */
68	.macro	DMT	reg=0
69	.word	0x41600bc1 | (\reg << 16)
70	.endm
71
72	.macro	EMT	reg=0
73	.word	0x41600be1 | (\reg << 16)
74	.endm
75
76	.macro	DVPE	reg=0
77	.word	0x41600001 | (\reg << 16)
78	.endm
79
80	.macro	EVPE	reg=0
81	.word	0x41600021 | (\reg << 16)
82	.endm
83
84	.macro	MFTR	rt=0, rd=0, u=0, sel=0
85	 .word	0x41000000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
86	.endm
87
88	.macro	MTTR	rt=0, rd=0, u=0, sel=0
89	 .word	0x41800000 | (\rt << 16) | (\rd << 11) | (\u << 5) | (\sel)
90	.endm
91
92#endif /* _ASM_ASMMACRO_H */