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/arch/mips/include/asm/octeon/octeon-feature.h

https://bitbucket.org/thekraven/iscream_thunderc-2.6.35
C++ Header | 142 lines | 74 code | 10 blank | 58 comment | 23 complexity | 2e5532a5a5e83c4a5f27019d3456aa3e MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1/***********************license start***************
  2 * Author: Cavium Networks
  3 *
  4 * Contact: support@caviumnetworks.com
  5 * This file is part of the OCTEON SDK
  6 *
  7 * Copyright (c) 2003-2008 Cavium Networks
  8 *
  9 * This file is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License, Version 2, as
 11 * published by the Free Software Foundation.
 12 *
 13 * This file is distributed in the hope that it will be useful, but
 14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 16 * NONINFRINGEMENT.  See the GNU General Public License for more
 17 * details.
 18 *
 19 * You should have received a copy of the GNU General Public License
 20 * along with this file; if not, write to the Free Software
 21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
 22 * or visit http://www.gnu.org/licenses/.
 23 *
 24 * This file may also be available under a different license from Cavium.
 25 * Contact Cavium Networks for more information
 26 ***********************license end**************************************/
 27
 28/*
 29 * File defining checks for different Octeon features.
 30 */
 31
 32#ifndef __OCTEON_FEATURE_H__
 33#define __OCTEON_FEATURE_H__
 34
 35enum octeon_feature {
 36	/*
 37	 * Octeon models in the CN5XXX family and higher support
 38	 * atomic add instructions to memory (saa/saad).
 39	 */
 40	OCTEON_FEATURE_SAAD,
 41	/* Does this Octeon support the ZIP offload engine? */
 42	OCTEON_FEATURE_ZIP,
 43	/* Does this Octeon support crypto acceleration using COP2? */
 44	OCTEON_FEATURE_CRYPTO,
 45	/* Does this Octeon support PCI express? */
 46	OCTEON_FEATURE_PCIE,
 47	/* Some Octeon models support internal memory for storing
 48	 * cryptographic keys */
 49	OCTEON_FEATURE_KEY_MEMORY,
 50	/* Octeon has a LED controller for banks of external LEDs */
 51	OCTEON_FEATURE_LED_CONTROLLER,
 52	/* Octeon has a trace buffer */
 53	OCTEON_FEATURE_TRA,
 54	/* Octeon has a management port */
 55	OCTEON_FEATURE_MGMT_PORT,
 56	/* Octeon has a raid unit */
 57	OCTEON_FEATURE_RAID,
 58	/* Octeon has a builtin USB */
 59	OCTEON_FEATURE_USB,
 60	/* Octeon IPD can run without using work queue entries */
 61	OCTEON_FEATURE_NO_WPTR,
 62	/* Octeon has DFA state machines */
 63	OCTEON_FEATURE_DFA,
 64	/* Octeon MDIO block supports clause 45 transactions for 10
 65	 * Gig support */
 66	OCTEON_FEATURE_MDIO_CLAUSE_45,
 67};
 68
 69static inline int cvmx_fuse_read(int fuse);
 70
 71/**
 72 * Determine if the current Octeon supports a specific feature. These
 73 * checks have been optimized to be fairly quick, but they should still
 74 * be kept out of fast path code.
 75 *
 76 * @feature: Feature to check for. This should always be a constant so the
 77 *                compiler can remove the switch statement through optimization.
 78 *
 79 * Returns Non zero if the feature exists. Zero if the feature does not
 80 *         exist.
 81 */
 82static inline int octeon_has_feature(enum octeon_feature feature)
 83{
 84	switch (feature) {
 85	case OCTEON_FEATURE_SAAD:
 86		return !OCTEON_IS_MODEL(OCTEON_CN3XXX);
 87
 88	case OCTEON_FEATURE_ZIP:
 89		if (OCTEON_IS_MODEL(OCTEON_CN30XX)
 90		    || OCTEON_IS_MODEL(OCTEON_CN50XX)
 91		    || OCTEON_IS_MODEL(OCTEON_CN52XX))
 92			return 0;
 93		else if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1))
 94			return 1;
 95		else
 96			return !cvmx_fuse_read(121);
 97
 98	case OCTEON_FEATURE_CRYPTO:
 99		return !cvmx_fuse_read(90);
100
101	case OCTEON_FEATURE_PCIE:
102	case OCTEON_FEATURE_MGMT_PORT:
103	case OCTEON_FEATURE_RAID:
104		return OCTEON_IS_MODEL(OCTEON_CN56XX)
105			|| OCTEON_IS_MODEL(OCTEON_CN52XX);
106
107	case OCTEON_FEATURE_KEY_MEMORY:
108	case OCTEON_FEATURE_LED_CONTROLLER:
109		return OCTEON_IS_MODEL(OCTEON_CN38XX)
110			|| OCTEON_IS_MODEL(OCTEON_CN58XX)
111			|| OCTEON_IS_MODEL(OCTEON_CN56XX);
112	case OCTEON_FEATURE_TRA:
113		return !(OCTEON_IS_MODEL(OCTEON_CN30XX)
114			 || OCTEON_IS_MODEL(OCTEON_CN50XX));
115	case OCTEON_FEATURE_USB:
116		return !(OCTEON_IS_MODEL(OCTEON_CN38XX)
117			 || OCTEON_IS_MODEL(OCTEON_CN58XX));
118	case OCTEON_FEATURE_NO_WPTR:
119		return (OCTEON_IS_MODEL(OCTEON_CN56XX)
120			 || OCTEON_IS_MODEL(OCTEON_CN52XX))
121			&& !OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X)
122			&& !OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X);
123	case OCTEON_FEATURE_DFA:
124		if (!OCTEON_IS_MODEL(OCTEON_CN38XX)
125		    && !OCTEON_IS_MODEL(OCTEON_CN31XX)
126		    && !OCTEON_IS_MODEL(OCTEON_CN58XX))
127			return 0;
128		else if (OCTEON_IS_MODEL(OCTEON_CN3020))
129			return 0;
130		else if (OCTEON_IS_MODEL(OCTEON_CN38XX_PASS1))
131			return 1;
132		else
133			return !cvmx_fuse_read(120);
134	case OCTEON_FEATURE_MDIO_CLAUSE_45:
135		return !(OCTEON_IS_MODEL(OCTEON_CN3XXX)
136			 || OCTEON_IS_MODEL(OCTEON_CN58XX)
137			 || OCTEON_IS_MODEL(OCTEON_CN50XX));
138	}
139	return 0;
140}
141
142#endif /* __OCTEON_FEATURE_H__ */