/arch/m32r/include/asm/opsput/opsput_lan.h

 1#ifndef _OPSPUT_OPSPUT_LAN_H
 2#define _OPSPUT_OPSPUT_LAN_H
 3
 4/*
 5 * include/asm-m32r/opsput/opsput_lan.h
 6 *
 7 * OPSPUT-LAN board
 8 *
 9 * Copyright (c) 2002-2004	Takeo Takahashi, Mamoru Sakugawa
10 *
11 * This file is subject to the terms and conditions of the GNU General
12 * Public License.  See the file "COPYING" in the main directory of
13 * this archive for more details.
14 */
15
16#ifndef __ASSEMBLY__
17/*
18 * C functions use non-cache address.
19 */
20#define OPSPUT_LAN_BASE	(0x10000000 /* + NONCACHE_OFFSET */)
21#else
22#define OPSPUT_LAN_BASE	(0x10000000 + NONCACHE_OFFSET)
23#endif /* __ASSEMBLY__ */
24
25/* ICU
26 *  ICUISTS:	status register
27 *  ICUIREQ0: 	request register
28 *  ICUIREQ1: 	request register
29 *  ICUCR3:	control register for CFIREQ# interrupt
30 *  ICUCR4:	control register for CFC Card insert interrupt
31 *  ICUCR5:	control register for CFC Card eject interrupt
32 *  ICUCR6:	control register for external interrupt
33 *  ICUCR11:	control register for MMC Card insert/eject interrupt
34 *  ICUCR13:	control register for SC error interrupt
35 *  ICUCR14:	control register for SC receive interrupt
36 *  ICUCR15:	control register for SC send interrupt
37 *  ICUCR16:	control register for SIO0 receive interrupt
38 *  ICUCR17:	control register for SIO0 send interrupt
39 */
40#define OPSPUT_LAN_IRQ_LAN	(OPSPUT_LAN_PLD_IRQ_BASE + 1)	/* LAN */
41#define OPSPUT_LAN_IRQ_I2C	(OPSPUT_LAN_PLD_IRQ_BASE + 3)	/* I2C */
42
43#define OPSPUT_LAN_ICUISTS	__reg16(OPSPUT_LAN_BASE + 0xc0002)
44#define OPSPUT_LAN_ICUISTS_VECB_MASK	(0xf000)
45#define OPSPUT_LAN_VECB(x)	((x) & OPSPUT_LAN_ICUISTS_VECB_MASK)
46#define OPSPUT_LAN_ICUISTS_ISN_MASK	(0x07c0)
47#define OPSPUT_LAN_ICUISTS_ISN(x)	((x) & OPSPUT_LAN_ICUISTS_ISN_MASK)
48#define OPSPUT_LAN_ICUIREQ0	__reg16(OPSPUT_LAN_BASE + 0xc0004)
49#define OPSPUT_LAN_ICUCR1	__reg16(OPSPUT_LAN_BASE + 0xc0010)
50#define OPSPUT_LAN_ICUCR3	__reg16(OPSPUT_LAN_BASE + 0xc0014)
51
52#endif /* _OPSPUT_OPSPUT_LAN_H */