/arch/x86/kernel/cpu/cpufreq/powernow-k8.c
C | 1599 lines | 1188 code | 278 blank | 133 comment | 255 complexity | 94c364ed941e0ef79f49455a78550c08 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1/* 2 * (c) 2003-2010 Advanced Micro Devices, Inc. 3 * Your use of this code is subject to the terms and conditions of the 4 * GNU general public license version 2. See "COPYING" or 5 * http://www.gnu.org/licenses/gpl.html 6 * 7 * Support : mark.langsdorf@amd.com 8 * 9 * Based on the powernow-k7.c module written by Dave Jones. 10 * (C) 2003 Dave Jones on behalf of SuSE Labs 11 * (C) 2004 Dominik Brodowski <linux@brodo.de> 12 * (C) 2004 Pavel Machek <pavel@suse.cz> 13 * Licensed under the terms of the GNU GPL License version 2. 14 * Based upon datasheets & sample CPUs kindly provided by AMD. 15 * 16 * Valuable input gratefully received from Dave Jones, Pavel Machek, 17 * Dominik Brodowski, Jacob Shin, and others. 18 * Originally developed by Paul Devriendt. 19 * Processor information obtained from Chapter 9 (Power and Thermal Management) 20 * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD 21 * Opteron Processors" available for download from www.amd.com 22 * 23 * Tables for specific CPUs can be inferred from 24 * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf 25 */ 26 27#include <linux/kernel.h> 28#include <linux/smp.h> 29#include <linux/module.h> 30#include <linux/init.h> 31#include <linux/cpufreq.h> 32#include <linux/slab.h> 33#include <linux/string.h> 34#include <linux/cpumask.h> 35#include <linux/sched.h> /* for current / set_cpus_allowed() */ 36#include <linux/io.h> 37#include <linux/delay.h> 38 39#include <asm/msr.h> 40 41#include <linux/acpi.h> 42#include <linux/mutex.h> 43#include <acpi/processor.h> 44 45#define PFX "powernow-k8: " 46#define VERSION "version 2.20.00" 47#include "powernow-k8.h" 48#include "mperf.h" 49 50/* serialize freq changes */ 51static DEFINE_MUTEX(fidvid_mutex); 52 53static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data); 54 55static int cpu_family = CPU_OPTERON; 56 57/* core performance boost */ 58static bool cpb_capable, cpb_enabled; 59static struct msr __percpu *msrs; 60 61static struct cpufreq_driver cpufreq_amd64_driver; 62 63#ifndef CONFIG_SMP 64static inline const struct cpumask *cpu_core_mask(int cpu) 65{ 66 return cpumask_of(0); 67} 68#endif 69 70/* Return a frequency in MHz, given an input fid */ 71static u32 find_freq_from_fid(u32 fid) 72{ 73 return 800 + (fid * 100); 74} 75 76/* Return a frequency in KHz, given an input fid */ 77static u32 find_khz_freq_from_fid(u32 fid) 78{ 79 return 1000 * find_freq_from_fid(fid); 80} 81 82static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data, 83 u32 pstate) 84{ 85 return data[pstate].frequency; 86} 87 88/* Return the vco fid for an input fid 89 * 90 * Each "low" fid has corresponding "high" fid, and you can get to "low" fids 91 * only from corresponding high fids. This returns "high" fid corresponding to 92 * "low" one. 93 */ 94static u32 convert_fid_to_vco_fid(u32 fid) 95{ 96 if (fid < HI_FID_TABLE_BOTTOM) 97 return 8 + (2 * fid); 98 else 99 return fid; 100} 101 102/* 103 * Return 1 if the pending bit is set. Unless we just instructed the processor 104 * to transition to a new state, seeing this bit set is really bad news. 105 */ 106static int pending_bit_stuck(void) 107{ 108 u32 lo, hi; 109 110 if (cpu_family == CPU_HW_PSTATE) 111 return 0; 112 113 rdmsr(MSR_FIDVID_STATUS, lo, hi); 114 return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0; 115} 116 117/* 118 * Update the global current fid / vid values from the status msr. 119 * Returns 1 on error. 120 */ 121static int query_current_values_with_pending_wait(struct powernow_k8_data *data) 122{ 123 u32 lo, hi; 124 u32 i = 0; 125 126 if (cpu_family == CPU_HW_PSTATE) { 127 rdmsr(MSR_PSTATE_STATUS, lo, hi); 128 i = lo & HW_PSTATE_MASK; 129 data->currpstate = i; 130 131 /* 132 * a workaround for family 11h erratum 311 might cause 133 * an "out-of-range Pstate if the core is in Pstate-0 134 */ 135 if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps)) 136 data->currpstate = HW_PSTATE_0; 137 138 return 0; 139 } 140 do { 141 if (i++ > 10000) { 142 dprintk("detected change pending stuck\n"); 143 return 1; 144 } 145 rdmsr(MSR_FIDVID_STATUS, lo, hi); 146 } while (lo & MSR_S_LO_CHANGE_PENDING); 147 148 data->currvid = hi & MSR_S_HI_CURRENT_VID; 149 data->currfid = lo & MSR_S_LO_CURRENT_FID; 150 151 return 0; 152} 153 154/* the isochronous relief time */ 155static void count_off_irt(struct powernow_k8_data *data) 156{ 157 udelay((1 << data->irt) * 10); 158 return; 159} 160 161/* the voltage stabilization time */ 162static void count_off_vst(struct powernow_k8_data *data) 163{ 164 udelay(data->vstable * VST_UNITS_20US); 165 return; 166} 167 168/* need to init the control msr to a safe value (for each cpu) */ 169static void fidvid_msr_init(void) 170{ 171 u32 lo, hi; 172 u8 fid, vid; 173 174 rdmsr(MSR_FIDVID_STATUS, lo, hi); 175 vid = hi & MSR_S_HI_CURRENT_VID; 176 fid = lo & MSR_S_LO_CURRENT_FID; 177 lo = fid | (vid << MSR_C_LO_VID_SHIFT); 178 hi = MSR_C_HI_STP_GNT_BENIGN; 179 dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi); 180 wrmsr(MSR_FIDVID_CTL, lo, hi); 181} 182 183/* write the new fid value along with the other control fields to the msr */ 184static int write_new_fid(struct powernow_k8_data *data, u32 fid) 185{ 186 u32 lo; 187 u32 savevid = data->currvid; 188 u32 i = 0; 189 190 if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) { 191 printk(KERN_ERR PFX "internal error - overflow on fid write\n"); 192 return 1; 193 } 194 195 lo = fid; 196 lo |= (data->currvid << MSR_C_LO_VID_SHIFT); 197 lo |= MSR_C_LO_INIT_FID_VID; 198 199 dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n", 200 fid, lo, data->plllock * PLL_LOCK_CONVERSION); 201 202 do { 203 wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION); 204 if (i++ > 100) { 205 printk(KERN_ERR PFX 206 "Hardware error - pending bit very stuck - " 207 "no further pstate changes possible\n"); 208 return 1; 209 } 210 } while (query_current_values_with_pending_wait(data)); 211 212 count_off_irt(data); 213 214 if (savevid != data->currvid) { 215 printk(KERN_ERR PFX 216 "vid change on fid trans, old 0x%x, new 0x%x\n", 217 savevid, data->currvid); 218 return 1; 219 } 220 221 if (fid != data->currfid) { 222 printk(KERN_ERR PFX 223 "fid trans failed, fid 0x%x, curr 0x%x\n", fid, 224 data->currfid); 225 return 1; 226 } 227 228 return 0; 229} 230 231/* Write a new vid to the hardware */ 232static int write_new_vid(struct powernow_k8_data *data, u32 vid) 233{ 234 u32 lo; 235 u32 savefid = data->currfid; 236 int i = 0; 237 238 if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) { 239 printk(KERN_ERR PFX "internal error - overflow on vid write\n"); 240 return 1; 241 } 242 243 lo = data->currfid; 244 lo |= (vid << MSR_C_LO_VID_SHIFT); 245 lo |= MSR_C_LO_INIT_FID_VID; 246 247 dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n", 248 vid, lo, STOP_GRANT_5NS); 249 250 do { 251 wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS); 252 if (i++ > 100) { 253 printk(KERN_ERR PFX "internal error - pending bit " 254 "very stuck - no further pstate " 255 "changes possible\n"); 256 return 1; 257 } 258 } while (query_current_values_with_pending_wait(data)); 259 260 if (savefid != data->currfid) { 261 printk(KERN_ERR PFX "fid changed on vid trans, old " 262 "0x%x new 0x%x\n", 263 savefid, data->currfid); 264 return 1; 265 } 266 267 if (vid != data->currvid) { 268 printk(KERN_ERR PFX "vid trans failed, vid 0x%x, " 269 "curr 0x%x\n", 270 vid, data->currvid); 271 return 1; 272 } 273 274 return 0; 275} 276 277/* 278 * Reduce the vid by the max of step or reqvid. 279 * Decreasing vid codes represent increasing voltages: 280 * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off. 281 */ 282static int decrease_vid_code_by_step(struct powernow_k8_data *data, 283 u32 reqvid, u32 step) 284{ 285 if ((data->currvid - reqvid) > step) 286 reqvid = data->currvid - step; 287 288 if (write_new_vid(data, reqvid)) 289 return 1; 290 291 count_off_vst(data); 292 293 return 0; 294} 295 296/* Change hardware pstate by single MSR write */ 297static int transition_pstate(struct powernow_k8_data *data, u32 pstate) 298{ 299 wrmsr(MSR_PSTATE_CTRL, pstate, 0); 300 data->currpstate = pstate; 301 return 0; 302} 303 304/* Change Opteron/Athlon64 fid and vid, by the 3 phases. */ 305static int transition_fid_vid(struct powernow_k8_data *data, 306 u32 reqfid, u32 reqvid) 307{ 308 if (core_voltage_pre_transition(data, reqvid, reqfid)) 309 return 1; 310 311 if (core_frequency_transition(data, reqfid)) 312 return 1; 313 314 if (core_voltage_post_transition(data, reqvid)) 315 return 1; 316 317 if (query_current_values_with_pending_wait(data)) 318 return 1; 319 320 if ((reqfid != data->currfid) || (reqvid != data->currvid)) { 321 printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, " 322 "curr 0x%x 0x%x\n", 323 smp_processor_id(), 324 reqfid, reqvid, data->currfid, data->currvid); 325 return 1; 326 } 327 328 dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n", 329 smp_processor_id(), data->currfid, data->currvid); 330 331 return 0; 332} 333 334/* Phase 1 - core voltage transition ... setup voltage */ 335static int core_voltage_pre_transition(struct powernow_k8_data *data, 336 u32 reqvid, u32 reqfid) 337{ 338 u32 rvosteps = data->rvo; 339 u32 savefid = data->currfid; 340 u32 maxvid, lo, rvomult = 1; 341 342 dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, " 343 "reqvid 0x%x, rvo 0x%x\n", 344 smp_processor_id(), 345 data->currfid, data->currvid, reqvid, data->rvo); 346 347 if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP)) 348 rvomult = 2; 349 rvosteps *= rvomult; 350 rdmsr(MSR_FIDVID_STATUS, lo, maxvid); 351 maxvid = 0x1f & (maxvid >> 16); 352 dprintk("ph1 maxvid=0x%x\n", maxvid); 353 if (reqvid < maxvid) /* lower numbers are higher voltages */ 354 reqvid = maxvid; 355 356 while (data->currvid > reqvid) { 357 dprintk("ph1: curr 0x%x, req vid 0x%x\n", 358 data->currvid, reqvid); 359 if (decrease_vid_code_by_step(data, reqvid, data->vidmvs)) 360 return 1; 361 } 362 363 while ((rvosteps > 0) && 364 ((rvomult * data->rvo + data->currvid) > reqvid)) { 365 if (data->currvid == maxvid) { 366 rvosteps = 0; 367 } else { 368 dprintk("ph1: changing vid for rvo, req 0x%x\n", 369 data->currvid - 1); 370 if (decrease_vid_code_by_step(data, data->currvid-1, 1)) 371 return 1; 372 rvosteps--; 373 } 374 } 375 376 if (query_current_values_with_pending_wait(data)) 377 return 1; 378 379 if (savefid != data->currfid) { 380 printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n", 381 data->currfid); 382 return 1; 383 } 384 385 dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n", 386 data->currfid, data->currvid); 387 388 return 0; 389} 390 391/* Phase 2 - core frequency transition */ 392static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid) 393{ 394 u32 vcoreqfid, vcocurrfid, vcofiddiff; 395 u32 fid_interval, savevid = data->currvid; 396 397 if (data->currfid == reqfid) { 398 printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n", 399 data->currfid); 400 return 0; 401 } 402 403 dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, " 404 "reqfid 0x%x\n", 405 smp_processor_id(), 406 data->currfid, data->currvid, reqfid); 407 408 vcoreqfid = convert_fid_to_vco_fid(reqfid); 409 vcocurrfid = convert_fid_to_vco_fid(data->currfid); 410 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid 411 : vcoreqfid - vcocurrfid; 412 413 if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP)) 414 vcofiddiff = 0; 415 416 while (vcofiddiff > 2) { 417 (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2); 418 419 if (reqfid > data->currfid) { 420 if (data->currfid > LO_FID_TABLE_TOP) { 421 if (write_new_fid(data, 422 data->currfid + fid_interval)) 423 return 1; 424 } else { 425 if (write_new_fid 426 (data, 427 2 + convert_fid_to_vco_fid(data->currfid))) 428 return 1; 429 } 430 } else { 431 if (write_new_fid(data, data->currfid - fid_interval)) 432 return 1; 433 } 434 435 vcocurrfid = convert_fid_to_vco_fid(data->currfid); 436 vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid 437 : vcoreqfid - vcocurrfid; 438 } 439 440 if (write_new_fid(data, reqfid)) 441 return 1; 442 443 if (query_current_values_with_pending_wait(data)) 444 return 1; 445 446 if (data->currfid != reqfid) { 447 printk(KERN_ERR PFX 448 "ph2: mismatch, failed fid transition, " 449 "curr 0x%x, req 0x%x\n", 450 data->currfid, reqfid); 451 return 1; 452 } 453 454 if (savevid != data->currvid) { 455 printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n", 456 savevid, data->currvid); 457 return 1; 458 } 459 460 dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n", 461 data->currfid, data->currvid); 462 463 return 0; 464} 465 466/* Phase 3 - core voltage transition flow ... jump to the final vid. */ 467static int core_voltage_post_transition(struct powernow_k8_data *data, 468 u32 reqvid) 469{ 470 u32 savefid = data->currfid; 471 u32 savereqvid = reqvid; 472 473 dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n", 474 smp_processor_id(), 475 data->currfid, data->currvid); 476 477 if (reqvid != data->currvid) { 478 if (write_new_vid(data, reqvid)) 479 return 1; 480 481 if (savefid != data->currfid) { 482 printk(KERN_ERR PFX 483 "ph3: bad fid change, save 0x%x, curr 0x%x\n", 484 savefid, data->currfid); 485 return 1; 486 } 487 488 if (data->currvid != reqvid) { 489 printk(KERN_ERR PFX 490 "ph3: failed vid transition\n, " 491 "req 0x%x, curr 0x%x", 492 reqvid, data->currvid); 493 return 1; 494 } 495 } 496 497 if (query_current_values_with_pending_wait(data)) 498 return 1; 499 500 if (savereqvid != data->currvid) { 501 dprintk("ph3 failed, currvid 0x%x\n", data->currvid); 502 return 1; 503 } 504 505 if (savefid != data->currfid) { 506 dprintk("ph3 failed, currfid changed 0x%x\n", 507 data->currfid); 508 return 1; 509 } 510 511 dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n", 512 data->currfid, data->currvid); 513 514 return 0; 515} 516 517static void check_supported_cpu(void *_rc) 518{ 519 u32 eax, ebx, ecx, edx; 520 int *rc = _rc; 521 522 *rc = -ENODEV; 523 524 if (current_cpu_data.x86_vendor != X86_VENDOR_AMD) 525 return; 526 527 eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); 528 if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) && 529 ((eax & CPUID_XFAM) < CPUID_XFAM_10H)) 530 return; 531 532 if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) { 533 if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) || 534 ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) { 535 printk(KERN_INFO PFX 536 "Processor cpuid %x not supported\n", eax); 537 return; 538 } 539 540 eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES); 541 if (eax < CPUID_FREQ_VOLT_CAPABILITIES) { 542 printk(KERN_INFO PFX 543 "No frequency change capabilities detected\n"); 544 return; 545 } 546 547 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); 548 if ((edx & P_STATE_TRANSITION_CAPABLE) 549 != P_STATE_TRANSITION_CAPABLE) { 550 printk(KERN_INFO PFX 551 "Power state transitions not supported\n"); 552 return; 553 } 554 } else { /* must be a HW Pstate capable processor */ 555 cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx); 556 if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE) 557 cpu_family = CPU_HW_PSTATE; 558 else 559 return; 560 } 561 562 *rc = 0; 563} 564 565static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst, 566 u8 maxvid) 567{ 568 unsigned int j; 569 u8 lastfid = 0xff; 570 571 for (j = 0; j < data->numps; j++) { 572 if (pst[j].vid > LEAST_VID) { 573 printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n", 574 j, pst[j].vid); 575 return -EINVAL; 576 } 577 if (pst[j].vid < data->rvo) { 578 /* vid + rvo >= 0 */ 579 printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate" 580 " %d\n", j); 581 return -ENODEV; 582 } 583 if (pst[j].vid < maxvid + data->rvo) { 584 /* vid + rvo >= maxvid */ 585 printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate" 586 " %d\n", j); 587 return -ENODEV; 588 } 589 if (pst[j].fid > MAX_FID) { 590 printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate" 591 " %d\n", j); 592 return -ENODEV; 593 } 594 if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) { 595 /* Only first fid is allowed to be in "low" range */ 596 printk(KERN_ERR FW_BUG PFX "two low fids - %d : " 597 "0x%x\n", j, pst[j].fid); 598 return -EINVAL; 599 } 600 if (pst[j].fid < lastfid) 601 lastfid = pst[j].fid; 602 } 603 if (lastfid & 1) { 604 printk(KERN_ERR FW_BUG PFX "lastfid invalid\n"); 605 return -EINVAL; 606 } 607 if (lastfid > LO_FID_TABLE_TOP) 608 printk(KERN_INFO FW_BUG PFX 609 "first fid not from lo freq table\n"); 610 611 return 0; 612} 613 614static void invalidate_entry(struct cpufreq_frequency_table *powernow_table, 615 unsigned int entry) 616{ 617 powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID; 618} 619 620static void print_basics(struct powernow_k8_data *data) 621{ 622 int j; 623 for (j = 0; j < data->numps; j++) { 624 if (data->powernow_table[j].frequency != 625 CPUFREQ_ENTRY_INVALID) { 626 if (cpu_family == CPU_HW_PSTATE) { 627 printk(KERN_INFO PFX 628 " %d : pstate %d (%d MHz)\n", j, 629 data->powernow_table[j].index, 630 data->powernow_table[j].frequency/1000); 631 } else { 632 printk(KERN_INFO PFX 633 " %d : fid 0x%x (%d MHz), vid 0x%x\n", 634 j, 635 data->powernow_table[j].index & 0xff, 636 data->powernow_table[j].frequency/1000, 637 data->powernow_table[j].index >> 8); 638 } 639 } 640 } 641 if (data->batps) 642 printk(KERN_INFO PFX "Only %d pstates on battery\n", 643 data->batps); 644} 645 646static u32 freq_from_fid_did(u32 fid, u32 did) 647{ 648 u32 mhz = 0; 649 650 if (boot_cpu_data.x86 == 0x10) 651 mhz = (100 * (fid + 0x10)) >> did; 652 else if (boot_cpu_data.x86 == 0x11) 653 mhz = (100 * (fid + 8)) >> did; 654 else 655 BUG(); 656 657 return mhz * 1000; 658} 659 660static int fill_powernow_table(struct powernow_k8_data *data, 661 struct pst_s *pst, u8 maxvid) 662{ 663 struct cpufreq_frequency_table *powernow_table; 664 unsigned int j; 665 666 if (data->batps) { 667 /* use ACPI support to get full speed on mains power */ 668 printk(KERN_WARNING PFX 669 "Only %d pstates usable (use ACPI driver for full " 670 "range\n", data->batps); 671 data->numps = data->batps; 672 } 673 674 for (j = 1; j < data->numps; j++) { 675 if (pst[j-1].fid >= pst[j].fid) { 676 printk(KERN_ERR PFX "PST out of sequence\n"); 677 return -EINVAL; 678 } 679 } 680 681 if (data->numps < 2) { 682 printk(KERN_ERR PFX "no p states to transition\n"); 683 return -ENODEV; 684 } 685 686 if (check_pst_table(data, pst, maxvid)) 687 return -EINVAL; 688 689 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) 690 * (data->numps + 1)), GFP_KERNEL); 691 if (!powernow_table) { 692 printk(KERN_ERR PFX "powernow_table memory alloc failure\n"); 693 return -ENOMEM; 694 } 695 696 for (j = 0; j < data->numps; j++) { 697 int freq; 698 powernow_table[j].index = pst[j].fid; /* lower 8 bits */ 699 powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */ 700 freq = find_khz_freq_from_fid(pst[j].fid); 701 powernow_table[j].frequency = freq; 702 } 703 powernow_table[data->numps].frequency = CPUFREQ_TABLE_END; 704 powernow_table[data->numps].index = 0; 705 706 if (query_current_values_with_pending_wait(data)) { 707 kfree(powernow_table); 708 return -EIO; 709 } 710 711 dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid); 712 data->powernow_table = powernow_table; 713 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) 714 print_basics(data); 715 716 for (j = 0; j < data->numps; j++) 717 if ((pst[j].fid == data->currfid) && 718 (pst[j].vid == data->currvid)) 719 return 0; 720 721 dprintk("currfid/vid do not match PST, ignoring\n"); 722 return 0; 723} 724 725/* Find and validate the PSB/PST table in BIOS. */ 726static int find_psb_table(struct powernow_k8_data *data) 727{ 728 struct psb_s *psb; 729 unsigned int i; 730 u32 mvs; 731 u8 maxvid; 732 u32 cpst = 0; 733 u32 thiscpuid; 734 735 for (i = 0xc0000; i < 0xffff0; i += 0x10) { 736 /* Scan BIOS looking for the signature. */ 737 /* It can not be at ffff0 - it is too big. */ 738 739 psb = phys_to_virt(i); 740 if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0) 741 continue; 742 743 dprintk("found PSB header at 0x%p\n", psb); 744 745 dprintk("table vers: 0x%x\n", psb->tableversion); 746 if (psb->tableversion != PSB_VERSION_1_4) { 747 printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n"); 748 return -ENODEV; 749 } 750 751 dprintk("flags: 0x%x\n", psb->flags1); 752 if (psb->flags1) { 753 printk(KERN_ERR FW_BUG PFX "unknown flags\n"); 754 return -ENODEV; 755 } 756 757 data->vstable = psb->vstable; 758 dprintk("voltage stabilization time: %d(*20us)\n", 759 data->vstable); 760 761 dprintk("flags2: 0x%x\n", psb->flags2); 762 data->rvo = psb->flags2 & 3; 763 data->irt = ((psb->flags2) >> 2) & 3; 764 mvs = ((psb->flags2) >> 4) & 3; 765 data->vidmvs = 1 << mvs; 766 data->batps = ((psb->flags2) >> 6) & 3; 767 768 dprintk("ramp voltage offset: %d\n", data->rvo); 769 dprintk("isochronous relief time: %d\n", data->irt); 770 dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs); 771 772 dprintk("numpst: 0x%x\n", psb->num_tables); 773 cpst = psb->num_tables; 774 if ((psb->cpuid == 0x00000fc0) || 775 (psb->cpuid == 0x00000fe0)) { 776 thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE); 777 if ((thiscpuid == 0x00000fc0) || 778 (thiscpuid == 0x00000fe0)) 779 cpst = 1; 780 } 781 if (cpst != 1) { 782 printk(KERN_ERR FW_BUG PFX "numpst must be 1\n"); 783 return -ENODEV; 784 } 785 786 data->plllock = psb->plllocktime; 787 dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime); 788 dprintk("maxfid: 0x%x\n", psb->maxfid); 789 dprintk("maxvid: 0x%x\n", psb->maxvid); 790 maxvid = psb->maxvid; 791 792 data->numps = psb->numps; 793 dprintk("numpstates: 0x%x\n", data->numps); 794 return fill_powernow_table(data, 795 (struct pst_s *)(psb+1), maxvid); 796 } 797 /* 798 * If you see this message, complain to BIOS manufacturer. If 799 * he tells you "we do not support Linux" or some similar 800 * nonsense, remember that Windows 2000 uses the same legacy 801 * mechanism that the old Linux PSB driver uses. Tell them it 802 * is broken with Windows 2000. 803 * 804 * The reference to the AMD documentation is chapter 9 in the 805 * BIOS and Kernel Developer's Guide, which is available on 806 * www.amd.com 807 */ 808 printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n"); 809 return -ENODEV; 810} 811 812static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data, 813 unsigned int index) 814{ 815 u64 control; 816 817 if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE)) 818 return; 819 820 control = data->acpi_data.states[index].control; 821 data->irt = (control >> IRT_SHIFT) & IRT_MASK; 822 data->rvo = (control >> RVO_SHIFT) & RVO_MASK; 823 data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK; 824 data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK; 825 data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK); 826 data->vstable = (control >> VST_SHIFT) & VST_MASK; 827} 828 829static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data) 830{ 831 struct cpufreq_frequency_table *powernow_table; 832 int ret_val = -ENODEV; 833 u64 control, status; 834 835 if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) { 836 dprintk("register performance failed: bad ACPI data\n"); 837 return -EIO; 838 } 839 840 /* verify the data contained in the ACPI structures */ 841 if (data->acpi_data.state_count <= 1) { 842 dprintk("No ACPI P-States\n"); 843 goto err_out; 844 } 845 846 control = data->acpi_data.control_register.space_id; 847 status = data->acpi_data.status_register.space_id; 848 849 if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) || 850 (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) { 851 dprintk("Invalid control/status registers (%x - %x)\n", 852 control, status); 853 goto err_out; 854 } 855 856 /* fill in data->powernow_table */ 857 powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table) 858 * (data->acpi_data.state_count + 1)), GFP_KERNEL); 859 if (!powernow_table) { 860 dprintk("powernow_table memory alloc failure\n"); 861 goto err_out; 862 } 863 864 /* fill in data */ 865 data->numps = data->acpi_data.state_count; 866 powernow_k8_acpi_pst_values(data, 0); 867 868 if (cpu_family == CPU_HW_PSTATE) 869 ret_val = fill_powernow_table_pstate(data, powernow_table); 870 else 871 ret_val = fill_powernow_table_fidvid(data, powernow_table); 872 if (ret_val) 873 goto err_out_mem; 874 875 powernow_table[data->acpi_data.state_count].frequency = 876 CPUFREQ_TABLE_END; 877 powernow_table[data->acpi_data.state_count].index = 0; 878 data->powernow_table = powernow_table; 879 880 if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu) 881 print_basics(data); 882 883 /* notify BIOS that we exist */ 884 acpi_processor_notify_smm(THIS_MODULE); 885 886 if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) { 887 printk(KERN_ERR PFX 888 "unable to alloc powernow_k8_data cpumask\n"); 889 ret_val = -ENOMEM; 890 goto err_out_mem; 891 } 892 893 return 0; 894 895err_out_mem: 896 kfree(powernow_table); 897 898err_out: 899 acpi_processor_unregister_performance(&data->acpi_data, data->cpu); 900 901 /* data->acpi_data.state_count informs us at ->exit() 902 * whether ACPI was used */ 903 data->acpi_data.state_count = 0; 904 905 return ret_val; 906} 907 908static int fill_powernow_table_pstate(struct powernow_k8_data *data, 909 struct cpufreq_frequency_table *powernow_table) 910{ 911 int i; 912 u32 hi = 0, lo = 0; 913 rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo); 914 data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT; 915 916 for (i = 0; i < data->acpi_data.state_count; i++) { 917 u32 index; 918 919 index = data->acpi_data.states[i].control & HW_PSTATE_MASK; 920 if (index > data->max_hw_pstate) { 921 printk(KERN_ERR PFX "invalid pstate %d - " 922 "bad value %d.\n", i, index); 923 printk(KERN_ERR PFX "Please report to BIOS " 924 "manufacturer\n"); 925 invalidate_entry(powernow_table, i); 926 continue; 927 } 928 rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi); 929 if (!(hi & HW_PSTATE_VALID_MASK)) { 930 dprintk("invalid pstate %d, ignoring\n", index); 931 invalidate_entry(powernow_table, i); 932 continue; 933 } 934 935 powernow_table[i].index = index; 936 937 /* Frequency may be rounded for these */ 938 if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10) 939 || boot_cpu_data.x86 == 0x11) { 940 powernow_table[i].frequency = 941 freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7); 942 } else 943 powernow_table[i].frequency = 944 data->acpi_data.states[i].core_frequency * 1000; 945 } 946 return 0; 947} 948 949static int fill_powernow_table_fidvid(struct powernow_k8_data *data, 950 struct cpufreq_frequency_table *powernow_table) 951{ 952 int i; 953 954 for (i = 0; i < data->acpi_data.state_count; i++) { 955 u32 fid; 956 u32 vid; 957 u32 freq, index; 958 u64 status, control; 959 960 if (data->exttype) { 961 status = data->acpi_data.states[i].status; 962 fid = status & EXT_FID_MASK; 963 vid = (status >> VID_SHIFT) & EXT_VID_MASK; 964 } else { 965 control = data->acpi_data.states[i].control; 966 fid = control & FID_MASK; 967 vid = (control >> VID_SHIFT) & VID_MASK; 968 } 969 970 dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid); 971 972 index = fid | (vid<<8); 973 powernow_table[i].index = index; 974 975 freq = find_khz_freq_from_fid(fid); 976 powernow_table[i].frequency = freq; 977 978 /* verify frequency is OK */ 979 if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) { 980 dprintk("invalid freq %u kHz, ignoring\n", freq); 981 invalidate_entry(powernow_table, i); 982 continue; 983 } 984 985 /* verify voltage is OK - 986 * BIOSs are using "off" to indicate invalid */ 987 if (vid == VID_OFF) { 988 dprintk("invalid vid %u, ignoring\n", vid); 989 invalidate_entry(powernow_table, i); 990 continue; 991 } 992 993 if (freq != (data->acpi_data.states[i].core_frequency * 1000)) { 994 printk(KERN_INFO PFX "invalid freq entries " 995 "%u kHz vs. %u kHz\n", freq, 996 (unsigned int) 997 (data->acpi_data.states[i].core_frequency 998 * 1000)); 999 invalidate_entry(powernow_table, i); 1000 continue; 1001 } 1002 } 1003 return 0; 1004} 1005 1006static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data) 1007{ 1008 if (data->acpi_data.state_count) 1009 acpi_processor_unregister_performance(&data->acpi_data, 1010 data->cpu); 1011 free_cpumask_var(data->acpi_data.shared_cpu_map); 1012} 1013 1014static int get_transition_latency(struct powernow_k8_data *data) 1015{ 1016 int max_latency = 0; 1017 int i; 1018 for (i = 0; i < data->acpi_data.state_count; i++) { 1019 int cur_latency = data->acpi_data.states[i].transition_latency 1020 + data->acpi_data.states[i].bus_master_latency; 1021 if (cur_latency > max_latency) 1022 max_latency = cur_latency; 1023 } 1024 if (max_latency == 0) { 1025 /* 1026 * Fam 11h and later may return 0 as transition latency. This 1027 * is intended and means "very fast". While cpufreq core and 1028 * governors currently can handle that gracefully, better set it 1029 * to 1 to avoid problems in the future. 1030 */ 1031 if (boot_cpu_data.x86 < 0x11) 1032 printk(KERN_ERR FW_WARN PFX "Invalid zero transition " 1033 "latency\n"); 1034 max_latency = 1; 1035 } 1036 /* value in usecs, needs to be in nanoseconds */ 1037 return 1000 * max_latency; 1038} 1039 1040/* Take a frequency, and issue the fid/vid transition command */ 1041static int transition_frequency_fidvid(struct powernow_k8_data *data, 1042 unsigned int index) 1043{ 1044 u32 fid = 0; 1045 u32 vid = 0; 1046 int res, i; 1047 struct cpufreq_freqs freqs; 1048 1049 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); 1050 1051 /* fid/vid correctness check for k8 */ 1052 /* fid are the lower 8 bits of the index we stored into 1053 * the cpufreq frequency table in find_psb_table, vid 1054 * are the upper 8 bits. 1055 */ 1056 fid = data->powernow_table[index].index & 0xFF; 1057 vid = (data->powernow_table[index].index & 0xFF00) >> 8; 1058 1059 dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid); 1060 1061 if (query_current_values_with_pending_wait(data)) 1062 return 1; 1063 1064 if ((data->currvid == vid) && (data->currfid == fid)) { 1065 dprintk("target matches current values (fid 0x%x, vid 0x%x)\n", 1066 fid, vid); 1067 return 0; 1068 } 1069 1070 dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n", 1071 smp_processor_id(), fid, vid); 1072 freqs.old = find_khz_freq_from_fid(data->currfid); 1073 freqs.new = find_khz_freq_from_fid(fid); 1074 1075 for_each_cpu(i, data->available_cores) { 1076 freqs.cpu = i; 1077 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 1078 } 1079 1080 res = transition_fid_vid(data, fid, vid); 1081 freqs.new = find_khz_freq_from_fid(data->currfid); 1082 1083 for_each_cpu(i, data->available_cores) { 1084 freqs.cpu = i; 1085 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 1086 } 1087 return res; 1088} 1089 1090/* Take a frequency, and issue the hardware pstate transition command */ 1091static int transition_frequency_pstate(struct powernow_k8_data *data, 1092 unsigned int index) 1093{ 1094 u32 pstate = 0; 1095 int res, i; 1096 struct cpufreq_freqs freqs; 1097 1098 dprintk("cpu %d transition to index %u\n", smp_processor_id(), index); 1099 1100 /* get MSR index for hardware pstate transition */ 1101 pstate = index & HW_PSTATE_MASK; 1102 if (pstate > data->max_hw_pstate) 1103 return 0; 1104 freqs.old = find_khz_freq_from_pstate(data->powernow_table, 1105 data->currpstate); 1106 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); 1107 1108 for_each_cpu(i, data->available_cores) { 1109 freqs.cpu = i; 1110 cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); 1111 } 1112 1113 res = transition_pstate(data, pstate); 1114 freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate); 1115 1116 for_each_cpu(i, data->available_cores) { 1117 freqs.cpu = i; 1118 cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); 1119 } 1120 return res; 1121} 1122 1123/* Driver entry point to switch to the target frequency */ 1124static int powernowk8_target(struct cpufreq_policy *pol, 1125 unsigned targfreq, unsigned relation) 1126{ 1127 cpumask_var_t oldmask; 1128 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); 1129 u32 checkfid; 1130 u32 checkvid; 1131 unsigned int newstate; 1132 int ret = -EIO; 1133 1134 if (!data) 1135 return -EINVAL; 1136 1137 checkfid = data->currfid; 1138 checkvid = data->currvid; 1139 1140 /* only run on specific CPU from here on. */ 1141 /* This is poor form: use a workqueue or smp_call_function_single */ 1142 if (!alloc_cpumask_var(&oldmask, GFP_KERNEL)) 1143 return -ENOMEM; 1144 1145 cpumask_copy(oldmask, tsk_cpus_allowed(current)); 1146 set_cpus_allowed_ptr(current, cpumask_of(pol->cpu)); 1147 1148 if (smp_processor_id() != pol->cpu) { 1149 printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu); 1150 goto err_out; 1151 } 1152 1153 if (pending_bit_stuck()) { 1154 printk(KERN_ERR PFX "failing targ, change pending bit set\n"); 1155 goto err_out; 1156 } 1157 1158 dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n", 1159 pol->cpu, targfreq, pol->min, pol->max, relation); 1160 1161 if (query_current_values_with_pending_wait(data)) 1162 goto err_out; 1163 1164 if (cpu_family != CPU_HW_PSTATE) { 1165 dprintk("targ: curr fid 0x%x, vid 0x%x\n", 1166 data->currfid, data->currvid); 1167 1168 if ((checkvid != data->currvid) || 1169 (checkfid != data->currfid)) { 1170 printk(KERN_INFO PFX 1171 "error - out of sync, fix 0x%x 0x%x, " 1172 "vid 0x%x 0x%x\n", 1173 checkfid, data->currfid, 1174 checkvid, data->currvid); 1175 } 1176 } 1177 1178 if (cpufreq_frequency_table_target(pol, data->powernow_table, 1179 targfreq, relation, &newstate)) 1180 goto err_out; 1181 1182 mutex_lock(&fidvid_mutex); 1183 1184 powernow_k8_acpi_pst_values(data, newstate); 1185 1186 if (cpu_family == CPU_HW_PSTATE) 1187 ret = transition_frequency_pstate(data, newstate); 1188 else 1189 ret = transition_frequency_fidvid(data, newstate); 1190 if (ret) { 1191 printk(KERN_ERR PFX "transition frequency failed\n"); 1192 ret = 1; 1193 mutex_unlock(&fidvid_mutex); 1194 goto err_out; 1195 } 1196 mutex_unlock(&fidvid_mutex); 1197 1198 if (cpu_family == CPU_HW_PSTATE) 1199 pol->cur = find_khz_freq_from_pstate(data->powernow_table, 1200 newstate); 1201 else 1202 pol->cur = find_khz_freq_from_fid(data->currfid); 1203 ret = 0; 1204 1205err_out: 1206 set_cpus_allowed_ptr(current, oldmask); 1207 free_cpumask_var(oldmask); 1208 return ret; 1209} 1210 1211/* Driver entry point to verify the policy and range of frequencies */ 1212static int powernowk8_verify(struct cpufreq_policy *pol) 1213{ 1214 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); 1215 1216 if (!data) 1217 return -EINVAL; 1218 1219 return cpufreq_frequency_table_verify(pol, data->powernow_table); 1220} 1221 1222struct init_on_cpu { 1223 struct powernow_k8_data *data; 1224 int rc; 1225}; 1226 1227static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu) 1228{ 1229 struct init_on_cpu *init_on_cpu = _init_on_cpu; 1230 1231 if (pending_bit_stuck()) { 1232 printk(KERN_ERR PFX "failing init, change pending bit set\n"); 1233 init_on_cpu->rc = -ENODEV; 1234 return; 1235 } 1236 1237 if (query_current_values_with_pending_wait(init_on_cpu->data)) { 1238 init_on_cpu->rc = -ENODEV; 1239 return; 1240 } 1241 1242 if (cpu_family == CPU_OPTERON) 1243 fidvid_msr_init(); 1244 1245 init_on_cpu->rc = 0; 1246} 1247 1248/* per CPU init entry point to the driver */ 1249static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol) 1250{ 1251 static const char ACPI_PSS_BIOS_BUG_MSG[] = 1252 KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n" 1253 FW_BUG PFX "Try again with latest BIOS.\n"; 1254 struct powernow_k8_data *data; 1255 struct init_on_cpu init_on_cpu; 1256 int rc; 1257 struct cpuinfo_x86 *c = &cpu_data(pol->cpu); 1258 1259 if (!cpu_online(pol->cpu)) 1260 return -ENODEV; 1261 1262 smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1); 1263 if (rc) 1264 return -ENODEV; 1265 1266 data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL); 1267 if (!data) { 1268 printk(KERN_ERR PFX "unable to alloc powernow_k8_data"); 1269 return -ENOMEM; 1270 } 1271 1272 data->cpu = pol->cpu; 1273 data->currpstate = HW_PSTATE_INVALID; 1274 1275 if (powernow_k8_cpu_init_acpi(data)) { 1276 /* 1277 * Use the PSB BIOS structure. This is only availabe on 1278 * an UP version, and is deprecated by AMD. 1279 */ 1280 if (num_online_cpus() != 1) { 1281 printk_once(ACPI_PSS_BIOS_BUG_MSG); 1282 goto err_out; 1283 } 1284 if (pol->cpu != 0) { 1285 printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for " 1286 "CPU other than CPU0. Complain to your BIOS " 1287 "vendor.\n"); 1288 goto err_out; 1289 } 1290 rc = find_psb_table(data); 1291 if (rc) 1292 goto err_out; 1293 1294 /* Take a crude guess here. 1295 * That guess was in microseconds, so multiply with 1000 */ 1296 pol->cpuinfo.transition_latency = ( 1297 ((data->rvo + 8) * data->vstable * VST_UNITS_20US) + 1298 ((1 << data->irt) * 30)) * 1000; 1299 } else /* ACPI _PSS objects available */ 1300 pol->cpuinfo.transition_latency = get_transition_latency(data); 1301 1302 /* only run on specific CPU from here on */ 1303 init_on_cpu.data = data; 1304 smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu, 1305 &init_on_cpu, 1); 1306 rc = init_on_cpu.rc; 1307 if (rc != 0) 1308 goto err_out_exit_acpi; 1309 1310 if (cpu_family == CPU_HW_PSTATE) 1311 cpumask_copy(pol->cpus, cpumask_of(pol->cpu)); 1312 else 1313 cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu)); 1314 data->available_cores = pol->cpus; 1315 1316 if (cpu_family == CPU_HW_PSTATE) 1317 pol->cur = find_khz_freq_from_pstate(data->powernow_table, 1318 data->currpstate); 1319 else 1320 pol->cur = find_khz_freq_from_fid(data->currfid); 1321 dprintk("policy current frequency %d kHz\n", pol->cur); 1322 1323 /* min/max the cpu is capable of */ 1324 if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) { 1325 printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n"); 1326 powernow_k8_cpu_exit_acpi(data); 1327 kfree(data->powernow_table); 1328 kfree(data); 1329 return -EINVAL; 1330 } 1331 1332 /* Check for APERF/MPERF support in hardware */ 1333 if (cpu_has(c, X86_FEATURE_APERFMPERF)) 1334 cpufreq_amd64_driver.getavg = cpufreq_get_measured_perf; 1335 1336 cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu); 1337 1338 if (cpu_family == CPU_HW_PSTATE) 1339 dprintk("cpu_init done, current pstate 0x%x\n", 1340 data->currpstate); 1341 else 1342 dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n", 1343 data->currfid, data->currvid); 1344 1345 per_cpu(powernow_data, pol->cpu) = data; 1346 1347 return 0; 1348 1349err_out_exit_acpi: 1350 powernow_k8_cpu_exit_acpi(data); 1351 1352err_out: 1353 kfree(data); 1354 return -ENODEV; 1355} 1356 1357static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol) 1358{ 1359 struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu); 1360 1361 if (!data) 1362 return -EINVAL; 1363 1364 powernow_k8_cpu_exit_acpi(data); 1365 1366 cpufreq_frequency_table_put_attr(pol->cpu); 1367 1368 kfree(data->powernow_table); 1369 kfree(data); 1370 per_cpu(powernow_data, pol->cpu) = NULL; 1371 1372 return 0; 1373} 1374 1375static void query_values_on_cpu(void *_err) 1376{ 1377 int *err = _err; 1378 struct powernow_k8_data *data = __get_cpu_var(powernow_data); 1379 1380 *err = query_current_values_with_pending_wait(data); 1381} 1382 1383static unsigned int powernowk8_get(unsigned int cpu) 1384{ 1385 struct powernow_k8_data *data = per_cpu(powernow_data, cpu); 1386 unsigned int khz = 0; 1387 int err; 1388 1389 if (!data) 1390 return 0; 1391 1392 smp_call_function_single(cpu, query_values_on_cpu, &err, true); 1393 if (err) 1394 goto out; 1395 1396 if (cpu_family == CPU_HW_PSTATE) 1397 khz = find_khz_freq_from_pstate(data->powernow_table, 1398 data->currpstate); 1399 else 1400 khz = find_khz_freq_from_fid(data->currfid); 1401 1402 1403out: 1404 return khz; 1405} 1406 1407static void _cpb_toggle_msrs(bool t) 1408{ 1409 int cpu; 1410 1411 get_online_cpus(); 1412 1413 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); 1414 1415 for_each_cpu(cpu, cpu_online_mask) { 1416 struct msr *reg = per_cpu_ptr(msrs, cpu); 1417 if (t) 1418 reg->l &= ~BIT(25); 1419 else 1420 reg->l |= BIT(25); 1421 } 1422 wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); 1423 1424 put_online_cpus(); 1425} 1426 1427/* 1428 * Switch on/off core performance boosting. 1429 * 1430 * 0=disable 1431 * 1=enable. 1432 */ 1433static void cpb_toggle(bool t) 1434{ 1435 if (!cpb_capable) 1436 return; 1437 1438 if (t && !cpb_enabled) { 1439 cpb_enabled = true; 1440 _cpb_toggle_msrs(t); 1441 printk(KERN_INFO PFX "Core Boosting enabled.\n"); 1442 } else if (!t && cpb_enabled) { 1443 cpb_enabled = false; 1444 _cpb_toggle_msrs(t); 1445 printk(KERN_INFO PFX "Core Boosting disabled.\n"); 1446 } 1447} 1448 1449static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf, 1450 size_t count) 1451{ 1452 int ret = -EINVAL; 1453 unsigned long val = 0; 1454 1455 ret = strict_strtoul(buf, 10, &val); 1456 if (!ret && (val == 0 || val == 1) && cpb_capable) 1457 cpb_toggle(val); 1458 else 1459 return -EINVAL; 1460 1461 return count; 1462} 1463 1464static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf) 1465{ 1466 return sprintf(buf, "%u\n", cpb_enabled); 1467} 1468 1469#define define_one_rw(_name) \ 1470static struct freq_attr _name = \ 1471__ATTR(_name, 0644, show_##_name, store_##_name) 1472 1473define_one_rw(cpb); 1474 1475static struct freq_attr *powernow_k8_attr[] = { 1476 &cpufreq_freq_attr_scaling_available_freqs, 1477 &cpb, 1478 NULL, 1479}; 1480 1481static struct cpufreq_driver cpufreq_amd64_driver = { 1482 .verify = powernowk8_verify, 1483 .target = powernowk8_target, 1484 .bios_limit = acpi_processor_get_bios_limit, 1485 .init = powernowk8_cpu_init, 1486 .exit = __devexit_p(powernowk8_cpu_exit), 1487 .get = powernowk8_get, 1488 .name = "powernow-k8", 1489 .owner = THIS_MODULE, 1490 .attr = powernow_k8_attr, 1491}; 1492 1493/* 1494 * Clear the boost-disable flag on the CPU_DOWN path so that this cpu 1495 * cannot block the remaining ones from boosting. On the CPU_UP path we 1496 * simply keep the boost-disable flag in sync with the current global 1497 * state. 1498 */ 1499static int cpb_notify(struct notifier_block *nb, unsigned long action, 1500 void *hcpu) 1501{ 1502 unsigned cpu = (long)hcpu; 1503 u32 lo, hi; 1504 1505 switch (action) { 1506 case CPU_UP_PREPARE: 1507 case CPU_UP_PREPARE_FROZEN: 1508 1509 if (!cpb_enabled) { 1510 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 1511 lo |= BIT(25); 1512 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi); 1513 } 1514 break; 1515 1516 case CPU_DOWN_PREPARE: 1517 case CPU_DOWN_PREPARE_FROZEN: 1518 rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi); 1519 lo &= ~BIT(25); 1520 wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi); 1521 break; 1522 1523 default: 1524 break; 1525 } 1526 1527 return NOTIFY_OK; 1528} 1529 1530static struct notifier_block cpb_nb = { 1531 .notifier_call = cpb_notify, 1532}; 1533 1534/* driver entry point for init */ 1535static int __cpuinit powernowk8_init(void) 1536{ 1537 unsigned int i, supported_cpus = 0, cpu; 1538 1539 for_each_online_cpu(i) { 1540 int rc; 1541 smp_call_function_single(i, check_supported_cpu, &rc, 1); 1542 if (rc == 0) 1543 supported_cpus++; 1544 } 1545 1546 if (supported_cpus != num_online_cpus()) 1547 return -ENODEV; 1548 1549 printk(KERN_INFO PFX "Found %d %s (%d cpu cores) (" VERSION ")\n", 1550 num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus); 1551 1552 if (boot_cpu_has(X86_FEATURE_CPB)) { 1553 1554 cpb_capable = true; 1555 1556 register_cpu_notifier(&cpb_nb); 1557 1558 msrs = msrs_alloc(); 1559 if (!msrs) { 1560 printk(KERN_ERR "%s: Error allocating msrs!\n", __func__); 1561 return -ENOMEM; 1562 } 1563 1564 rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs); 1565 1566 for_each_cpu(cpu, cpu_online_mask) { 1567 struct msr *reg = per_cpu_ptr(msrs, cpu); 1568 cpb_enabled |= !(!!(reg->l & BIT(25))); 1569 } 1570 1571 printk(KERN_INFO PFX "Core Performance Boosting: %s.\n", 1572 (cpb_enabled ? "on" : "off")); 1573 } 1574 1575 return cpufreq_register_driver(&cpufreq_amd64_driver); 1576} 1577 1578/* driver entry point for term */ 1579static void __exit powernowk8_exit(void) 1580{ 1581 dprintk("exit\n"); 1582 1583 if (boot_cpu_has(X86_FEATURE_CPB)) { 1584 msrs_free(msrs); 1585 msrs = NULL; 1586 1587 unregister_cpu_notifier(&cpb_nb); 1588 } 1589 1590 cpufreq_unregister_driver(&cpufreq_amd64_driver); 1591} 1592 1593MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and " 1594 "Mark Langsdorf <mark.langsdorf@amd.com>"); 1595MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver."); 1596MODULE_LICENSE("GPL"); 1597 1598late_initcall(powernowk8_init); 1599module_exit(powernowk8_exit);