/arch/x86/include/asm/pgtable_32.h
C++ Header | 96 lines | 57 code | 16 blank | 23 comment | 4 complexity | c43ded71bdbe164516d0aa0f3b0e13b5 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1#ifndef _ASM_X86_PGTABLE_32_H 2#define _ASM_X86_PGTABLE_32_H 3 4#include <asm/pgtable_32_types.h> 5 6/* 7 * The Linux memory management assumes a three-level page table setup. On 8 * the i386, we use that, but "fold" the mid level into the top-level page 9 * table, so that we physically have the same two-level page table as the 10 * i386 mmu expects. 11 * 12 * This file contains the functions and defines necessary to modify and use 13 * the i386 page table tree. 14 */ 15#ifndef __ASSEMBLY__ 16#include <asm/processor.h> 17#include <asm/fixmap.h> 18#include <linux/threads.h> 19#include <asm/paravirt.h> 20 21#include <linux/bitops.h> 22#include <linux/list.h> 23#include <linux/spinlock.h> 24 25struct mm_struct; 26struct vm_area_struct; 27 28extern pgd_t swapper_pg_dir[1024]; 29 30static inline void pgtable_cache_init(void) { } 31static inline void check_pgt_cache(void) { } 32void paging_init(void); 33 34extern void set_pmd_pfn(unsigned long, unsigned long, pgprot_t); 35 36 37/* 38 * Define this if things work differently on an i386 and an i486: 39 * it will (on an i486) warn about kernel memory accesses that are 40 * done without a 'access_ok(VERIFY_WRITE,..)' 41 */ 42#undef TEST_ACCESS_OK 43 44#ifdef CONFIG_X86_PAE 45# include <asm/pgtable-3level.h> 46#else 47# include <asm/pgtable-2level.h> 48#endif 49 50#if defined(CONFIG_HIGHPTE) 51#define __KM_PTE \ 52 (in_nmi() ? KM_NMI_PTE : \ 53 in_irq() ? KM_IRQ_PTE : \ 54 KM_PTE0) 55#define pte_offset_map(dir, address) \ 56 ((pte_t *)kmap_atomic(pmd_page(*(dir)), __KM_PTE) + \ 57 pte_index((address))) 58#define pte_offset_map_nested(dir, address) \ 59 ((pte_t *)kmap_atomic(pmd_page(*(dir)), KM_PTE1) + \ 60 pte_index((address))) 61#define pte_unmap(pte) kunmap_atomic((pte), __KM_PTE) 62#define pte_unmap_nested(pte) kunmap_atomic((pte), KM_PTE1) 63#else 64#define pte_offset_map(dir, address) \ 65 ((pte_t *)page_address(pmd_page(*(dir))) + pte_index((address))) 66#define pte_offset_map_nested(dir, address) pte_offset_map((dir), (address)) 67#define pte_unmap(pte) do { } while (0) 68#define pte_unmap_nested(pte) do { } while (0) 69#endif 70 71/* Clear a kernel PTE and flush it from the TLB */ 72#define kpte_clear_flush(ptep, vaddr) \ 73do { \ 74 pte_clear(&init_mm, (vaddr), (ptep)); \ 75 __flush_tlb_one((vaddr)); \ 76} while (0) 77 78/* 79 * The i386 doesn't have any external MMU info: the kernel page 80 * tables contain all the necessary information. 81 */ 82#define update_mmu_cache(vma, address, ptep) do { } while (0) 83 84#endif /* !__ASSEMBLY__ */ 85 86/* 87 * kern_addr_valid() is (1) for FLATMEM and (0) for 88 * SPARSEMEM and DISCONTIGMEM 89 */ 90#ifdef CONFIG_FLATMEM 91#define kern_addr_valid(addr) (1) 92#else 93#define kern_addr_valid(kaddr) (0) 94#endif 95 96#endif /* _ASM_X86_PGTABLE_32_H */