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/arch/avr32/mach-at32ap/include/mach/hmatrix.h

https://bitbucket.org/thekraven/iscream_thunderc-2.6.35
C++ Header | 55 lines | 29 code | 10 blank | 16 comment | 0 complexity | e266b84d9ae0cbf29c12c1e788148ac1 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
 1/*
 2 * High-Speed Bus Matrix configuration registers
 3 *
 4 * Copyright (C) 2008 Atmel Corporation
 5 *
 6 * This program is free software; you can redistribute it and/or modify
 7 * it under the terms of the GNU General Public License version 2 as
 8 * published by the Free Software Foundation.
 9 */
10#ifndef __HMATRIX_H
11#define __HMATRIX_H
12
13extern struct clk at32_hmatrix_clk;
14
15void hmatrix_write_reg(unsigned long offset, u32 value);
16u32 hmatrix_read_reg(unsigned long offset);
17
18void hmatrix_sfr_set_bits(unsigned int slave_id, u32 mask);
19void hmatrix_sfr_clear_bits(unsigned int slave_id, u32 mask);
20
21/* Master Configuration register */
22#define HMATRIX_MCFG(m)			(0x0000 + 4 * (m))
23/* Undefined length burst limit */
24# define HMATRIX_MCFG_ULBT_INFINITE	0	/* Infinite length */
25# define HMATRIX_MCFG_ULBT_SINGLE	1	/* Single Access */
26# define HMATRIX_MCFG_ULBT_FOUR_BEAT	2	/* Four beat */
27# define HMATRIX_MCFG_ULBT_EIGHT_BEAT	3	/* Eight beat */
28# define HMATRIX_MCFG_ULBT_SIXTEEN_BEAT	4	/* Sixteen beat */
29
30/* Slave Configuration register */
31#define HMATRIX_SCFG(s)			(0x0040 + 4 * (s))
32# define HMATRIX_SCFG_SLOT_CYCLE(x)	((x) <<  0)	/* Max burst cycles */
33# define HMATRIX_SCFG_DEFMSTR_NONE	(  0 << 16)	/* No default master */
34# define HMATRIX_SCFG_DEFMSTR_LAST	(  1 << 16)	/* Last def master */
35# define HMATRIX_SCFG_DEFMSTR_FIXED	(  2 << 16)	/* Fixed def master */
36# define HMATRIX_SCFG_FIXED_DEFMSTR(m)	((m) << 18)	/* Fixed master ID */
37# define HMATRIX_SCFG_ARBT_ROUND_ROBIN	(  0 << 24)	/* RR arbitration */
38# define HMATRIX_SCFG_ARBT_FIXED_PRIO	(  1 << 24)	/* Fixed priority */
39
40/* Slave Priority register A (master 0..7) */
41#define HMATRIX_PRAS(s)			(0x0080 + 8 * (s))
42# define HMATRIX_PRAS_PRIO(m, p)	((p) << ((m) * 4))
43
44/* Slave Priority register A (master 8..15) */
45#define HMATRIX_PRBS(s)			(0x0084 + 8 * (s))
46# define HMATRIX_PRBS_PRIO(m, p)	((p) << (((m) - 8) * 4))
47
48/* Master Remap Control Register */
49#define HMATRIX_MRCR				0x0100
50# define HMATRIX_MRCR_REMAP(m)		(  1 << (m))	/* Remap master m */
51
52/* Special Function Register. Bit definitions are chip-specific */
53#define HMATRIX_SFR(s)			(0x0110 + 4 * (s))
54
55#endif /* __HMATRIX_H */