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/drivers/crypto/msm/inc/qce.h

https://bitbucket.org/cresqo/cm7-p500-kernel
C Header | 142 lines | 91 code | 18 blank | 33 comment | 0 complexity | 9a09ba4bcfd2e1f7da7e7f39a6ce35a8 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/* Qualcomm Crypto Engine driver API
  2 *
  3 * Copyright (c) 2010-2011, Code Aurora Forum. All rights reserved.
  4 *
  5 * Redistribution and use in source and binary forms, with or without
  6 * modification, are permitted provided that the following conditions are
  7 * met:
  8 *     * Redistributions of source code must retain the above copyright
  9 *       notice, this list of conditions and the following disclaimer.
 10 *     * Redistributions in binary form must reproduce the above
 11 *       copyright notice, this list of conditions and the following
 12 *       disclaimer in the documentation and/or other materials provided
 13 *       with the distribution.
 14 *     * Neither the name of Code Aurora Forum, Inc. nor the names of its
 15 *       contributors may be used to endorse or promote products derived
 16 *       from this software without specific prior written permission.
 17 *
 18 * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
 19 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
 20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT
 21 * ARE DISCLAIMED.  IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS
 22 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
 23 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
 24 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
 25 * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
 26 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE
 27 * OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN
 28 * IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 29 */
 30
 31
 32#ifndef __CRYPTO_MSM_QCE_H
 33#define __CRYPTO_MSM_QCE_H
 34
 35#include <linux/types.h>
 36#include <linux/platform_device.h>
 37#include <linux/crypto.h>
 38
 39#include <crypto/algapi.h>
 40#include <crypto/aes.h>
 41#include <crypto/des.h>
 42#include <crypto/sha.h>
 43#include <crypto/aead.h>
 44#include <crypto/authenc.h>
 45#include <crypto/scatterwalk.h>
 46
 47/* SHA digest size  in bytes */
 48#define SHA256_DIGESTSIZE		32
 49#define SHA1_DIGESTSIZE			20
 50
 51/* key size in bytes */
 52#define HMAC_KEY_SIZE			(SHA1_DIGESTSIZE)    /* hmac-sha1 */
 53#define DES_KEY_SIZE			8
 54#define TRIPLE_DES_KEY_SIZE		24
 55#define AES128_KEY_SIZE			16
 56#define AES192_KEY_SIZE			24
 57#define AES256_KEY_SIZE			32
 58#define MAX_CIPHER_KEY_SIZE		AES256_KEY_SIZE
 59
 60/* iv length in bytes */
 61#define AES_IV_LENGTH			16
 62#define DES_IV_LENGTH                   8
 63#define MAX_IV_LENGTH			AES_IV_LENGTH
 64
 65/* Maximum number of bytes per transfer */
 66#define QCE_MAX_OPER_DATA		0x8000
 67
 68typedef void (*qce_comp_func_ptr_t)(void *areq,
 69		unsigned char *icv, unsigned char *iv, int ret);
 70
 71enum qce_cipher_alg_enum {
 72	CIPHER_ALG_DES = 0,
 73	CIPHER_ALG_3DES = 1,
 74	CIPHER_ALG_AES = 2,
 75	CIPHER_ALG_LAST
 76};
 77
 78enum qce_hash_alg_enum {
 79	QCE_HASH_SHA1   = 0,
 80	QCE_HASH_SHA256 = 1,
 81	QCE_HASH_LAST
 82};
 83
 84enum qce_cipher_dir_enum {
 85	QCE_ENCRYPT = 0,
 86	QCE_DECRYPT = 1,
 87	QCE_CIPHER_DIR_LAST
 88};
 89
 90enum qce_cipher_mode_enum {
 91	QCE_MODE_CBC = 0,
 92	QCE_MODE_ECB = 1,
 93	QCE_MODE_CTR = 2,
 94	QCE_CIPHER_MODE_LAST
 95};
 96
 97enum qce_req_op_enum {
 98	QCE_REQ_ABLK_CIPHER = 0,
 99	QCE_REQ_ABLK_CIPHER_NO_KEY = 1,
100	QCE_REQ_AEAD = 2,
101	QCE_REQ_LAST
102};
103
104struct qce_sha_req {
105	qce_comp_func_ptr_t qce_cb;
106	enum qce_hash_alg_enum alg;
107	unsigned char *digest;
108	struct scatterlist *src;
109	uint32_t  auth_data[2];
110	bool first_blk;
111	bool last_blk;
112	unsigned int size;
113	void *areq;
114};
115
116struct qce_req {
117	enum qce_req_op_enum op;
118	qce_comp_func_ptr_t qce_cb;
119	void *areq;
120	enum qce_cipher_alg_enum   alg;
121	enum qce_cipher_dir_enum dir;
122	enum qce_cipher_mode_enum mode;
123	unsigned char *authkey;
124	unsigned int authklen;
125	unsigned char *enckey;
126	unsigned int encklen;
127	unsigned char *iv;
128	unsigned int ivsize;
129	unsigned int cryptlen;
130	unsigned int use_pmem;
131	struct qcedev_pmem_info *pmem;
132};
133
134void *qce_open(struct platform_device *pdev, int *rc);
135int qce_close(void *handle);
136int qce_aead_req(void *handle, struct qce_req *req);
137int qce_ablk_cipher_req(void *handle, struct qce_req *req);
138int qce_ota_support(void *handle);
139int qce_hmac_support(void *handle);
140int qce_process_sha_req(void *handle, struct qce_sha_req *s_req);
141
142#endif /* __CRYPTO_MSM_QCE_H */