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/drivers/char/hw_random/via-rng.c

https://bitbucket.org/cresqo/cm7-p500-kernel
C | 222 lines | 119 code | 35 blank | 68 comment | 17 complexity | 0abb0fa7c2fb84afd9ea646253c13f74 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/*
  2 * RNG driver for VIA RNGs
  3 *
  4 * Copyright 2005 (c) MontaVista Software, Inc.
  5 *
  6 * with the majority of the code coming from:
  7 *
  8 * Hardware driver for the Intel/AMD/VIA Random Number Generators (RNG)
  9 * (c) Copyright 2003 Red Hat Inc <jgarzik@redhat.com>
 10 *
 11 * derived from
 12 *
 13 * Hardware driver for the AMD 768 Random Number Generator (RNG)
 14 * (c) Copyright 2001 Red Hat Inc
 15 *
 16 * derived from
 17 *
 18 * Hardware driver for Intel i810 Random Number Generator (RNG)
 19 * Copyright 2000,2001 Jeff Garzik <jgarzik@pobox.com>
 20 * Copyright 2000,2001 Philipp Rumpf <prumpf@mandrakesoft.com>
 21 *
 22 * This file is licensed under  the terms of the GNU General Public
 23 * License version 2. This program is licensed "as is" without any
 24 * warranty of any kind, whether express or implied.
 25 */
 26
 27#include <linux/module.h>
 28#include <linux/kernel.h>
 29#include <linux/hw_random.h>
 30#include <linux/delay.h>
 31#include <asm/io.h>
 32#include <asm/msr.h>
 33#include <asm/cpufeature.h>
 34#include <asm/i387.h>
 35
 36
 37#define PFX	KBUILD_MODNAME ": "
 38
 39
 40enum {
 41	VIA_STRFILT_CNT_SHIFT	= 16,
 42	VIA_STRFILT_FAIL	= (1 << 15),
 43	VIA_STRFILT_ENABLE	= (1 << 14),
 44	VIA_RAWBITS_ENABLE	= (1 << 13),
 45	VIA_RNG_ENABLE		= (1 << 6),
 46	VIA_NOISESRC1		= (1 << 8),
 47	VIA_NOISESRC2		= (1 << 9),
 48	VIA_XSTORE_CNT_MASK	= 0x0F,
 49
 50	VIA_RNG_CHUNK_8		= 0x00,	/* 64 rand bits, 64 stored bits */
 51	VIA_RNG_CHUNK_4		= 0x01,	/* 32 rand bits, 32 stored bits */
 52	VIA_RNG_CHUNK_4_MASK	= 0xFFFFFFFF,
 53	VIA_RNG_CHUNK_2		= 0x02,	/* 16 rand bits, 32 stored bits */
 54	VIA_RNG_CHUNK_2_MASK	= 0xFFFF,
 55	VIA_RNG_CHUNK_1		= 0x03,	/* 8 rand bits, 32 stored bits */
 56	VIA_RNG_CHUNK_1_MASK	= 0xFF,
 57};
 58
 59/*
 60 * Investigate using the 'rep' prefix to obtain 32 bits of random data
 61 * in one insn.  The upside is potentially better performance.  The
 62 * downside is that the instruction becomes no longer atomic.  Due to
 63 * this, just like familiar issues with /dev/random itself, the worst
 64 * case of a 'rep xstore' could potentially pause a cpu for an
 65 * unreasonably long time.  In practice, this condition would likely
 66 * only occur when the hardware is failing.  (or so we hope :))
 67 *
 68 * Another possible performance boost may come from simply buffering
 69 * until we have 4 bytes, thus returning a u32 at a time,
 70 * instead of the current u8-at-a-time.
 71 *
 72 * Padlock instructions can generate a spurious DNA fault, so
 73 * we have to call them in the context of irq_ts_save/restore()
 74 */
 75
 76static inline u32 xstore(u32 *addr, u32 edx_in)
 77{
 78	u32 eax_out;
 79	int ts_state;
 80
 81	ts_state = irq_ts_save();
 82
 83	asm(".byte 0x0F,0xA7,0xC0 /* xstore %%edi (addr=%0) */"
 84		:"=m"(*addr), "=a"(eax_out)
 85		:"D"(addr), "d"(edx_in));
 86
 87	irq_ts_restore(ts_state);
 88	return eax_out;
 89}
 90
 91static int via_rng_data_present(struct hwrng *rng, int wait)
 92{
 93	u32 bytes_out;
 94	u32 *via_rng_datum = (u32 *)(&rng->priv);
 95	int i;
 96
 97	/* We choose the recommended 1-byte-per-instruction RNG rate,
 98	 * for greater randomness at the expense of speed.  Larger
 99	 * values 2, 4, or 8 bytes-per-instruction yield greater
100	 * speed at lesser randomness.
101	 *
102	 * If you change this to another VIA_CHUNK_n, you must also
103	 * change the ->n_bytes values in rng_vendor_ops[] tables.
104	 * VIA_CHUNK_8 requires further code changes.
105	 *
106	 * A copy of MSR_VIA_RNG is placed in eax_out when xstore
107	 * completes.
108	 */
109
110	for (i = 0; i < 20; i++) {
111		*via_rng_datum = 0; /* paranoia, not really necessary */
112		bytes_out = xstore(via_rng_datum, VIA_RNG_CHUNK_1);
113		bytes_out &= VIA_XSTORE_CNT_MASK;
114		if (bytes_out || !wait)
115			break;
116		udelay(10);
117	}
118	return bytes_out ? 1 : 0;
119}
120
121static int via_rng_data_read(struct hwrng *rng, u32 *data)
122{
123	u32 via_rng_datum = (u32)rng->priv;
124
125	*data = via_rng_datum;
126
127	return 1;
128}
129
130static int via_rng_init(struct hwrng *rng)
131{
132	struct cpuinfo_x86 *c = &cpu_data(0);
133	u32 lo, hi, old_lo;
134
135	/* VIA Nano CPUs don't have the MSR_VIA_RNG anymore.  The RNG
136	 * is always enabled if CPUID rng_en is set.  There is no
137	 * RNG configuration like it used to be the case in this
138	 * register */
139	if ((c->x86 == 6) && (c->x86_model >= 0x0f)) {
140		if (!cpu_has_xstore_enabled) {
141			printk(KERN_ERR PFX "can't enable hardware RNG "
142				"if XSTORE is not enabled\n");
143			return -ENODEV;
144		}
145		return 0;
146	}
147
148	/* Control the RNG via MSR.  Tread lightly and pay very close
149	 * close attention to values written, as the reserved fields
150	 * are documented to be "undefined and unpredictable"; but it
151	 * does not say to write them as zero, so I make a guess that
152	 * we restore the values we find in the register.
153	 */
154	rdmsr(MSR_VIA_RNG, lo, hi);
155
156	old_lo = lo;
157	lo &= ~(0x7f << VIA_STRFILT_CNT_SHIFT);
158	lo &= ~VIA_XSTORE_CNT_MASK;
159	lo &= ~(VIA_STRFILT_ENABLE | VIA_STRFILT_FAIL | VIA_RAWBITS_ENABLE);
160	lo |= VIA_RNG_ENABLE;
161	lo |= VIA_NOISESRC1;
162
163	/* Enable secondary noise source on CPUs where it is present. */
164
165	/* Nehemiah stepping 8 and higher */
166	if ((c->x86_model == 9) && (c->x86_mask > 7))
167		lo |= VIA_NOISESRC2;
168
169	/* Esther */
170	if (c->x86_model >= 10)
171		lo |= VIA_NOISESRC2;
172
173	if (lo != old_lo)
174		wrmsr(MSR_VIA_RNG, lo, hi);
175
176	/* perhaps-unnecessary sanity check; remove after testing if
177	   unneeded */
178	rdmsr(MSR_VIA_RNG, lo, hi);
179	if ((lo & VIA_RNG_ENABLE) == 0) {
180		printk(KERN_ERR PFX "cannot enable VIA C3 RNG, aborting\n");
181		return -ENODEV;
182	}
183
184	return 0;
185}
186
187
188static struct hwrng via_rng = {
189	.name		= "via",
190	.init		= via_rng_init,
191	.data_present	= via_rng_data_present,
192	.data_read	= via_rng_data_read,
193};
194
195
196static int __init mod_init(void)
197{
198	int err;
199
200	if (!cpu_has_xstore)
201		return -ENODEV;
202	printk(KERN_INFO "VIA RNG detected\n");
203	err = hwrng_register(&via_rng);
204	if (err) {
205		printk(KERN_ERR PFX "RNG registering failed (%d)\n",
206		       err);
207		goto out;
208	}
209out:
210	return err;
211}
212
213static void __exit mod_exit(void)
214{
215	hwrng_unregister(&via_rng);
216}
217
218module_init(mod_init);
219module_exit(mod_exit);
220
221MODULE_DESCRIPTION("H/W RNG driver for VIA CPU with PadLock");
222MODULE_LICENSE("GPL");