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/arch/x86/kernel/vmi_32.c

https://bitbucket.org/cresqo/cm7-p500-kernel
C | 893 lines | 620 code | 120 blank | 153 comment | 82 complexity | 5bafb4b4fcc51975a8784d177dfb69e1 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/*
  2 * VMI specific paravirt-ops implementation
  3 *
  4 * Copyright (C) 2005, VMware, Inc.
  5 *
  6 * This program is free software; you can redistribute it and/or modify
  7 * it under the terms of the GNU General Public License as published by
  8 * the Free Software Foundation; either version 2 of the License, or
  9 * (at your option) any later version.
 10 *
 11 * This program is distributed in the hope that it will be useful, but
 12 * WITHOUT ANY WARRANTY; without even the implied warranty of
 13 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
 14 * NON INFRINGEMENT.  See the GNU General Public License for more
 15 * details.
 16 *
 17 * You should have received a copy of the GNU General Public License
 18 * along with this program; if not, write to the Free Software
 19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 20 *
 21 * Send feedback to zach@vmware.com
 22 *
 23 */
 24
 25#include <linux/module.h>
 26#include <linux/cpu.h>
 27#include <linux/bootmem.h>
 28#include <linux/mm.h>
 29#include <linux/highmem.h>
 30#include <linux/sched.h>
 31#include <linux/gfp.h>
 32#include <asm/vmi.h>
 33#include <asm/io.h>
 34#include <asm/fixmap.h>
 35#include <asm/apicdef.h>
 36#include <asm/apic.h>
 37#include <asm/pgalloc.h>
 38#include <asm/processor.h>
 39#include <asm/timer.h>
 40#include <asm/vmi_time.h>
 41#include <asm/kmap_types.h>
 42#include <asm/setup.h>
 43
 44/* Convenient for calling VMI functions indirectly in the ROM */
 45typedef u32 __attribute__((regparm(1))) (VROMFUNC)(void);
 46typedef u64 __attribute__((regparm(2))) (VROMLONGFUNC)(int);
 47
 48#define call_vrom_func(rom,func) \
 49   (((VROMFUNC *)(rom->func))())
 50
 51#define call_vrom_long_func(rom,func,arg) \
 52   (((VROMLONGFUNC *)(rom->func)) (arg))
 53
 54static struct vrom_header *vmi_rom;
 55static int disable_pge;
 56static int disable_pse;
 57static int disable_sep;
 58static int disable_tsc;
 59static int disable_mtrr;
 60static int disable_noidle;
 61static int disable_vmi_timer;
 62
 63/* Cached VMI operations */
 64static struct {
 65	void (*cpuid)(void /* non-c */);
 66	void (*_set_ldt)(u32 selector);
 67	void (*set_tr)(u32 selector);
 68	void (*write_idt_entry)(struct desc_struct *, int, u32, u32);
 69	void (*write_gdt_entry)(struct desc_struct *, int, u32, u32);
 70	void (*write_ldt_entry)(struct desc_struct *, int, u32, u32);
 71	void (*set_kernel_stack)(u32 selector, u32 sp0);
 72	void (*allocate_page)(u32, u32, u32, u32, u32);
 73	void (*release_page)(u32, u32);
 74	void (*set_pte)(pte_t, pte_t *, unsigned);
 75	void (*update_pte)(pte_t *, unsigned);
 76	void (*set_linear_mapping)(int, void *, u32, u32);
 77	void (*_flush_tlb)(int);
 78	void (*set_initial_ap_state)(int, int);
 79	void (*halt)(void);
 80  	void (*set_lazy_mode)(int mode);
 81} vmi_ops;
 82
 83/* Cached VMI operations */
 84struct vmi_timer_ops vmi_timer_ops;
 85
 86/*
 87 * VMI patching routines.
 88 */
 89#define MNEM_CALL 0xe8
 90#define MNEM_JMP  0xe9
 91#define MNEM_RET  0xc3
 92
 93#define IRQ_PATCH_INT_MASK 0
 94#define IRQ_PATCH_DISABLE  5
 95
 96static inline void patch_offset(void *insnbuf,
 97				unsigned long ip, unsigned long dest)
 98{
 99        *(unsigned long *)(insnbuf+1) = dest-ip-5;
100}
101
102static unsigned patch_internal(int call, unsigned len, void *insnbuf,
103			       unsigned long ip)
104{
105	u64 reloc;
106	struct vmi_relocation_info *const rel = (struct vmi_relocation_info *)&reloc;
107	reloc = call_vrom_long_func(vmi_rom, get_reloc,	call);
108	switch(rel->type) {
109		case VMI_RELOCATION_CALL_REL:
110			BUG_ON(len < 5);
111			*(char *)insnbuf = MNEM_CALL;
112			patch_offset(insnbuf, ip, (unsigned long)rel->eip);
113			return 5;
114
115		case VMI_RELOCATION_JUMP_REL:
116			BUG_ON(len < 5);
117			*(char *)insnbuf = MNEM_JMP;
118			patch_offset(insnbuf, ip, (unsigned long)rel->eip);
119			return 5;
120
121		case VMI_RELOCATION_NOP:
122			/* obliterate the whole thing */
123			return 0;
124
125		case VMI_RELOCATION_NONE:
126			/* leave native code in place */
127			break;
128
129		default:
130			BUG();
131	}
132	return len;
133}
134
135/*
136 * Apply patch if appropriate, return length of new instruction
137 * sequence.  The callee does nop padding for us.
138 */
139static unsigned vmi_patch(u8 type, u16 clobbers, void *insns,
140			  unsigned long ip, unsigned len)
141{
142	switch (type) {
143		case PARAVIRT_PATCH(pv_irq_ops.irq_disable):
144			return patch_internal(VMI_CALL_DisableInterrupts, len,
145					      insns, ip);
146		case PARAVIRT_PATCH(pv_irq_ops.irq_enable):
147			return patch_internal(VMI_CALL_EnableInterrupts, len,
148					      insns, ip);
149		case PARAVIRT_PATCH(pv_irq_ops.restore_fl):
150			return patch_internal(VMI_CALL_SetInterruptMask, len,
151					      insns, ip);
152		case PARAVIRT_PATCH(pv_irq_ops.save_fl):
153			return patch_internal(VMI_CALL_GetInterruptMask, len,
154					      insns, ip);
155		case PARAVIRT_PATCH(pv_cpu_ops.iret):
156			return patch_internal(VMI_CALL_IRET, len, insns, ip);
157		case PARAVIRT_PATCH(pv_cpu_ops.irq_enable_sysexit):
158			return patch_internal(VMI_CALL_SYSEXIT, len, insns, ip);
159		default:
160			break;
161	}
162	return len;
163}
164
165/* CPUID has non-C semantics, and paravirt-ops API doesn't match hardware ISA */
166static void vmi_cpuid(unsigned int *ax, unsigned int *bx,
167                               unsigned int *cx, unsigned int *dx)
168{
169	int override = 0;
170	if (*ax == 1)
171		override = 1;
172        asm volatile ("call *%6"
173                      : "=a" (*ax),
174                        "=b" (*bx),
175                        "=c" (*cx),
176                        "=d" (*dx)
177                      : "0" (*ax), "2" (*cx), "r" (vmi_ops.cpuid));
178	if (override) {
179		if (disable_pse)
180			*dx &= ~X86_FEATURE_PSE;
181		if (disable_pge)
182			*dx &= ~X86_FEATURE_PGE;
183		if (disable_sep)
184			*dx &= ~X86_FEATURE_SEP;
185		if (disable_tsc)
186			*dx &= ~X86_FEATURE_TSC;
187		if (disable_mtrr)
188			*dx &= ~X86_FEATURE_MTRR;
189	}
190}
191
192static inline void vmi_maybe_load_tls(struct desc_struct *gdt, int nr, struct desc_struct *new)
193{
194	if (gdt[nr].a != new->a || gdt[nr].b != new->b)
195		write_gdt_entry(gdt, nr, new, 0);
196}
197
198static void vmi_load_tls(struct thread_struct *t, unsigned int cpu)
199{
200	struct desc_struct *gdt = get_cpu_gdt_table(cpu);
201	vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 0, &t->tls_array[0]);
202	vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 1, &t->tls_array[1]);
203	vmi_maybe_load_tls(gdt, GDT_ENTRY_TLS_MIN + 2, &t->tls_array[2]);
204}
205
206static void vmi_set_ldt(const void *addr, unsigned entries)
207{
208	unsigned cpu = smp_processor_id();
209	struct desc_struct desc;
210
211	pack_descriptor(&desc, (unsigned long)addr,
212			entries * sizeof(struct desc_struct) - 1,
213			DESC_LDT, 0);
214	write_gdt_entry(get_cpu_gdt_table(cpu), GDT_ENTRY_LDT, &desc, DESC_LDT);
215	vmi_ops._set_ldt(entries ? GDT_ENTRY_LDT*sizeof(struct desc_struct) : 0);
216}
217
218static void vmi_set_tr(void)
219{
220	vmi_ops.set_tr(GDT_ENTRY_TSS*sizeof(struct desc_struct));
221}
222
223static void vmi_write_idt_entry(gate_desc *dt, int entry, const gate_desc *g)
224{
225	u32 *idt_entry = (u32 *)g;
226	vmi_ops.write_idt_entry(dt, entry, idt_entry[0], idt_entry[1]);
227}
228
229static void vmi_write_gdt_entry(struct desc_struct *dt, int entry,
230				const void *desc, int type)
231{
232	u32 *gdt_entry = (u32 *)desc;
233	vmi_ops.write_gdt_entry(dt, entry, gdt_entry[0], gdt_entry[1]);
234}
235
236static void vmi_write_ldt_entry(struct desc_struct *dt, int entry,
237				const void *desc)
238{
239	u32 *ldt_entry = (u32 *)desc;
240	vmi_ops.write_ldt_entry(dt, entry, ldt_entry[0], ldt_entry[1]);
241}
242
243static void vmi_load_sp0(struct tss_struct *tss,
244				   struct thread_struct *thread)
245{
246	tss->x86_tss.sp0 = thread->sp0;
247
248	/* This can only happen when SEP is enabled, no need to test "SEP"arately */
249	if (unlikely(tss->x86_tss.ss1 != thread->sysenter_cs)) {
250		tss->x86_tss.ss1 = thread->sysenter_cs;
251		wrmsr(MSR_IA32_SYSENTER_CS, thread->sysenter_cs, 0);
252	}
253	vmi_ops.set_kernel_stack(__KERNEL_DS, tss->x86_tss.sp0);
254}
255
256static void vmi_flush_tlb_user(void)
257{
258	vmi_ops._flush_tlb(VMI_FLUSH_TLB);
259}
260
261static void vmi_flush_tlb_kernel(void)
262{
263	vmi_ops._flush_tlb(VMI_FLUSH_TLB | VMI_FLUSH_GLOBAL);
264}
265
266/* Stub to do nothing at all; used for delays and unimplemented calls */
267static void vmi_nop(void)
268{
269}
270
271static void vmi_allocate_pte(struct mm_struct *mm, unsigned long pfn)
272{
273	vmi_ops.allocate_page(pfn, VMI_PAGE_L1, 0, 0, 0);
274}
275
276static void vmi_allocate_pmd(struct mm_struct *mm, unsigned long pfn)
277{
278 	/*
279	 * This call comes in very early, before mem_map is setup.
280	 * It is called only for swapper_pg_dir, which already has
281	 * data on it.
282	 */
283	vmi_ops.allocate_page(pfn, VMI_PAGE_L2, 0, 0, 0);
284}
285
286static void vmi_allocate_pmd_clone(unsigned long pfn, unsigned long clonepfn, unsigned long start, unsigned long count)
287{
288	vmi_ops.allocate_page(pfn, VMI_PAGE_L2 | VMI_PAGE_CLONE, clonepfn, start, count);
289}
290
291static void vmi_release_pte(unsigned long pfn)
292{
293	vmi_ops.release_page(pfn, VMI_PAGE_L1);
294}
295
296static void vmi_release_pmd(unsigned long pfn)
297{
298	vmi_ops.release_page(pfn, VMI_PAGE_L2);
299}
300
301/*
302 * We use the pgd_free hook for releasing the pgd page:
303 */
304static void vmi_pgd_free(struct mm_struct *mm, pgd_t *pgd)
305{
306	unsigned long pfn = __pa(pgd) >> PAGE_SHIFT;
307
308	vmi_ops.release_page(pfn, VMI_PAGE_L2);
309}
310
311/*
312 * Helper macros for MMU update flags.  We can defer updates until a flush
313 * or page invalidation only if the update is to the current address space
314 * (otherwise, there is no flush).  We must check against init_mm, since
315 * this could be a kernel update, which usually passes init_mm, although
316 * sometimes this check can be skipped if we know the particular function
317 * is only called on user mode PTEs.  We could change the kernel to pass
318 * current->active_mm here, but in particular, I was unsure if changing
319 * mm/highmem.c to do this would still be correct on other architectures.
320 */
321#define is_current_as(mm, mustbeuser) ((mm) == current->active_mm ||    \
322                                       (!mustbeuser && (mm) == &init_mm))
323#define vmi_flags_addr(mm, addr, level, user)                           \
324        ((level) | (is_current_as(mm, user) ?                           \
325                (VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0))
326#define vmi_flags_addr_defer(mm, addr, level, user)                     \
327        ((level) | (is_current_as(mm, user) ?                           \
328                (VMI_PAGE_DEFER | VMI_PAGE_CURRENT_AS | ((addr) & VMI_PAGE_VA_MASK)) : 0))
329
330static void vmi_update_pte(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
331{
332	vmi_ops.update_pte(ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
333}
334
335static void vmi_update_pte_defer(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
336{
337	vmi_ops.update_pte(ptep, vmi_flags_addr_defer(mm, addr, VMI_PAGE_PT, 0));
338}
339
340static void vmi_set_pte(pte_t *ptep, pte_t pte)
341{
342	/* XXX because of set_pmd_pte, this can be called on PT or PD layers */
343	vmi_ops.set_pte(pte, ptep, VMI_PAGE_PT);
344}
345
346static void vmi_set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, pte_t pte)
347{
348	vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
349}
350
351static void vmi_set_pmd(pmd_t *pmdp, pmd_t pmdval)
352{
353#ifdef CONFIG_X86_PAE
354	const pte_t pte = { .pte = pmdval.pmd };
355#else
356	const pte_t pte = { pmdval.pud.pgd.pgd };
357#endif
358	vmi_ops.set_pte(pte, (pte_t *)pmdp, VMI_PAGE_PD);
359}
360
361#ifdef CONFIG_X86_PAE
362
363static void vmi_set_pte_atomic(pte_t *ptep, pte_t pteval)
364{
365	/*
366	 * XXX This is called from set_pmd_pte, but at both PT
367	 * and PD layers so the VMI_PAGE_PT flag is wrong.  But
368	 * it is only called for large page mapping changes,
369	 * the Xen backend, doesn't support large pages, and the
370	 * ESX backend doesn't depend on the flag.
371	 */
372	set_64bit((unsigned long long *)ptep,pte_val(pteval));
373	vmi_ops.update_pte(ptep, VMI_PAGE_PT);
374}
375
376static void vmi_set_pud(pud_t *pudp, pud_t pudval)
377{
378	/* Um, eww */
379	const pte_t pte = { .pte = pudval.pgd.pgd };
380	vmi_ops.set_pte(pte, (pte_t *)pudp, VMI_PAGE_PDP);
381}
382
383static void vmi_pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
384{
385	const pte_t pte = { .pte = 0 };
386	vmi_ops.set_pte(pte, ptep, vmi_flags_addr(mm, addr, VMI_PAGE_PT, 0));
387}
388
389static void vmi_pmd_clear(pmd_t *pmd)
390{
391	const pte_t pte = { .pte = 0 };
392	vmi_ops.set_pte(pte, (pte_t *)pmd, VMI_PAGE_PD);
393}
394#endif
395
396#ifdef CONFIG_SMP
397static void __devinit
398vmi_startup_ipi_hook(int phys_apicid, unsigned long start_eip,
399		     unsigned long start_esp)
400{
401	struct vmi_ap_state ap;
402
403	/* Default everything to zero.  This is fine for most GPRs. */
404	memset(&ap, 0, sizeof(struct vmi_ap_state));
405
406	ap.gdtr_limit = GDT_SIZE - 1;
407	ap.gdtr_base = (unsigned long) get_cpu_gdt_table(phys_apicid);
408
409	ap.idtr_limit = IDT_ENTRIES * 8 - 1;
410	ap.idtr_base = (unsigned long) idt_table;
411
412	ap.ldtr = 0;
413
414	ap.cs = __KERNEL_CS;
415	ap.eip = (unsigned long) start_eip;
416	ap.ss = __KERNEL_DS;
417	ap.esp = (unsigned long) start_esp;
418
419	ap.ds = __USER_DS;
420	ap.es = __USER_DS;
421	ap.fs = __KERNEL_PERCPU;
422	ap.gs = __KERNEL_STACK_CANARY;
423
424	ap.eflags = 0;
425
426#ifdef CONFIG_X86_PAE
427	/* efer should match BSP efer. */
428	if (cpu_has_nx) {
429		unsigned l, h;
430		rdmsr(MSR_EFER, l, h);
431		ap.efer = (unsigned long long) h << 32 | l;
432	}
433#endif
434
435	ap.cr3 = __pa(swapper_pg_dir);
436	/* Protected mode, paging, AM, WP, NE, MP. */
437	ap.cr0 = 0x80050023;
438	ap.cr4 = mmu_cr4_features;
439	vmi_ops.set_initial_ap_state((u32)&ap, phys_apicid);
440}
441#endif
442
443static void vmi_start_context_switch(struct task_struct *prev)
444{
445	paravirt_start_context_switch(prev);
446	vmi_ops.set_lazy_mode(2);
447}
448
449static void vmi_end_context_switch(struct task_struct *next)
450{
451	vmi_ops.set_lazy_mode(0);
452	paravirt_end_context_switch(next);
453}
454
455static void vmi_enter_lazy_mmu(void)
456{
457	paravirt_enter_lazy_mmu();
458	vmi_ops.set_lazy_mode(1);
459}
460
461static void vmi_leave_lazy_mmu(void)
462{
463	vmi_ops.set_lazy_mode(0);
464	paravirt_leave_lazy_mmu();
465}
466
467static inline int __init check_vmi_rom(struct vrom_header *rom)
468{
469	struct pci_header *pci;
470	struct pnp_header *pnp;
471	const char *manufacturer = "UNKNOWN";
472	const char *product = "UNKNOWN";
473	const char *license = "unspecified";
474
475	if (rom->rom_signature != 0xaa55)
476		return 0;
477	if (rom->vrom_signature != VMI_SIGNATURE)
478		return 0;
479	if (rom->api_version_maj != VMI_API_REV_MAJOR ||
480	    rom->api_version_min+1 < VMI_API_REV_MINOR+1) {
481		printk(KERN_WARNING "VMI: Found mismatched rom version %d.%d\n",
482				rom->api_version_maj,
483				rom->api_version_min);
484		return 0;
485	}
486
487	/*
488	 * Relying on the VMI_SIGNATURE field is not 100% safe, so check
489	 * the PCI header and device type to make sure this is really a
490	 * VMI device.
491	 */
492	if (!rom->pci_header_offs) {
493		printk(KERN_WARNING "VMI: ROM does not contain PCI header.\n");
494		return 0;
495	}
496
497	pci = (struct pci_header *)((char *)rom+rom->pci_header_offs);
498	if (pci->vendorID != PCI_VENDOR_ID_VMWARE ||
499	    pci->deviceID != PCI_DEVICE_ID_VMWARE_VMI) {
500		/* Allow it to run... anyways, but warn */
501		printk(KERN_WARNING "VMI: ROM from unknown manufacturer\n");
502	}
503
504	if (rom->pnp_header_offs) {
505		pnp = (struct pnp_header *)((char *)rom+rom->pnp_header_offs);
506		if (pnp->manufacturer_offset)
507			manufacturer = (const char *)rom+pnp->manufacturer_offset;
508		if (pnp->product_offset)
509			product = (const char *)rom+pnp->product_offset;
510	}
511
512	if (rom->license_offs)
513		license = (char *)rom+rom->license_offs;
514
515	printk(KERN_INFO "VMI: Found %s %s, API version %d.%d, ROM version %d.%d\n",
516		manufacturer, product,
517		rom->api_version_maj, rom->api_version_min,
518		pci->rom_version_maj, pci->rom_version_min);
519
520	/* Don't allow BSD/MIT here for now because we don't want to end up
521	   with any binary only shim layers */
522	if (strcmp(license, "GPL") && strcmp(license, "GPL v2")) {
523		printk(KERN_WARNING "VMI: Non GPL license `%s' found for ROM. Not used.\n",
524			license);
525		return 0;
526	}
527
528	return 1;
529}
530
531/*
532 * Probe for the VMI option ROM
533 */
534static inline int __init probe_vmi_rom(void)
535{
536	unsigned long base;
537
538	/* VMI ROM is in option ROM area, check signature */
539	for (base = 0xC0000; base < 0xE0000; base += 2048) {
540		struct vrom_header *romstart;
541		romstart = (struct vrom_header *)isa_bus_to_virt(base);
542		if (check_vmi_rom(romstart)) {
543			vmi_rom = romstart;
544			return 1;
545		}
546	}
547	return 0;
548}
549
550/*
551 * VMI setup common to all processors
552 */
553void vmi_bringup(void)
554{
555 	/* We must establish the lowmem mapping for MMU ops to work */
556	if (vmi_ops.set_linear_mapping)
557		vmi_ops.set_linear_mapping(0, (void *)__PAGE_OFFSET, MAXMEM_PFN, 0);
558}
559
560/*
561 * Return a pointer to a VMI function or NULL if unimplemented
562 */
563static void *vmi_get_function(int vmicall)
564{
565	u64 reloc;
566	const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc;
567	reloc = call_vrom_long_func(vmi_rom, get_reloc,	vmicall);
568	BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL);
569	if (rel->type == VMI_RELOCATION_CALL_REL)
570		return (void *)rel->eip;
571	else
572		return NULL;
573}
574
575/*
576 * Helper macro for making the VMI paravirt-ops fill code readable.
577 * For unimplemented operations, fall back to default, unless nop
578 * is returned by the ROM.
579 */
580#define para_fill(opname, vmicall)				\
581do {								\
582	reloc = call_vrom_long_func(vmi_rom, get_reloc,		\
583				    VMI_CALL_##vmicall);	\
584	if (rel->type == VMI_RELOCATION_CALL_REL) 		\
585		opname = (void *)rel->eip;			\
586	else if (rel->type == VMI_RELOCATION_NOP) 		\
587		opname = (void *)vmi_nop;			\
588	else if (rel->type != VMI_RELOCATION_NONE)		\
589		printk(KERN_WARNING "VMI: Unknown relocation "	\
590				    "type %d for " #vmicall"\n",\
591					rel->type);		\
592} while (0)
593
594/*
595 * Helper macro for making the VMI paravirt-ops fill code readable.
596 * For cached operations which do not match the VMI ROM ABI and must
597 * go through a tranlation stub.  Ignore NOPs, since it is not clear
598 * a NOP * VMI function corresponds to a NOP paravirt-op when the
599 * functions are not in 1-1 correspondence.
600 */
601#define para_wrap(opname, wrapper, cache, vmicall)		\
602do {								\
603	reloc = call_vrom_long_func(vmi_rom, get_reloc,		\
604				    VMI_CALL_##vmicall);	\
605	BUG_ON(rel->type == VMI_RELOCATION_JUMP_REL);		\
606	if (rel->type == VMI_RELOCATION_CALL_REL) {		\
607		opname = wrapper;				\
608		vmi_ops.cache = (void *)rel->eip;		\
609	}							\
610} while (0)
611
612/*
613 * Activate the VMI interface and switch into paravirtualized mode
614 */
615static inline int __init activate_vmi(void)
616{
617	short kernel_cs;
618	u64 reloc;
619	const struct vmi_relocation_info *rel = (struct vmi_relocation_info *)&reloc;
620
621	/*
622	 * Prevent page tables from being allocated in highmem, even if
623	 * CONFIG_HIGHPTE is enabled.
624	 */
625	__userpte_alloc_gfp &= ~__GFP_HIGHMEM;
626
627	if (call_vrom_func(vmi_rom, vmi_init) != 0) {
628		printk(KERN_ERR "VMI ROM failed to initialize!");
629		return 0;
630	}
631	savesegment(cs, kernel_cs);
632
633	pv_info.paravirt_enabled = 1;
634	pv_info.kernel_rpl = kernel_cs & SEGMENT_RPL_MASK;
635	pv_info.name = "vmi [deprecated]";
636
637	pv_init_ops.patch = vmi_patch;
638
639	/*
640	 * Many of these operations are ABI compatible with VMI.
641	 * This means we can fill in the paravirt-ops with direct
642	 * pointers into the VMI ROM.  If the calling convention for
643	 * these operations changes, this code needs to be updated.
644	 *
645	 * Exceptions
646	 *  CPUID paravirt-op uses pointers, not the native ISA
647	 *  halt has no VMI equivalent; all VMI halts are "safe"
648	 *  no MSR support yet - just trap and emulate.  VMI uses the
649	 *    same ABI as the native ISA, but Linux wants exceptions
650	 *    from bogus MSR read / write handled
651	 *  rdpmc is not yet used in Linux
652	 */
653
654	/* CPUID is special, so very special it gets wrapped like a present */
655	para_wrap(pv_cpu_ops.cpuid, vmi_cpuid, cpuid, CPUID);
656
657	para_fill(pv_cpu_ops.clts, CLTS);
658	para_fill(pv_cpu_ops.get_debugreg, GetDR);
659	para_fill(pv_cpu_ops.set_debugreg, SetDR);
660	para_fill(pv_cpu_ops.read_cr0, GetCR0);
661	para_fill(pv_mmu_ops.read_cr2, GetCR2);
662	para_fill(pv_mmu_ops.read_cr3, GetCR3);
663	para_fill(pv_cpu_ops.read_cr4, GetCR4);
664	para_fill(pv_cpu_ops.write_cr0, SetCR0);
665	para_fill(pv_mmu_ops.write_cr2, SetCR2);
666	para_fill(pv_mmu_ops.write_cr3, SetCR3);
667	para_fill(pv_cpu_ops.write_cr4, SetCR4);
668
669	para_fill(pv_irq_ops.save_fl.func, GetInterruptMask);
670	para_fill(pv_irq_ops.restore_fl.func, SetInterruptMask);
671	para_fill(pv_irq_ops.irq_disable.func, DisableInterrupts);
672	para_fill(pv_irq_ops.irq_enable.func, EnableInterrupts);
673
674	para_fill(pv_cpu_ops.wbinvd, WBINVD);
675	para_fill(pv_cpu_ops.read_tsc, RDTSC);
676
677	/* The following we emulate with trap and emulate for now */
678	/* paravirt_ops.read_msr = vmi_rdmsr */
679	/* paravirt_ops.write_msr = vmi_wrmsr */
680	/* paravirt_ops.rdpmc = vmi_rdpmc */
681
682	/* TR interface doesn't pass TR value, wrap */
683	para_wrap(pv_cpu_ops.load_tr_desc, vmi_set_tr, set_tr, SetTR);
684
685	/* LDT is special, too */
686	para_wrap(pv_cpu_ops.set_ldt, vmi_set_ldt, _set_ldt, SetLDT);
687
688	para_fill(pv_cpu_ops.load_gdt, SetGDT);
689	para_fill(pv_cpu_ops.load_idt, SetIDT);
690	para_fill(pv_cpu_ops.store_gdt, GetGDT);
691	para_fill(pv_cpu_ops.store_idt, GetIDT);
692	para_fill(pv_cpu_ops.store_tr, GetTR);
693	pv_cpu_ops.load_tls = vmi_load_tls;
694	para_wrap(pv_cpu_ops.write_ldt_entry, vmi_write_ldt_entry,
695		  write_ldt_entry, WriteLDTEntry);
696	para_wrap(pv_cpu_ops.write_gdt_entry, vmi_write_gdt_entry,
697		  write_gdt_entry, WriteGDTEntry);
698	para_wrap(pv_cpu_ops.write_idt_entry, vmi_write_idt_entry,
699		  write_idt_entry, WriteIDTEntry);
700	para_wrap(pv_cpu_ops.load_sp0, vmi_load_sp0, set_kernel_stack, UpdateKernelStack);
701	para_fill(pv_cpu_ops.set_iopl_mask, SetIOPLMask);
702	para_fill(pv_cpu_ops.io_delay, IODelay);
703
704	para_wrap(pv_cpu_ops.start_context_switch, vmi_start_context_switch,
705		  set_lazy_mode, SetLazyMode);
706	para_wrap(pv_cpu_ops.end_context_switch, vmi_end_context_switch,
707		  set_lazy_mode, SetLazyMode);
708
709	para_wrap(pv_mmu_ops.lazy_mode.enter, vmi_enter_lazy_mmu,
710		  set_lazy_mode, SetLazyMode);
711	para_wrap(pv_mmu_ops.lazy_mode.leave, vmi_leave_lazy_mmu,
712		  set_lazy_mode, SetLazyMode);
713
714	/* user and kernel flush are just handled with different flags to FlushTLB */
715	para_wrap(pv_mmu_ops.flush_tlb_user, vmi_flush_tlb_user, _flush_tlb, FlushTLB);
716	para_wrap(pv_mmu_ops.flush_tlb_kernel, vmi_flush_tlb_kernel, _flush_tlb, FlushTLB);
717	para_fill(pv_mmu_ops.flush_tlb_single, InvalPage);
718
719	/*
720	 * Until a standard flag format can be agreed on, we need to
721	 * implement these as wrappers in Linux.  Get the VMI ROM
722	 * function pointers for the two backend calls.
723	 */
724#ifdef CONFIG_X86_PAE
725	vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxELong);
726	vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxELong);
727#else
728	vmi_ops.set_pte = vmi_get_function(VMI_CALL_SetPxE);
729	vmi_ops.update_pte = vmi_get_function(VMI_CALL_UpdatePxE);
730#endif
731
732	if (vmi_ops.set_pte) {
733		pv_mmu_ops.set_pte = vmi_set_pte;
734		pv_mmu_ops.set_pte_at = vmi_set_pte_at;
735		pv_mmu_ops.set_pmd = vmi_set_pmd;
736#ifdef CONFIG_X86_PAE
737		pv_mmu_ops.set_pte_atomic = vmi_set_pte_atomic;
738		pv_mmu_ops.set_pud = vmi_set_pud;
739		pv_mmu_ops.pte_clear = vmi_pte_clear;
740		pv_mmu_ops.pmd_clear = vmi_pmd_clear;
741#endif
742	}
743
744	if (vmi_ops.update_pte) {
745		pv_mmu_ops.pte_update = vmi_update_pte;
746		pv_mmu_ops.pte_update_defer = vmi_update_pte_defer;
747	}
748
749	vmi_ops.allocate_page = vmi_get_function(VMI_CALL_AllocatePage);
750	if (vmi_ops.allocate_page) {
751		pv_mmu_ops.alloc_pte = vmi_allocate_pte;
752		pv_mmu_ops.alloc_pmd = vmi_allocate_pmd;
753		pv_mmu_ops.alloc_pmd_clone = vmi_allocate_pmd_clone;
754	}
755
756	vmi_ops.release_page = vmi_get_function(VMI_CALL_ReleasePage);
757	if (vmi_ops.release_page) {
758		pv_mmu_ops.release_pte = vmi_release_pte;
759		pv_mmu_ops.release_pmd = vmi_release_pmd;
760		pv_mmu_ops.pgd_free = vmi_pgd_free;
761	}
762
763	/* Set linear is needed in all cases */
764	vmi_ops.set_linear_mapping = vmi_get_function(VMI_CALL_SetLinearMapping);
765
766	/*
767	 * These MUST always be patched.  Don't support indirect jumps
768	 * through these operations, as the VMI interface may use either
769	 * a jump or a call to get to these operations, depending on
770	 * the backend.  They are performance critical anyway, so requiring
771	 * a patch is not a big problem.
772	 */
773	pv_cpu_ops.irq_enable_sysexit = (void *)0xfeedbab0;
774	pv_cpu_ops.iret = (void *)0xbadbab0;
775
776#ifdef CONFIG_SMP
777	para_wrap(pv_apic_ops.startup_ipi_hook, vmi_startup_ipi_hook, set_initial_ap_state, SetInitialAPState);
778#endif
779
780#ifdef CONFIG_X86_LOCAL_APIC
781       para_fill(apic->read, APICRead);
782       para_fill(apic->write, APICWrite);
783#endif
784
785	/*
786	 * Check for VMI timer functionality by probing for a cycle frequency method
787	 */
788	reloc = call_vrom_long_func(vmi_rom, get_reloc, VMI_CALL_GetCycleFrequency);
789	if (!disable_vmi_timer && rel->type != VMI_RELOCATION_NONE) {
790		vmi_timer_ops.get_cycle_frequency = (void *)rel->eip;
791		vmi_timer_ops.get_cycle_counter =
792			vmi_get_function(VMI_CALL_GetCycleCounter);
793		vmi_timer_ops.get_wallclock =
794			vmi_get_function(VMI_CALL_GetWallclockTime);
795		vmi_timer_ops.wallclock_updated =
796			vmi_get_function(VMI_CALL_WallclockUpdated);
797		vmi_timer_ops.set_alarm = vmi_get_function(VMI_CALL_SetAlarm);
798		vmi_timer_ops.cancel_alarm =
799			 vmi_get_function(VMI_CALL_CancelAlarm);
800		x86_init.timers.timer_init = vmi_time_init;
801#ifdef CONFIG_X86_LOCAL_APIC
802		x86_init.timers.setup_percpu_clockev = vmi_time_bsp_init;
803		x86_cpuinit.setup_percpu_clockev = vmi_time_ap_init;
804#endif
805		pv_time_ops.sched_clock = vmi_sched_clock;
806		x86_platform.calibrate_tsc = vmi_tsc_khz;
807		x86_platform.get_wallclock = vmi_get_wallclock;
808		x86_platform.set_wallclock = vmi_set_wallclock;
809
810		/* We have true wallclock functions; disable CMOS clock sync */
811		no_sync_cmos_clock = 1;
812	} else {
813		disable_noidle = 1;
814		disable_vmi_timer = 1;
815	}
816
817	para_fill(pv_irq_ops.safe_halt, Halt);
818
819	/*
820	 * Alternative instruction rewriting doesn't happen soon enough
821	 * to convert VMI_IRET to a call instead of a jump; so we have
822	 * to do this before IRQs get reenabled.  Fortunately, it is
823	 * idempotent.
824	 */
825	apply_paravirt(__parainstructions, __parainstructions_end);
826
827	vmi_bringup();
828
829	return 1;
830}
831
832#undef para_fill
833
834void __init vmi_init(void)
835{
836	if (!vmi_rom)
837		probe_vmi_rom();
838	else
839		check_vmi_rom(vmi_rom);
840
841	/* In case probing for or validating the ROM failed, basil */
842	if (!vmi_rom)
843		return;
844
845	reserve_top_address(-vmi_rom->virtual_top);
846
847#ifdef CONFIG_X86_IO_APIC
848	/* This is virtual hardware; timer routing is wired correctly */
849	no_timer_check = 1;
850#endif
851}
852
853void __init vmi_activate(void)
854{
855	unsigned long flags;
856
857	if (!vmi_rom)
858		return;
859
860	local_irq_save(flags);
861	activate_vmi();
862	local_irq_restore(flags & X86_EFLAGS_IF);
863}
864
865static int __init parse_vmi(char *arg)
866{
867	if (!arg)
868		return -EINVAL;
869
870	if (!strcmp(arg, "disable_pge")) {
871		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PGE);
872		disable_pge = 1;
873	} else if (!strcmp(arg, "disable_pse")) {
874		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_PSE);
875		disable_pse = 1;
876	} else if (!strcmp(arg, "disable_sep")) {
877		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_SEP);
878		disable_sep = 1;
879	} else if (!strcmp(arg, "disable_tsc")) {
880		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_TSC);
881		disable_tsc = 1;
882	} else if (!strcmp(arg, "disable_mtrr")) {
883		clear_cpu_cap(&boot_cpu_data, X86_FEATURE_MTRR);
884		disable_mtrr = 1;
885	} else if (!strcmp(arg, "disable_timer")) {
886		disable_vmi_timer = 1;
887		disable_noidle = 1;
888	} else if (!strcmp(arg, "disable_noidle"))
889		disable_noidle = 1;
890	return 0;
891}
892
893early_param("vmi", parse_vmi);