/arch/x86/kernel/cpu/cpufreq/powernow-k8.c

https://bitbucket.org/cresqo/cm7-p500-kernel · C · 1599 lines · 1188 code · 278 blank · 133 comment · 255 complexity · 94c364ed941e0ef79f49455a78550c08 MD5 · raw file

  1. /*
  2. * (c) 2003-2010 Advanced Micro Devices, Inc.
  3. * Your use of this code is subject to the terms and conditions of the
  4. * GNU general public license version 2. See "COPYING" or
  5. * http://www.gnu.org/licenses/gpl.html
  6. *
  7. * Support : mark.langsdorf@amd.com
  8. *
  9. * Based on the powernow-k7.c module written by Dave Jones.
  10. * (C) 2003 Dave Jones on behalf of SuSE Labs
  11. * (C) 2004 Dominik Brodowski <linux@brodo.de>
  12. * (C) 2004 Pavel Machek <pavel@suse.cz>
  13. * Licensed under the terms of the GNU GPL License version 2.
  14. * Based upon datasheets & sample CPUs kindly provided by AMD.
  15. *
  16. * Valuable input gratefully received from Dave Jones, Pavel Machek,
  17. * Dominik Brodowski, Jacob Shin, and others.
  18. * Originally developed by Paul Devriendt.
  19. * Processor information obtained from Chapter 9 (Power and Thermal Management)
  20. * of the "BIOS and Kernel Developer's Guide for the AMD Athlon 64 and AMD
  21. * Opteron Processors" available for download from www.amd.com
  22. *
  23. * Tables for specific CPUs can be inferred from
  24. * http://www.amd.com/us-en/assets/content_type/white_papers_and_tech_docs/30430.pdf
  25. */
  26. #include <linux/kernel.h>
  27. #include <linux/smp.h>
  28. #include <linux/module.h>
  29. #include <linux/init.h>
  30. #include <linux/cpufreq.h>
  31. #include <linux/slab.h>
  32. #include <linux/string.h>
  33. #include <linux/cpumask.h>
  34. #include <linux/sched.h> /* for current / set_cpus_allowed() */
  35. #include <linux/io.h>
  36. #include <linux/delay.h>
  37. #include <asm/msr.h>
  38. #include <linux/acpi.h>
  39. #include <linux/mutex.h>
  40. #include <acpi/processor.h>
  41. #define PFX "powernow-k8: "
  42. #define VERSION "version 2.20.00"
  43. #include "powernow-k8.h"
  44. #include "mperf.h"
  45. /* serialize freq changes */
  46. static DEFINE_MUTEX(fidvid_mutex);
  47. static DEFINE_PER_CPU(struct powernow_k8_data *, powernow_data);
  48. static int cpu_family = CPU_OPTERON;
  49. /* core performance boost */
  50. static bool cpb_capable, cpb_enabled;
  51. static struct msr __percpu *msrs;
  52. static struct cpufreq_driver cpufreq_amd64_driver;
  53. #ifndef CONFIG_SMP
  54. static inline const struct cpumask *cpu_core_mask(int cpu)
  55. {
  56. return cpumask_of(0);
  57. }
  58. #endif
  59. /* Return a frequency in MHz, given an input fid */
  60. static u32 find_freq_from_fid(u32 fid)
  61. {
  62. return 800 + (fid * 100);
  63. }
  64. /* Return a frequency in KHz, given an input fid */
  65. static u32 find_khz_freq_from_fid(u32 fid)
  66. {
  67. return 1000 * find_freq_from_fid(fid);
  68. }
  69. static u32 find_khz_freq_from_pstate(struct cpufreq_frequency_table *data,
  70. u32 pstate)
  71. {
  72. return data[pstate].frequency;
  73. }
  74. /* Return the vco fid for an input fid
  75. *
  76. * Each "low" fid has corresponding "high" fid, and you can get to "low" fids
  77. * only from corresponding high fids. This returns "high" fid corresponding to
  78. * "low" one.
  79. */
  80. static u32 convert_fid_to_vco_fid(u32 fid)
  81. {
  82. if (fid < HI_FID_TABLE_BOTTOM)
  83. return 8 + (2 * fid);
  84. else
  85. return fid;
  86. }
  87. /*
  88. * Return 1 if the pending bit is set. Unless we just instructed the processor
  89. * to transition to a new state, seeing this bit set is really bad news.
  90. */
  91. static int pending_bit_stuck(void)
  92. {
  93. u32 lo, hi;
  94. if (cpu_family == CPU_HW_PSTATE)
  95. return 0;
  96. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  97. return lo & MSR_S_LO_CHANGE_PENDING ? 1 : 0;
  98. }
  99. /*
  100. * Update the global current fid / vid values from the status msr.
  101. * Returns 1 on error.
  102. */
  103. static int query_current_values_with_pending_wait(struct powernow_k8_data *data)
  104. {
  105. u32 lo, hi;
  106. u32 i = 0;
  107. if (cpu_family == CPU_HW_PSTATE) {
  108. rdmsr(MSR_PSTATE_STATUS, lo, hi);
  109. i = lo & HW_PSTATE_MASK;
  110. data->currpstate = i;
  111. /*
  112. * a workaround for family 11h erratum 311 might cause
  113. * an "out-of-range Pstate if the core is in Pstate-0
  114. */
  115. if ((boot_cpu_data.x86 == 0x11) && (i >= data->numps))
  116. data->currpstate = HW_PSTATE_0;
  117. return 0;
  118. }
  119. do {
  120. if (i++ > 10000) {
  121. dprintk("detected change pending stuck\n");
  122. return 1;
  123. }
  124. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  125. } while (lo & MSR_S_LO_CHANGE_PENDING);
  126. data->currvid = hi & MSR_S_HI_CURRENT_VID;
  127. data->currfid = lo & MSR_S_LO_CURRENT_FID;
  128. return 0;
  129. }
  130. /* the isochronous relief time */
  131. static void count_off_irt(struct powernow_k8_data *data)
  132. {
  133. udelay((1 << data->irt) * 10);
  134. return;
  135. }
  136. /* the voltage stabilization time */
  137. static void count_off_vst(struct powernow_k8_data *data)
  138. {
  139. udelay(data->vstable * VST_UNITS_20US);
  140. return;
  141. }
  142. /* need to init the control msr to a safe value (for each cpu) */
  143. static void fidvid_msr_init(void)
  144. {
  145. u32 lo, hi;
  146. u8 fid, vid;
  147. rdmsr(MSR_FIDVID_STATUS, lo, hi);
  148. vid = hi & MSR_S_HI_CURRENT_VID;
  149. fid = lo & MSR_S_LO_CURRENT_FID;
  150. lo = fid | (vid << MSR_C_LO_VID_SHIFT);
  151. hi = MSR_C_HI_STP_GNT_BENIGN;
  152. dprintk("cpu%d, init lo 0x%x, hi 0x%x\n", smp_processor_id(), lo, hi);
  153. wrmsr(MSR_FIDVID_CTL, lo, hi);
  154. }
  155. /* write the new fid value along with the other control fields to the msr */
  156. static int write_new_fid(struct powernow_k8_data *data, u32 fid)
  157. {
  158. u32 lo;
  159. u32 savevid = data->currvid;
  160. u32 i = 0;
  161. if ((fid & INVALID_FID_MASK) || (data->currvid & INVALID_VID_MASK)) {
  162. printk(KERN_ERR PFX "internal error - overflow on fid write\n");
  163. return 1;
  164. }
  165. lo = fid;
  166. lo |= (data->currvid << MSR_C_LO_VID_SHIFT);
  167. lo |= MSR_C_LO_INIT_FID_VID;
  168. dprintk("writing fid 0x%x, lo 0x%x, hi 0x%x\n",
  169. fid, lo, data->plllock * PLL_LOCK_CONVERSION);
  170. do {
  171. wrmsr(MSR_FIDVID_CTL, lo, data->plllock * PLL_LOCK_CONVERSION);
  172. if (i++ > 100) {
  173. printk(KERN_ERR PFX
  174. "Hardware error - pending bit very stuck - "
  175. "no further pstate changes possible\n");
  176. return 1;
  177. }
  178. } while (query_current_values_with_pending_wait(data));
  179. count_off_irt(data);
  180. if (savevid != data->currvid) {
  181. printk(KERN_ERR PFX
  182. "vid change on fid trans, old 0x%x, new 0x%x\n",
  183. savevid, data->currvid);
  184. return 1;
  185. }
  186. if (fid != data->currfid) {
  187. printk(KERN_ERR PFX
  188. "fid trans failed, fid 0x%x, curr 0x%x\n", fid,
  189. data->currfid);
  190. return 1;
  191. }
  192. return 0;
  193. }
  194. /* Write a new vid to the hardware */
  195. static int write_new_vid(struct powernow_k8_data *data, u32 vid)
  196. {
  197. u32 lo;
  198. u32 savefid = data->currfid;
  199. int i = 0;
  200. if ((data->currfid & INVALID_FID_MASK) || (vid & INVALID_VID_MASK)) {
  201. printk(KERN_ERR PFX "internal error - overflow on vid write\n");
  202. return 1;
  203. }
  204. lo = data->currfid;
  205. lo |= (vid << MSR_C_LO_VID_SHIFT);
  206. lo |= MSR_C_LO_INIT_FID_VID;
  207. dprintk("writing vid 0x%x, lo 0x%x, hi 0x%x\n",
  208. vid, lo, STOP_GRANT_5NS);
  209. do {
  210. wrmsr(MSR_FIDVID_CTL, lo, STOP_GRANT_5NS);
  211. if (i++ > 100) {
  212. printk(KERN_ERR PFX "internal error - pending bit "
  213. "very stuck - no further pstate "
  214. "changes possible\n");
  215. return 1;
  216. }
  217. } while (query_current_values_with_pending_wait(data));
  218. if (savefid != data->currfid) {
  219. printk(KERN_ERR PFX "fid changed on vid trans, old "
  220. "0x%x new 0x%x\n",
  221. savefid, data->currfid);
  222. return 1;
  223. }
  224. if (vid != data->currvid) {
  225. printk(KERN_ERR PFX "vid trans failed, vid 0x%x, "
  226. "curr 0x%x\n",
  227. vid, data->currvid);
  228. return 1;
  229. }
  230. return 0;
  231. }
  232. /*
  233. * Reduce the vid by the max of step or reqvid.
  234. * Decreasing vid codes represent increasing voltages:
  235. * vid of 0 is 1.550V, vid of 0x1e is 0.800V, vid of VID_OFF is off.
  236. */
  237. static int decrease_vid_code_by_step(struct powernow_k8_data *data,
  238. u32 reqvid, u32 step)
  239. {
  240. if ((data->currvid - reqvid) > step)
  241. reqvid = data->currvid - step;
  242. if (write_new_vid(data, reqvid))
  243. return 1;
  244. count_off_vst(data);
  245. return 0;
  246. }
  247. /* Change hardware pstate by single MSR write */
  248. static int transition_pstate(struct powernow_k8_data *data, u32 pstate)
  249. {
  250. wrmsr(MSR_PSTATE_CTRL, pstate, 0);
  251. data->currpstate = pstate;
  252. return 0;
  253. }
  254. /* Change Opteron/Athlon64 fid and vid, by the 3 phases. */
  255. static int transition_fid_vid(struct powernow_k8_data *data,
  256. u32 reqfid, u32 reqvid)
  257. {
  258. if (core_voltage_pre_transition(data, reqvid, reqfid))
  259. return 1;
  260. if (core_frequency_transition(data, reqfid))
  261. return 1;
  262. if (core_voltage_post_transition(data, reqvid))
  263. return 1;
  264. if (query_current_values_with_pending_wait(data))
  265. return 1;
  266. if ((reqfid != data->currfid) || (reqvid != data->currvid)) {
  267. printk(KERN_ERR PFX "failed (cpu%d): req 0x%x 0x%x, "
  268. "curr 0x%x 0x%x\n",
  269. smp_processor_id(),
  270. reqfid, reqvid, data->currfid, data->currvid);
  271. return 1;
  272. }
  273. dprintk("transitioned (cpu%d): new fid 0x%x, vid 0x%x\n",
  274. smp_processor_id(), data->currfid, data->currvid);
  275. return 0;
  276. }
  277. /* Phase 1 - core voltage transition ... setup voltage */
  278. static int core_voltage_pre_transition(struct powernow_k8_data *data,
  279. u32 reqvid, u32 reqfid)
  280. {
  281. u32 rvosteps = data->rvo;
  282. u32 savefid = data->currfid;
  283. u32 maxvid, lo, rvomult = 1;
  284. dprintk("ph1 (cpu%d): start, currfid 0x%x, currvid 0x%x, "
  285. "reqvid 0x%x, rvo 0x%x\n",
  286. smp_processor_id(),
  287. data->currfid, data->currvid, reqvid, data->rvo);
  288. if ((savefid < LO_FID_TABLE_TOP) && (reqfid < LO_FID_TABLE_TOP))
  289. rvomult = 2;
  290. rvosteps *= rvomult;
  291. rdmsr(MSR_FIDVID_STATUS, lo, maxvid);
  292. maxvid = 0x1f & (maxvid >> 16);
  293. dprintk("ph1 maxvid=0x%x\n", maxvid);
  294. if (reqvid < maxvid) /* lower numbers are higher voltages */
  295. reqvid = maxvid;
  296. while (data->currvid > reqvid) {
  297. dprintk("ph1: curr 0x%x, req vid 0x%x\n",
  298. data->currvid, reqvid);
  299. if (decrease_vid_code_by_step(data, reqvid, data->vidmvs))
  300. return 1;
  301. }
  302. while ((rvosteps > 0) &&
  303. ((rvomult * data->rvo + data->currvid) > reqvid)) {
  304. if (data->currvid == maxvid) {
  305. rvosteps = 0;
  306. } else {
  307. dprintk("ph1: changing vid for rvo, req 0x%x\n",
  308. data->currvid - 1);
  309. if (decrease_vid_code_by_step(data, data->currvid-1, 1))
  310. return 1;
  311. rvosteps--;
  312. }
  313. }
  314. if (query_current_values_with_pending_wait(data))
  315. return 1;
  316. if (savefid != data->currfid) {
  317. printk(KERN_ERR PFX "ph1 err, currfid changed 0x%x\n",
  318. data->currfid);
  319. return 1;
  320. }
  321. dprintk("ph1 complete, currfid 0x%x, currvid 0x%x\n",
  322. data->currfid, data->currvid);
  323. return 0;
  324. }
  325. /* Phase 2 - core frequency transition */
  326. static int core_frequency_transition(struct powernow_k8_data *data, u32 reqfid)
  327. {
  328. u32 vcoreqfid, vcocurrfid, vcofiddiff;
  329. u32 fid_interval, savevid = data->currvid;
  330. if (data->currfid == reqfid) {
  331. printk(KERN_ERR PFX "ph2 null fid transition 0x%x\n",
  332. data->currfid);
  333. return 0;
  334. }
  335. dprintk("ph2 (cpu%d): starting, currfid 0x%x, currvid 0x%x, "
  336. "reqfid 0x%x\n",
  337. smp_processor_id(),
  338. data->currfid, data->currvid, reqfid);
  339. vcoreqfid = convert_fid_to_vco_fid(reqfid);
  340. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  341. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  342. : vcoreqfid - vcocurrfid;
  343. if ((reqfid <= LO_FID_TABLE_TOP) && (data->currfid <= LO_FID_TABLE_TOP))
  344. vcofiddiff = 0;
  345. while (vcofiddiff > 2) {
  346. (data->currfid & 1) ? (fid_interval = 1) : (fid_interval = 2);
  347. if (reqfid > data->currfid) {
  348. if (data->currfid > LO_FID_TABLE_TOP) {
  349. if (write_new_fid(data,
  350. data->currfid + fid_interval))
  351. return 1;
  352. } else {
  353. if (write_new_fid
  354. (data,
  355. 2 + convert_fid_to_vco_fid(data->currfid)))
  356. return 1;
  357. }
  358. } else {
  359. if (write_new_fid(data, data->currfid - fid_interval))
  360. return 1;
  361. }
  362. vcocurrfid = convert_fid_to_vco_fid(data->currfid);
  363. vcofiddiff = vcocurrfid > vcoreqfid ? vcocurrfid - vcoreqfid
  364. : vcoreqfid - vcocurrfid;
  365. }
  366. if (write_new_fid(data, reqfid))
  367. return 1;
  368. if (query_current_values_with_pending_wait(data))
  369. return 1;
  370. if (data->currfid != reqfid) {
  371. printk(KERN_ERR PFX
  372. "ph2: mismatch, failed fid transition, "
  373. "curr 0x%x, req 0x%x\n",
  374. data->currfid, reqfid);
  375. return 1;
  376. }
  377. if (savevid != data->currvid) {
  378. printk(KERN_ERR PFX "ph2: vid changed, save 0x%x, curr 0x%x\n",
  379. savevid, data->currvid);
  380. return 1;
  381. }
  382. dprintk("ph2 complete, currfid 0x%x, currvid 0x%x\n",
  383. data->currfid, data->currvid);
  384. return 0;
  385. }
  386. /* Phase 3 - core voltage transition flow ... jump to the final vid. */
  387. static int core_voltage_post_transition(struct powernow_k8_data *data,
  388. u32 reqvid)
  389. {
  390. u32 savefid = data->currfid;
  391. u32 savereqvid = reqvid;
  392. dprintk("ph3 (cpu%d): starting, currfid 0x%x, currvid 0x%x\n",
  393. smp_processor_id(),
  394. data->currfid, data->currvid);
  395. if (reqvid != data->currvid) {
  396. if (write_new_vid(data, reqvid))
  397. return 1;
  398. if (savefid != data->currfid) {
  399. printk(KERN_ERR PFX
  400. "ph3: bad fid change, save 0x%x, curr 0x%x\n",
  401. savefid, data->currfid);
  402. return 1;
  403. }
  404. if (data->currvid != reqvid) {
  405. printk(KERN_ERR PFX
  406. "ph3: failed vid transition\n, "
  407. "req 0x%x, curr 0x%x",
  408. reqvid, data->currvid);
  409. return 1;
  410. }
  411. }
  412. if (query_current_values_with_pending_wait(data))
  413. return 1;
  414. if (savereqvid != data->currvid) {
  415. dprintk("ph3 failed, currvid 0x%x\n", data->currvid);
  416. return 1;
  417. }
  418. if (savefid != data->currfid) {
  419. dprintk("ph3 failed, currfid changed 0x%x\n",
  420. data->currfid);
  421. return 1;
  422. }
  423. dprintk("ph3 complete, currfid 0x%x, currvid 0x%x\n",
  424. data->currfid, data->currvid);
  425. return 0;
  426. }
  427. static void check_supported_cpu(void *_rc)
  428. {
  429. u32 eax, ebx, ecx, edx;
  430. int *rc = _rc;
  431. *rc = -ENODEV;
  432. if (current_cpu_data.x86_vendor != X86_VENDOR_AMD)
  433. return;
  434. eax = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  435. if (((eax & CPUID_XFAM) != CPUID_XFAM_K8) &&
  436. ((eax & CPUID_XFAM) < CPUID_XFAM_10H))
  437. return;
  438. if ((eax & CPUID_XFAM) == CPUID_XFAM_K8) {
  439. if (((eax & CPUID_USE_XFAM_XMOD) != CPUID_USE_XFAM_XMOD) ||
  440. ((eax & CPUID_XMOD) > CPUID_XMOD_REV_MASK)) {
  441. printk(KERN_INFO PFX
  442. "Processor cpuid %x not supported\n", eax);
  443. return;
  444. }
  445. eax = cpuid_eax(CPUID_GET_MAX_CAPABILITIES);
  446. if (eax < CPUID_FREQ_VOLT_CAPABILITIES) {
  447. printk(KERN_INFO PFX
  448. "No frequency change capabilities detected\n");
  449. return;
  450. }
  451. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  452. if ((edx & P_STATE_TRANSITION_CAPABLE)
  453. != P_STATE_TRANSITION_CAPABLE) {
  454. printk(KERN_INFO PFX
  455. "Power state transitions not supported\n");
  456. return;
  457. }
  458. } else { /* must be a HW Pstate capable processor */
  459. cpuid(CPUID_FREQ_VOLT_CAPABILITIES, &eax, &ebx, &ecx, &edx);
  460. if ((edx & USE_HW_PSTATE) == USE_HW_PSTATE)
  461. cpu_family = CPU_HW_PSTATE;
  462. else
  463. return;
  464. }
  465. *rc = 0;
  466. }
  467. static int check_pst_table(struct powernow_k8_data *data, struct pst_s *pst,
  468. u8 maxvid)
  469. {
  470. unsigned int j;
  471. u8 lastfid = 0xff;
  472. for (j = 0; j < data->numps; j++) {
  473. if (pst[j].vid > LEAST_VID) {
  474. printk(KERN_ERR FW_BUG PFX "vid %d invalid : 0x%x\n",
  475. j, pst[j].vid);
  476. return -EINVAL;
  477. }
  478. if (pst[j].vid < data->rvo) {
  479. /* vid + rvo >= 0 */
  480. printk(KERN_ERR FW_BUG PFX "0 vid exceeded with pstate"
  481. " %d\n", j);
  482. return -ENODEV;
  483. }
  484. if (pst[j].vid < maxvid + data->rvo) {
  485. /* vid + rvo >= maxvid */
  486. printk(KERN_ERR FW_BUG PFX "maxvid exceeded with pstate"
  487. " %d\n", j);
  488. return -ENODEV;
  489. }
  490. if (pst[j].fid > MAX_FID) {
  491. printk(KERN_ERR FW_BUG PFX "maxfid exceeded with pstate"
  492. " %d\n", j);
  493. return -ENODEV;
  494. }
  495. if (j && (pst[j].fid < HI_FID_TABLE_BOTTOM)) {
  496. /* Only first fid is allowed to be in "low" range */
  497. printk(KERN_ERR FW_BUG PFX "two low fids - %d : "
  498. "0x%x\n", j, pst[j].fid);
  499. return -EINVAL;
  500. }
  501. if (pst[j].fid < lastfid)
  502. lastfid = pst[j].fid;
  503. }
  504. if (lastfid & 1) {
  505. printk(KERN_ERR FW_BUG PFX "lastfid invalid\n");
  506. return -EINVAL;
  507. }
  508. if (lastfid > LO_FID_TABLE_TOP)
  509. printk(KERN_INFO FW_BUG PFX
  510. "first fid not from lo freq table\n");
  511. return 0;
  512. }
  513. static void invalidate_entry(struct cpufreq_frequency_table *powernow_table,
  514. unsigned int entry)
  515. {
  516. powernow_table[entry].frequency = CPUFREQ_ENTRY_INVALID;
  517. }
  518. static void print_basics(struct powernow_k8_data *data)
  519. {
  520. int j;
  521. for (j = 0; j < data->numps; j++) {
  522. if (data->powernow_table[j].frequency !=
  523. CPUFREQ_ENTRY_INVALID) {
  524. if (cpu_family == CPU_HW_PSTATE) {
  525. printk(KERN_INFO PFX
  526. " %d : pstate %d (%d MHz)\n", j,
  527. data->powernow_table[j].index,
  528. data->powernow_table[j].frequency/1000);
  529. } else {
  530. printk(KERN_INFO PFX
  531. " %d : fid 0x%x (%d MHz), vid 0x%x\n",
  532. j,
  533. data->powernow_table[j].index & 0xff,
  534. data->powernow_table[j].frequency/1000,
  535. data->powernow_table[j].index >> 8);
  536. }
  537. }
  538. }
  539. if (data->batps)
  540. printk(KERN_INFO PFX "Only %d pstates on battery\n",
  541. data->batps);
  542. }
  543. static u32 freq_from_fid_did(u32 fid, u32 did)
  544. {
  545. u32 mhz = 0;
  546. if (boot_cpu_data.x86 == 0x10)
  547. mhz = (100 * (fid + 0x10)) >> did;
  548. else if (boot_cpu_data.x86 == 0x11)
  549. mhz = (100 * (fid + 8)) >> did;
  550. else
  551. BUG();
  552. return mhz * 1000;
  553. }
  554. static int fill_powernow_table(struct powernow_k8_data *data,
  555. struct pst_s *pst, u8 maxvid)
  556. {
  557. struct cpufreq_frequency_table *powernow_table;
  558. unsigned int j;
  559. if (data->batps) {
  560. /* use ACPI support to get full speed on mains power */
  561. printk(KERN_WARNING PFX
  562. "Only %d pstates usable (use ACPI driver for full "
  563. "range\n", data->batps);
  564. data->numps = data->batps;
  565. }
  566. for (j = 1; j < data->numps; j++) {
  567. if (pst[j-1].fid >= pst[j].fid) {
  568. printk(KERN_ERR PFX "PST out of sequence\n");
  569. return -EINVAL;
  570. }
  571. }
  572. if (data->numps < 2) {
  573. printk(KERN_ERR PFX "no p states to transition\n");
  574. return -ENODEV;
  575. }
  576. if (check_pst_table(data, pst, maxvid))
  577. return -EINVAL;
  578. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  579. * (data->numps + 1)), GFP_KERNEL);
  580. if (!powernow_table) {
  581. printk(KERN_ERR PFX "powernow_table memory alloc failure\n");
  582. return -ENOMEM;
  583. }
  584. for (j = 0; j < data->numps; j++) {
  585. int freq;
  586. powernow_table[j].index = pst[j].fid; /* lower 8 bits */
  587. powernow_table[j].index |= (pst[j].vid << 8); /* upper 8 bits */
  588. freq = find_khz_freq_from_fid(pst[j].fid);
  589. powernow_table[j].frequency = freq;
  590. }
  591. powernow_table[data->numps].frequency = CPUFREQ_TABLE_END;
  592. powernow_table[data->numps].index = 0;
  593. if (query_current_values_with_pending_wait(data)) {
  594. kfree(powernow_table);
  595. return -EIO;
  596. }
  597. dprintk("cfid 0x%x, cvid 0x%x\n", data->currfid, data->currvid);
  598. data->powernow_table = powernow_table;
  599. if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
  600. print_basics(data);
  601. for (j = 0; j < data->numps; j++)
  602. if ((pst[j].fid == data->currfid) &&
  603. (pst[j].vid == data->currvid))
  604. return 0;
  605. dprintk("currfid/vid do not match PST, ignoring\n");
  606. return 0;
  607. }
  608. /* Find and validate the PSB/PST table in BIOS. */
  609. static int find_psb_table(struct powernow_k8_data *data)
  610. {
  611. struct psb_s *psb;
  612. unsigned int i;
  613. u32 mvs;
  614. u8 maxvid;
  615. u32 cpst = 0;
  616. u32 thiscpuid;
  617. for (i = 0xc0000; i < 0xffff0; i += 0x10) {
  618. /* Scan BIOS looking for the signature. */
  619. /* It can not be at ffff0 - it is too big. */
  620. psb = phys_to_virt(i);
  621. if (memcmp(psb, PSB_ID_STRING, PSB_ID_STRING_LEN) != 0)
  622. continue;
  623. dprintk("found PSB header at 0x%p\n", psb);
  624. dprintk("table vers: 0x%x\n", psb->tableversion);
  625. if (psb->tableversion != PSB_VERSION_1_4) {
  626. printk(KERN_ERR FW_BUG PFX "PSB table is not v1.4\n");
  627. return -ENODEV;
  628. }
  629. dprintk("flags: 0x%x\n", psb->flags1);
  630. if (psb->flags1) {
  631. printk(KERN_ERR FW_BUG PFX "unknown flags\n");
  632. return -ENODEV;
  633. }
  634. data->vstable = psb->vstable;
  635. dprintk("voltage stabilization time: %d(*20us)\n",
  636. data->vstable);
  637. dprintk("flags2: 0x%x\n", psb->flags2);
  638. data->rvo = psb->flags2 & 3;
  639. data->irt = ((psb->flags2) >> 2) & 3;
  640. mvs = ((psb->flags2) >> 4) & 3;
  641. data->vidmvs = 1 << mvs;
  642. data->batps = ((psb->flags2) >> 6) & 3;
  643. dprintk("ramp voltage offset: %d\n", data->rvo);
  644. dprintk("isochronous relief time: %d\n", data->irt);
  645. dprintk("maximum voltage step: %d - 0x%x\n", mvs, data->vidmvs);
  646. dprintk("numpst: 0x%x\n", psb->num_tables);
  647. cpst = psb->num_tables;
  648. if ((psb->cpuid == 0x00000fc0) ||
  649. (psb->cpuid == 0x00000fe0)) {
  650. thiscpuid = cpuid_eax(CPUID_PROCESSOR_SIGNATURE);
  651. if ((thiscpuid == 0x00000fc0) ||
  652. (thiscpuid == 0x00000fe0))
  653. cpst = 1;
  654. }
  655. if (cpst != 1) {
  656. printk(KERN_ERR FW_BUG PFX "numpst must be 1\n");
  657. return -ENODEV;
  658. }
  659. data->plllock = psb->plllocktime;
  660. dprintk("plllocktime: 0x%x (units 1us)\n", psb->plllocktime);
  661. dprintk("maxfid: 0x%x\n", psb->maxfid);
  662. dprintk("maxvid: 0x%x\n", psb->maxvid);
  663. maxvid = psb->maxvid;
  664. data->numps = psb->numps;
  665. dprintk("numpstates: 0x%x\n", data->numps);
  666. return fill_powernow_table(data,
  667. (struct pst_s *)(psb+1), maxvid);
  668. }
  669. /*
  670. * If you see this message, complain to BIOS manufacturer. If
  671. * he tells you "we do not support Linux" or some similar
  672. * nonsense, remember that Windows 2000 uses the same legacy
  673. * mechanism that the old Linux PSB driver uses. Tell them it
  674. * is broken with Windows 2000.
  675. *
  676. * The reference to the AMD documentation is chapter 9 in the
  677. * BIOS and Kernel Developer's Guide, which is available on
  678. * www.amd.com
  679. */
  680. printk(KERN_ERR FW_BUG PFX "No PSB or ACPI _PSS objects\n");
  681. return -ENODEV;
  682. }
  683. static void powernow_k8_acpi_pst_values(struct powernow_k8_data *data,
  684. unsigned int index)
  685. {
  686. u64 control;
  687. if (!data->acpi_data.state_count || (cpu_family == CPU_HW_PSTATE))
  688. return;
  689. control = data->acpi_data.states[index].control;
  690. data->irt = (control >> IRT_SHIFT) & IRT_MASK;
  691. data->rvo = (control >> RVO_SHIFT) & RVO_MASK;
  692. data->exttype = (control >> EXT_TYPE_SHIFT) & EXT_TYPE_MASK;
  693. data->plllock = (control >> PLL_L_SHIFT) & PLL_L_MASK;
  694. data->vidmvs = 1 << ((control >> MVS_SHIFT) & MVS_MASK);
  695. data->vstable = (control >> VST_SHIFT) & VST_MASK;
  696. }
  697. static int powernow_k8_cpu_init_acpi(struct powernow_k8_data *data)
  698. {
  699. struct cpufreq_frequency_table *powernow_table;
  700. int ret_val = -ENODEV;
  701. u64 control, status;
  702. if (acpi_processor_register_performance(&data->acpi_data, data->cpu)) {
  703. dprintk("register performance failed: bad ACPI data\n");
  704. return -EIO;
  705. }
  706. /* verify the data contained in the ACPI structures */
  707. if (data->acpi_data.state_count <= 1) {
  708. dprintk("No ACPI P-States\n");
  709. goto err_out;
  710. }
  711. control = data->acpi_data.control_register.space_id;
  712. status = data->acpi_data.status_register.space_id;
  713. if ((control != ACPI_ADR_SPACE_FIXED_HARDWARE) ||
  714. (status != ACPI_ADR_SPACE_FIXED_HARDWARE)) {
  715. dprintk("Invalid control/status registers (%x - %x)\n",
  716. control, status);
  717. goto err_out;
  718. }
  719. /* fill in data->powernow_table */
  720. powernow_table = kmalloc((sizeof(struct cpufreq_frequency_table)
  721. * (data->acpi_data.state_count + 1)), GFP_KERNEL);
  722. if (!powernow_table) {
  723. dprintk("powernow_table memory alloc failure\n");
  724. goto err_out;
  725. }
  726. /* fill in data */
  727. data->numps = data->acpi_data.state_count;
  728. powernow_k8_acpi_pst_values(data, 0);
  729. if (cpu_family == CPU_HW_PSTATE)
  730. ret_val = fill_powernow_table_pstate(data, powernow_table);
  731. else
  732. ret_val = fill_powernow_table_fidvid(data, powernow_table);
  733. if (ret_val)
  734. goto err_out_mem;
  735. powernow_table[data->acpi_data.state_count].frequency =
  736. CPUFREQ_TABLE_END;
  737. powernow_table[data->acpi_data.state_count].index = 0;
  738. data->powernow_table = powernow_table;
  739. if (cpumask_first(cpu_core_mask(data->cpu)) == data->cpu)
  740. print_basics(data);
  741. /* notify BIOS that we exist */
  742. acpi_processor_notify_smm(THIS_MODULE);
  743. if (!zalloc_cpumask_var(&data->acpi_data.shared_cpu_map, GFP_KERNEL)) {
  744. printk(KERN_ERR PFX
  745. "unable to alloc powernow_k8_data cpumask\n");
  746. ret_val = -ENOMEM;
  747. goto err_out_mem;
  748. }
  749. return 0;
  750. err_out_mem:
  751. kfree(powernow_table);
  752. err_out:
  753. acpi_processor_unregister_performance(&data->acpi_data, data->cpu);
  754. /* data->acpi_data.state_count informs us at ->exit()
  755. * whether ACPI was used */
  756. data->acpi_data.state_count = 0;
  757. return ret_val;
  758. }
  759. static int fill_powernow_table_pstate(struct powernow_k8_data *data,
  760. struct cpufreq_frequency_table *powernow_table)
  761. {
  762. int i;
  763. u32 hi = 0, lo = 0;
  764. rdmsr(MSR_PSTATE_CUR_LIMIT, hi, lo);
  765. data->max_hw_pstate = (hi & HW_PSTATE_MAX_MASK) >> HW_PSTATE_MAX_SHIFT;
  766. for (i = 0; i < data->acpi_data.state_count; i++) {
  767. u32 index;
  768. index = data->acpi_data.states[i].control & HW_PSTATE_MASK;
  769. if (index > data->max_hw_pstate) {
  770. printk(KERN_ERR PFX "invalid pstate %d - "
  771. "bad value %d.\n", i, index);
  772. printk(KERN_ERR PFX "Please report to BIOS "
  773. "manufacturer\n");
  774. invalidate_entry(powernow_table, i);
  775. continue;
  776. }
  777. rdmsr(MSR_PSTATE_DEF_BASE + index, lo, hi);
  778. if (!(hi & HW_PSTATE_VALID_MASK)) {
  779. dprintk("invalid pstate %d, ignoring\n", index);
  780. invalidate_entry(powernow_table, i);
  781. continue;
  782. }
  783. powernow_table[i].index = index;
  784. /* Frequency may be rounded for these */
  785. if ((boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model < 10)
  786. || boot_cpu_data.x86 == 0x11) {
  787. powernow_table[i].frequency =
  788. freq_from_fid_did(lo & 0x3f, (lo >> 6) & 7);
  789. } else
  790. powernow_table[i].frequency =
  791. data->acpi_data.states[i].core_frequency * 1000;
  792. }
  793. return 0;
  794. }
  795. static int fill_powernow_table_fidvid(struct powernow_k8_data *data,
  796. struct cpufreq_frequency_table *powernow_table)
  797. {
  798. int i;
  799. for (i = 0; i < data->acpi_data.state_count; i++) {
  800. u32 fid;
  801. u32 vid;
  802. u32 freq, index;
  803. u64 status, control;
  804. if (data->exttype) {
  805. status = data->acpi_data.states[i].status;
  806. fid = status & EXT_FID_MASK;
  807. vid = (status >> VID_SHIFT) & EXT_VID_MASK;
  808. } else {
  809. control = data->acpi_data.states[i].control;
  810. fid = control & FID_MASK;
  811. vid = (control >> VID_SHIFT) & VID_MASK;
  812. }
  813. dprintk(" %d : fid 0x%x, vid 0x%x\n", i, fid, vid);
  814. index = fid | (vid<<8);
  815. powernow_table[i].index = index;
  816. freq = find_khz_freq_from_fid(fid);
  817. powernow_table[i].frequency = freq;
  818. /* verify frequency is OK */
  819. if ((freq > (MAX_FREQ * 1000)) || (freq < (MIN_FREQ * 1000))) {
  820. dprintk("invalid freq %u kHz, ignoring\n", freq);
  821. invalidate_entry(powernow_table, i);
  822. continue;
  823. }
  824. /* verify voltage is OK -
  825. * BIOSs are using "off" to indicate invalid */
  826. if (vid == VID_OFF) {
  827. dprintk("invalid vid %u, ignoring\n", vid);
  828. invalidate_entry(powernow_table, i);
  829. continue;
  830. }
  831. if (freq != (data->acpi_data.states[i].core_frequency * 1000)) {
  832. printk(KERN_INFO PFX "invalid freq entries "
  833. "%u kHz vs. %u kHz\n", freq,
  834. (unsigned int)
  835. (data->acpi_data.states[i].core_frequency
  836. * 1000));
  837. invalidate_entry(powernow_table, i);
  838. continue;
  839. }
  840. }
  841. return 0;
  842. }
  843. static void powernow_k8_cpu_exit_acpi(struct powernow_k8_data *data)
  844. {
  845. if (data->acpi_data.state_count)
  846. acpi_processor_unregister_performance(&data->acpi_data,
  847. data->cpu);
  848. free_cpumask_var(data->acpi_data.shared_cpu_map);
  849. }
  850. static int get_transition_latency(struct powernow_k8_data *data)
  851. {
  852. int max_latency = 0;
  853. int i;
  854. for (i = 0; i < data->acpi_data.state_count; i++) {
  855. int cur_latency = data->acpi_data.states[i].transition_latency
  856. + data->acpi_data.states[i].bus_master_latency;
  857. if (cur_latency > max_latency)
  858. max_latency = cur_latency;
  859. }
  860. if (max_latency == 0) {
  861. /*
  862. * Fam 11h and later may return 0 as transition latency. This
  863. * is intended and means "very fast". While cpufreq core and
  864. * governors currently can handle that gracefully, better set it
  865. * to 1 to avoid problems in the future.
  866. */
  867. if (boot_cpu_data.x86 < 0x11)
  868. printk(KERN_ERR FW_WARN PFX "Invalid zero transition "
  869. "latency\n");
  870. max_latency = 1;
  871. }
  872. /* value in usecs, needs to be in nanoseconds */
  873. return 1000 * max_latency;
  874. }
  875. /* Take a frequency, and issue the fid/vid transition command */
  876. static int transition_frequency_fidvid(struct powernow_k8_data *data,
  877. unsigned int index)
  878. {
  879. u32 fid = 0;
  880. u32 vid = 0;
  881. int res, i;
  882. struct cpufreq_freqs freqs;
  883. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  884. /* fid/vid correctness check for k8 */
  885. /* fid are the lower 8 bits of the index we stored into
  886. * the cpufreq frequency table in find_psb_table, vid
  887. * are the upper 8 bits.
  888. */
  889. fid = data->powernow_table[index].index & 0xFF;
  890. vid = (data->powernow_table[index].index & 0xFF00) >> 8;
  891. dprintk("table matched fid 0x%x, giving vid 0x%x\n", fid, vid);
  892. if (query_current_values_with_pending_wait(data))
  893. return 1;
  894. if ((data->currvid == vid) && (data->currfid == fid)) {
  895. dprintk("target matches current values (fid 0x%x, vid 0x%x)\n",
  896. fid, vid);
  897. return 0;
  898. }
  899. dprintk("cpu %d, changing to fid 0x%x, vid 0x%x\n",
  900. smp_processor_id(), fid, vid);
  901. freqs.old = find_khz_freq_from_fid(data->currfid);
  902. freqs.new = find_khz_freq_from_fid(fid);
  903. for_each_cpu(i, data->available_cores) {
  904. freqs.cpu = i;
  905. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  906. }
  907. res = transition_fid_vid(data, fid, vid);
  908. freqs.new = find_khz_freq_from_fid(data->currfid);
  909. for_each_cpu(i, data->available_cores) {
  910. freqs.cpu = i;
  911. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  912. }
  913. return res;
  914. }
  915. /* Take a frequency, and issue the hardware pstate transition command */
  916. static int transition_frequency_pstate(struct powernow_k8_data *data,
  917. unsigned int index)
  918. {
  919. u32 pstate = 0;
  920. int res, i;
  921. struct cpufreq_freqs freqs;
  922. dprintk("cpu %d transition to index %u\n", smp_processor_id(), index);
  923. /* get MSR index for hardware pstate transition */
  924. pstate = index & HW_PSTATE_MASK;
  925. if (pstate > data->max_hw_pstate)
  926. return 0;
  927. freqs.old = find_khz_freq_from_pstate(data->powernow_table,
  928. data->currpstate);
  929. freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
  930. for_each_cpu(i, data->available_cores) {
  931. freqs.cpu = i;
  932. cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE);
  933. }
  934. res = transition_pstate(data, pstate);
  935. freqs.new = find_khz_freq_from_pstate(data->powernow_table, pstate);
  936. for_each_cpu(i, data->available_cores) {
  937. freqs.cpu = i;
  938. cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE);
  939. }
  940. return res;
  941. }
  942. /* Driver entry point to switch to the target frequency */
  943. static int powernowk8_target(struct cpufreq_policy *pol,
  944. unsigned targfreq, unsigned relation)
  945. {
  946. cpumask_var_t oldmask;
  947. struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
  948. u32 checkfid;
  949. u32 checkvid;
  950. unsigned int newstate;
  951. int ret = -EIO;
  952. if (!data)
  953. return -EINVAL;
  954. checkfid = data->currfid;
  955. checkvid = data->currvid;
  956. /* only run on specific CPU from here on. */
  957. /* This is poor form: use a workqueue or smp_call_function_single */
  958. if (!alloc_cpumask_var(&oldmask, GFP_KERNEL))
  959. return -ENOMEM;
  960. cpumask_copy(oldmask, tsk_cpus_allowed(current));
  961. set_cpus_allowed_ptr(current, cpumask_of(pol->cpu));
  962. if (smp_processor_id() != pol->cpu) {
  963. printk(KERN_ERR PFX "limiting to cpu %u failed\n", pol->cpu);
  964. goto err_out;
  965. }
  966. if (pending_bit_stuck()) {
  967. printk(KERN_ERR PFX "failing targ, change pending bit set\n");
  968. goto err_out;
  969. }
  970. dprintk("targ: cpu %d, %d kHz, min %d, max %d, relation %d\n",
  971. pol->cpu, targfreq, pol->min, pol->max, relation);
  972. if (query_current_values_with_pending_wait(data))
  973. goto err_out;
  974. if (cpu_family != CPU_HW_PSTATE) {
  975. dprintk("targ: curr fid 0x%x, vid 0x%x\n",
  976. data->currfid, data->currvid);
  977. if ((checkvid != data->currvid) ||
  978. (checkfid != data->currfid)) {
  979. printk(KERN_INFO PFX
  980. "error - out of sync, fix 0x%x 0x%x, "
  981. "vid 0x%x 0x%x\n",
  982. checkfid, data->currfid,
  983. checkvid, data->currvid);
  984. }
  985. }
  986. if (cpufreq_frequency_table_target(pol, data->powernow_table,
  987. targfreq, relation, &newstate))
  988. goto err_out;
  989. mutex_lock(&fidvid_mutex);
  990. powernow_k8_acpi_pst_values(data, newstate);
  991. if (cpu_family == CPU_HW_PSTATE)
  992. ret = transition_frequency_pstate(data, newstate);
  993. else
  994. ret = transition_frequency_fidvid(data, newstate);
  995. if (ret) {
  996. printk(KERN_ERR PFX "transition frequency failed\n");
  997. ret = 1;
  998. mutex_unlock(&fidvid_mutex);
  999. goto err_out;
  1000. }
  1001. mutex_unlock(&fidvid_mutex);
  1002. if (cpu_family == CPU_HW_PSTATE)
  1003. pol->cur = find_khz_freq_from_pstate(data->powernow_table,
  1004. newstate);
  1005. else
  1006. pol->cur = find_khz_freq_from_fid(data->currfid);
  1007. ret = 0;
  1008. err_out:
  1009. set_cpus_allowed_ptr(current, oldmask);
  1010. free_cpumask_var(oldmask);
  1011. return ret;
  1012. }
  1013. /* Driver entry point to verify the policy and range of frequencies */
  1014. static int powernowk8_verify(struct cpufreq_policy *pol)
  1015. {
  1016. struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
  1017. if (!data)
  1018. return -EINVAL;
  1019. return cpufreq_frequency_table_verify(pol, data->powernow_table);
  1020. }
  1021. struct init_on_cpu {
  1022. struct powernow_k8_data *data;
  1023. int rc;
  1024. };
  1025. static void __cpuinit powernowk8_cpu_init_on_cpu(void *_init_on_cpu)
  1026. {
  1027. struct init_on_cpu *init_on_cpu = _init_on_cpu;
  1028. if (pending_bit_stuck()) {
  1029. printk(KERN_ERR PFX "failing init, change pending bit set\n");
  1030. init_on_cpu->rc = -ENODEV;
  1031. return;
  1032. }
  1033. if (query_current_values_with_pending_wait(init_on_cpu->data)) {
  1034. init_on_cpu->rc = -ENODEV;
  1035. return;
  1036. }
  1037. if (cpu_family == CPU_OPTERON)
  1038. fidvid_msr_init();
  1039. init_on_cpu->rc = 0;
  1040. }
  1041. /* per CPU init entry point to the driver */
  1042. static int __cpuinit powernowk8_cpu_init(struct cpufreq_policy *pol)
  1043. {
  1044. static const char ACPI_PSS_BIOS_BUG_MSG[] =
  1045. KERN_ERR FW_BUG PFX "No compatible ACPI _PSS objects found.\n"
  1046. FW_BUG PFX "Try again with latest BIOS.\n";
  1047. struct powernow_k8_data *data;
  1048. struct init_on_cpu init_on_cpu;
  1049. int rc;
  1050. struct cpuinfo_x86 *c = &cpu_data(pol->cpu);
  1051. if (!cpu_online(pol->cpu))
  1052. return -ENODEV;
  1053. smp_call_function_single(pol->cpu, check_supported_cpu, &rc, 1);
  1054. if (rc)
  1055. return -ENODEV;
  1056. data = kzalloc(sizeof(struct powernow_k8_data), GFP_KERNEL);
  1057. if (!data) {
  1058. printk(KERN_ERR PFX "unable to alloc powernow_k8_data");
  1059. return -ENOMEM;
  1060. }
  1061. data->cpu = pol->cpu;
  1062. data->currpstate = HW_PSTATE_INVALID;
  1063. if (powernow_k8_cpu_init_acpi(data)) {
  1064. /*
  1065. * Use the PSB BIOS structure. This is only availabe on
  1066. * an UP version, and is deprecated by AMD.
  1067. */
  1068. if (num_online_cpus() != 1) {
  1069. printk_once(ACPI_PSS_BIOS_BUG_MSG);
  1070. goto err_out;
  1071. }
  1072. if (pol->cpu != 0) {
  1073. printk(KERN_ERR FW_BUG PFX "No ACPI _PSS objects for "
  1074. "CPU other than CPU0. Complain to your BIOS "
  1075. "vendor.\n");
  1076. goto err_out;
  1077. }
  1078. rc = find_psb_table(data);
  1079. if (rc)
  1080. goto err_out;
  1081. /* Take a crude guess here.
  1082. * That guess was in microseconds, so multiply with 1000 */
  1083. pol->cpuinfo.transition_latency = (
  1084. ((data->rvo + 8) * data->vstable * VST_UNITS_20US) +
  1085. ((1 << data->irt) * 30)) * 1000;
  1086. } else /* ACPI _PSS objects available */
  1087. pol->cpuinfo.transition_latency = get_transition_latency(data);
  1088. /* only run on specific CPU from here on */
  1089. init_on_cpu.data = data;
  1090. smp_call_function_single(data->cpu, powernowk8_cpu_init_on_cpu,
  1091. &init_on_cpu, 1);
  1092. rc = init_on_cpu.rc;
  1093. if (rc != 0)
  1094. goto err_out_exit_acpi;
  1095. if (cpu_family == CPU_HW_PSTATE)
  1096. cpumask_copy(pol->cpus, cpumask_of(pol->cpu));
  1097. else
  1098. cpumask_copy(pol->cpus, cpu_core_mask(pol->cpu));
  1099. data->available_cores = pol->cpus;
  1100. if (cpu_family == CPU_HW_PSTATE)
  1101. pol->cur = find_khz_freq_from_pstate(data->powernow_table,
  1102. data->currpstate);
  1103. else
  1104. pol->cur = find_khz_freq_from_fid(data->currfid);
  1105. dprintk("policy current frequency %d kHz\n", pol->cur);
  1106. /* min/max the cpu is capable of */
  1107. if (cpufreq_frequency_table_cpuinfo(pol, data->powernow_table)) {
  1108. printk(KERN_ERR FW_BUG PFX "invalid powernow_table\n");
  1109. powernow_k8_cpu_exit_acpi(data);
  1110. kfree(data->powernow_table);
  1111. kfree(data);
  1112. return -EINVAL;
  1113. }
  1114. /* Check for APERF/MPERF support in hardware */
  1115. if (cpu_has(c, X86_FEATURE_APERFMPERF))
  1116. cpufreq_amd64_driver.getavg = cpufreq_get_measured_perf;
  1117. cpufreq_frequency_table_get_attr(data->powernow_table, pol->cpu);
  1118. if (cpu_family == CPU_HW_PSTATE)
  1119. dprintk("cpu_init done, current pstate 0x%x\n",
  1120. data->currpstate);
  1121. else
  1122. dprintk("cpu_init done, current fid 0x%x, vid 0x%x\n",
  1123. data->currfid, data->currvid);
  1124. per_cpu(powernow_data, pol->cpu) = data;
  1125. return 0;
  1126. err_out_exit_acpi:
  1127. powernow_k8_cpu_exit_acpi(data);
  1128. err_out:
  1129. kfree(data);
  1130. return -ENODEV;
  1131. }
  1132. static int __devexit powernowk8_cpu_exit(struct cpufreq_policy *pol)
  1133. {
  1134. struct powernow_k8_data *data = per_cpu(powernow_data, pol->cpu);
  1135. if (!data)
  1136. return -EINVAL;
  1137. powernow_k8_cpu_exit_acpi(data);
  1138. cpufreq_frequency_table_put_attr(pol->cpu);
  1139. kfree(data->powernow_table);
  1140. kfree(data);
  1141. per_cpu(powernow_data, pol->cpu) = NULL;
  1142. return 0;
  1143. }
  1144. static void query_values_on_cpu(void *_err)
  1145. {
  1146. int *err = _err;
  1147. struct powernow_k8_data *data = __get_cpu_var(powernow_data);
  1148. *err = query_current_values_with_pending_wait(data);
  1149. }
  1150. static unsigned int powernowk8_get(unsigned int cpu)
  1151. {
  1152. struct powernow_k8_data *data = per_cpu(powernow_data, cpu);
  1153. unsigned int khz = 0;
  1154. int err;
  1155. if (!data)
  1156. return 0;
  1157. smp_call_function_single(cpu, query_values_on_cpu, &err, true);
  1158. if (err)
  1159. goto out;
  1160. if (cpu_family == CPU_HW_PSTATE)
  1161. khz = find_khz_freq_from_pstate(data->powernow_table,
  1162. data->currpstate);
  1163. else
  1164. khz = find_khz_freq_from_fid(data->currfid);
  1165. out:
  1166. return khz;
  1167. }
  1168. static void _cpb_toggle_msrs(bool t)
  1169. {
  1170. int cpu;
  1171. get_online_cpus();
  1172. rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
  1173. for_each_cpu(cpu, cpu_online_mask) {
  1174. struct msr *reg = per_cpu_ptr(msrs, cpu);
  1175. if (t)
  1176. reg->l &= ~BIT(25);
  1177. else
  1178. reg->l |= BIT(25);
  1179. }
  1180. wrmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
  1181. put_online_cpus();
  1182. }
  1183. /*
  1184. * Switch on/off core performance boosting.
  1185. *
  1186. * 0=disable
  1187. * 1=enable.
  1188. */
  1189. static void cpb_toggle(bool t)
  1190. {
  1191. if (!cpb_capable)
  1192. return;
  1193. if (t && !cpb_enabled) {
  1194. cpb_enabled = true;
  1195. _cpb_toggle_msrs(t);
  1196. printk(KERN_INFO PFX "Core Boosting enabled.\n");
  1197. } else if (!t && cpb_enabled) {
  1198. cpb_enabled = false;
  1199. _cpb_toggle_msrs(t);
  1200. printk(KERN_INFO PFX "Core Boosting disabled.\n");
  1201. }
  1202. }
  1203. static ssize_t store_cpb(struct cpufreq_policy *policy, const char *buf,
  1204. size_t count)
  1205. {
  1206. int ret = -EINVAL;
  1207. unsigned long val = 0;
  1208. ret = strict_strtoul(buf, 10, &val);
  1209. if (!ret && (val == 0 || val == 1) && cpb_capable)
  1210. cpb_toggle(val);
  1211. else
  1212. return -EINVAL;
  1213. return count;
  1214. }
  1215. static ssize_t show_cpb(struct cpufreq_policy *policy, char *buf)
  1216. {
  1217. return sprintf(buf, "%u\n", cpb_enabled);
  1218. }
  1219. #define define_one_rw(_name) \
  1220. static struct freq_attr _name = \
  1221. __ATTR(_name, 0644, show_##_name, store_##_name)
  1222. define_one_rw(cpb);
  1223. static struct freq_attr *powernow_k8_attr[] = {
  1224. &cpufreq_freq_attr_scaling_available_freqs,
  1225. &cpb,
  1226. NULL,
  1227. };
  1228. static struct cpufreq_driver cpufreq_amd64_driver = {
  1229. .verify = powernowk8_verify,
  1230. .target = powernowk8_target,
  1231. .bios_limit = acpi_processor_get_bios_limit,
  1232. .init = powernowk8_cpu_init,
  1233. .exit = __devexit_p(powernowk8_cpu_exit),
  1234. .get = powernowk8_get,
  1235. .name = "powernow-k8",
  1236. .owner = THIS_MODULE,
  1237. .attr = powernow_k8_attr,
  1238. };
  1239. /*
  1240. * Clear the boost-disable flag on the CPU_DOWN path so that this cpu
  1241. * cannot block the remaining ones from boosting. On the CPU_UP path we
  1242. * simply keep the boost-disable flag in sync with the current global
  1243. * state.
  1244. */
  1245. static int cpb_notify(struct notifier_block *nb, unsigned long action,
  1246. void *hcpu)
  1247. {
  1248. unsigned cpu = (long)hcpu;
  1249. u32 lo, hi;
  1250. switch (action) {
  1251. case CPU_UP_PREPARE:
  1252. case CPU_UP_PREPARE_FROZEN:
  1253. if (!cpb_enabled) {
  1254. rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  1255. lo |= BIT(25);
  1256. wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
  1257. }
  1258. break;
  1259. case CPU_DOWN_PREPARE:
  1260. case CPU_DOWN_PREPARE_FROZEN:
  1261. rdmsr_on_cpu(cpu, MSR_K7_HWCR, &lo, &hi);
  1262. lo &= ~BIT(25);
  1263. wrmsr_on_cpu(cpu, MSR_K7_HWCR, lo, hi);
  1264. break;
  1265. default:
  1266. break;
  1267. }
  1268. return NOTIFY_OK;
  1269. }
  1270. static struct notifier_block cpb_nb = {
  1271. .notifier_call = cpb_notify,
  1272. };
  1273. /* driver entry point for init */
  1274. static int __cpuinit powernowk8_init(void)
  1275. {
  1276. unsigned int i, supported_cpus = 0, cpu;
  1277. for_each_online_cpu(i) {
  1278. int rc;
  1279. smp_call_function_single(i, check_supported_cpu, &rc, 1);
  1280. if (rc == 0)
  1281. supported_cpus++;
  1282. }
  1283. if (supported_cpus != num_online_cpus())
  1284. return -ENODEV;
  1285. printk(KERN_INFO PFX "Found %d %s (%d cpu cores) (" VERSION ")\n",
  1286. num_online_nodes(), boot_cpu_data.x86_model_id, supported_cpus);
  1287. if (boot_cpu_has(X86_FEATURE_CPB)) {
  1288. cpb_capable = true;
  1289. register_cpu_notifier(&cpb_nb);
  1290. msrs = msrs_alloc();
  1291. if (!msrs) {
  1292. printk(KERN_ERR "%s: Error allocating msrs!\n", __func__);
  1293. return -ENOMEM;
  1294. }
  1295. rdmsr_on_cpus(cpu_online_mask, MSR_K7_HWCR, msrs);
  1296. for_each_cpu(cpu, cpu_online_mask) {
  1297. struct msr *reg = per_cpu_ptr(msrs, cpu);
  1298. cpb_enabled |= !(!!(reg->l & BIT(25)));
  1299. }
  1300. printk(KERN_INFO PFX "Core Performance Boosting: %s.\n",
  1301. (cpb_enabled ? "on" : "off"));
  1302. }
  1303. return cpufreq_register_driver(&cpufreq_amd64_driver);
  1304. }
  1305. /* driver entry point for term */
  1306. static void __exit powernowk8_exit(void)
  1307. {
  1308. dprintk("exit\n");
  1309. if (boot_cpu_has(X86_FEATURE_CPB)) {
  1310. msrs_free(msrs);
  1311. msrs = NULL;
  1312. unregister_cpu_notifier(&cpb_nb);
  1313. }
  1314. cpufreq_unregister_driver(&cpufreq_amd64_driver);
  1315. }
  1316. MODULE_AUTHOR("Paul Devriendt <paul.devriendt@amd.com> and "
  1317. "Mark Langsdorf <mark.langsdorf@amd.com>");
  1318. MODULE_DESCRIPTION("AMD Athlon 64 and Opteron processor frequency driver.");
  1319. MODULE_LICENSE("GPL");
  1320. late_initcall(powernowk8_init);
  1321. module_exit(powernowk8_exit);