/arch/x86/include/asm/i8259.h

 1#ifndef _ASM_X86_I8259_H
 2#define _ASM_X86_I8259_H
 3
 4#include <linux/delay.h>
 5
 6extern unsigned int cached_irq_mask;
 7
 8#define __byte(x, y)		(((unsigned char *)&(y))[x])
 9#define cached_master_mask	(__byte(0, cached_irq_mask))
10#define cached_slave_mask	(__byte(1, cached_irq_mask))
11
12/* i8259A PIC registers */
13#define PIC_MASTER_CMD		0x20
14#define PIC_MASTER_IMR		0x21
15#define PIC_MASTER_ISR		PIC_MASTER_CMD
16#define PIC_MASTER_POLL		PIC_MASTER_ISR
17#define PIC_MASTER_OCW3		PIC_MASTER_ISR
18#define PIC_SLAVE_CMD		0xa0
19#define PIC_SLAVE_IMR		0xa1
20
21/* i8259A PIC related value */
22#define PIC_CASCADE_IR		2
23#define MASTER_ICW4_DEFAULT	0x01
24#define SLAVE_ICW4_DEFAULT	0x01
25#define PIC_ICW4_AEOI		2
26
27extern raw_spinlock_t i8259A_lock;
28
29/* the PIC may need a careful delay on some platforms, hence specific calls */
30static inline unsigned char inb_pic(unsigned int port)
31{
32	unsigned char value = inb(port);
33
34	/*
35	 * delay for some accesses to PIC on motherboard or in chipset
36	 * must be at least one microsecond, so be safe here:
37	 */
38	udelay(2);
39
40	return value;
41}
42
43static inline void outb_pic(unsigned char value, unsigned int port)
44{
45	outb(value, port);
46	/*
47	 * delay for some accesses to PIC on motherboard or in chipset
48	 * must be at least one microsecond, so be safe here:
49	 */
50	udelay(2);
51}
52
53extern struct irq_chip i8259A_chip;
54
55struct legacy_pic {
56	int nr_legacy_irqs;
57	struct irq_chip *chip;
58	void (*mask_all)(void);
59	void (*restore_mask)(void);
60	void (*init)(int auto_eoi);
61	int (*irq_pending)(unsigned int irq);
62	void (*make_irq)(unsigned int irq);
63};
64
65extern struct legacy_pic *legacy_pic;
66extern struct legacy_pic null_legacy_pic;
67
68#endif /* _ASM_X86_I8259_H */