/arch/powerpc/sysdev/fsl_soc.h
C Header | 39 lines | 31 code | 8 blank | 0 comment | 3 complexity | 83ae34d8130dd494d77959bcc7eaef14 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
1#ifndef __PPC_FSL_SOC_H
2#define __PPC_FSL_SOC_H
3#ifdef __KERNEL__
4
5#include <asm/mmu.h>
6
7struct spi_device;
8
9extern phys_addr_t get_immrbase(void);
10#if defined(CONFIG_CPM2) || defined(CONFIG_QUICC_ENGINE) || defined(CONFIG_8xx)
11extern u32 get_brgfreq(void);
12extern u32 get_baudrate(void);
13#else
14static inline u32 get_brgfreq(void) { return -1; }
15static inline u32 get_baudrate(void) { return -1; }
16#endif
17extern u32 fsl_get_sys_freq(void);
18
19struct spi_board_info;
20struct device_node;
21
22extern void fsl_rstcr_restart(char *cmd);
23
24#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
25struct platform_diu_data_ops {
26 unsigned int (*get_pixel_format) (unsigned int bits_per_pixel,
27 int monitor_port);
28 void (*set_gamma_table) (int monitor_port, char *gamma_table_base);
29 void (*set_monitor_port) (int monitor_port);
30 void (*set_pixel_clock) (unsigned int pixclock);
31 ssize_t (*show_monitor_port) (int monitor_port, char *buf);
32 int (*set_sysfs_monitor_port) (int val);
33};
34
35extern struct platform_diu_data_ops diu_ops;
36#endif
37
38#endif
39#endif