/arch/parisc/include/asm/pdc.h
C Header | 767 lines | 570 code | 117 blank | 80 comment | 0 complexity | 877f19dd74d5bc219c533d130c528515 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
1#ifndef _PARISC_PDC_H
2#define _PARISC_PDC_H
3
4/*
5 * PDC return values ...
6 * All PDC calls return a subset of these errors.
7 */
8
9#define PDC_WARN 3 /* Call completed with a warning */
10#define PDC_REQ_ERR_1 2 /* See above */
11#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
12#define PDC_OK 0 /* Call completed successfully */
13#define PDC_BAD_PROC -1 /* Called non-existent procedure*/
14#define PDC_BAD_OPTION -2 /* Called with non-existent option */
15#define PDC_ERROR -3 /* Call could not complete without an error */
16#define PDC_NE_MOD -5 /* Module not found */
17#define PDC_NE_CELL_MOD -7 /* Cell module not found */
18#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
19#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
20#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
21
22/*
23 * PDC entry points...
24 */
25
26#define PDC_POW_FAIL 1 /* perform a power-fail */
27#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
28
29#define PDC_CHASSIS 2 /* PDC-chassis functions */
30#define PDC_CHASSIS_DISP 0 /* update chassis display */
31#define PDC_CHASSIS_WARN 1 /* return chassis warnings */
32#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
33#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
34
35#define PDC_PIM 3 /* Get PIM data */
36#define PDC_PIM_HPMC 0 /* Transfer HPMC data */
37#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
38#define PDC_PIM_LPMC 2 /* Transfer HPMC data */
39#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
40#define PDC_PIM_TOC 4 /* Transfer TOC data */
41
42#define PDC_MODEL 4 /* PDC model information call */
43#define PDC_MODEL_INFO 0 /* returns information */
44#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
45#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
46#define PDC_MODEL_SYSMODEL 3 /* return system model info */
47#define PDC_MODEL_ENSPEC 4 /* enable specific option */
48#define PDC_MODEL_DISPEC 5 /* disable specific option */
49#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
50#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
51/* Values for PDC_MODEL_CAPABILITIES non-equivalent virtual aliasing support */
52#define PDC_MODEL_OS64 (1 << 0)
53#define PDC_MODEL_OS32 (1 << 1)
54#define PDC_MODEL_IOPDIR_FDC (1 << 2)
55#define PDC_MODEL_NVA_MASK (3 << 4)
56#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
57#define PDC_MODEL_NVA_SLOW (1 << 4)
58#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
59#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
60#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
61
62#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
63#define PA90_INSTRUCTION_SET 0x8
64
65#define PDC_CACHE 5 /* return/set cache (& TLB) info*/
66#define PDC_CACHE_INFO 0 /* returns information */
67#define PDC_CACHE_SET_COH 1 /* set coherence state */
68#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
69
70#define PDC_HPA 6 /* return HPA of processor */
71#define PDC_HPA_PROCESSOR 0
72#define PDC_HPA_MODULES 1
73
74#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
75#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
76
77#define PDC_IODC 8 /* talk to IODC */
78#define PDC_IODC_READ 0 /* read IODC entry point */
79/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
80#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
81/* 1, 2 obsolete - HVERSION dependent*/
82#define PDC_IODC_RI_INIT 3 /* Initialize module */
83#define PDC_IODC_RI_IO 4 /* Module input/output */
84#define PDC_IODC_RI_SPA 5 /* Module input/output */
85#define PDC_IODC_RI_CONFIG 6 /* Module input/output */
86/* 7 obsolete - HVERSION dependent */
87#define PDC_IODC_RI_TEST 8 /* Module input/output */
88#define PDC_IODC_RI_TLB 9 /* Module input/output */
89#define PDC_IODC_NINIT 2 /* non-destructive init */
90#define PDC_IODC_DINIT 3 /* destructive init */
91#define PDC_IODC_MEMERR 4 /* check for memory errors */
92#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
93#define PDC_IODC_BUS_ERROR -4 /* bus error return value */
94#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
95#define PDC_IODC_COUNT -6 /* count is too small */
96
97#define PDC_TOD 9 /* time-of-day clock (TOD) */
98#define PDC_TOD_READ 0 /* read TOD */
99#define PDC_TOD_WRITE 1 /* write TOD */
100
101
102#define PDC_STABLE 10 /* stable storage (sprockets) */
103#define PDC_STABLE_READ 0
104#define PDC_STABLE_WRITE 1
105#define PDC_STABLE_RETURN_SIZE 2
106#define PDC_STABLE_VERIFY_CONTENTS 3
107#define PDC_STABLE_INITIALIZE 4
108
109#define PDC_NVOLATILE 11 /* often not implemented */
110
111#define PDC_ADD_VALID 12 /* Memory validation PDC call */
112#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
113
114#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
115
116#define PDC_PROC 16 /* (sprockets) */
117
118#define PDC_CONFIG 16 /* (sprockets) */
119#define PDC_CONFIG_DECONFIG 0
120#define PDC_CONFIG_DRECONFIG 1
121#define PDC_CONFIG_DRETURN_CONFIG 2
122
123#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
124#define PDC_BTLB_INFO 0 /* returns parameter */
125#define PDC_BTLB_INSERT 1 /* insert BTLB entry */
126#define PDC_BTLB_PURGE 2 /* purge BTLB entries */
127#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
128
129#define PDC_TLB 19 /* manage hardware TLB miss handling */
130#define PDC_TLB_INFO 0 /* returns parameter */
131#define PDC_TLB_SETUP 1 /* set up miss handling */
132
133#define PDC_MEM 20 /* Manage memory */
134#define PDC_MEM_MEMINFO 0
135#define PDC_MEM_ADD_PAGE 1
136#define PDC_MEM_CLEAR_PDT 2
137#define PDC_MEM_READ_PDT 3
138#define PDC_MEM_RESET_CLEAR 4
139#define PDC_MEM_GOODMEM 5
140#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
141#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
142#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
143#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
144#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
145
146#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
147#define PDC_MEM_RET_DUPLICATE_ENTRY 4
148#define PDC_MEM_RET_BUF_SIZE_SMALL 1
149#define PDC_MEM_RET_PDT_FULL -11
150#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
151
152#define PDC_PSW 21 /* Get/Set default System Mask */
153#define PDC_PSW_MASK 0 /* Return mask */
154#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
155#define PDC_PSW_SET_DEFAULTS 2 /* Set default */
156#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
157#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
158
159#define PDC_SYSTEM_MAP 22 /* find system modules */
160#define PDC_FIND_MODULE 0
161#define PDC_FIND_ADDRESS 1
162#define PDC_TRANSLATE_PATH 2
163
164#define PDC_SOFT_POWER 23 /* soft power switch */
165#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
166#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
167
168
169/* HVERSION dependent */
170
171/* The PDC_MEM_MAP calls */
172#define PDC_MEM_MAP 128 /* on s700: return page info */
173#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
174
175#define PDC_EEPROM 129 /* EEPROM access */
176#define PDC_EEPROM_READ_WORD 0
177#define PDC_EEPROM_WRITE_WORD 1
178#define PDC_EEPROM_READ_BYTE 2
179#define PDC_EEPROM_WRITE_BYTE 3
180#define PDC_EEPROM_EEPROM_PASSWORD -1000
181
182#define PDC_NVM 130 /* NVM (non-volatile memory) access */
183#define PDC_NVM_READ_WORD 0
184#define PDC_NVM_WRITE_WORD 1
185#define PDC_NVM_READ_BYTE 2
186#define PDC_NVM_WRITE_BYTE 3
187
188#define PDC_SEED_ERROR 132 /* (sprockets) */
189
190#define PDC_IO 135 /* log error info, reset IO system */
191#define PDC_IO_READ_AND_CLEAR_ERRORS 0
192#define PDC_IO_RESET 1
193#define PDC_IO_RESET_DEVICES 2
194/* sets bits 6&7 (little endian) of the HcControl Register */
195#define PDC_IO_USB_SUSPEND 0xC000000000000000
196#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
197#define PDC_IO_NO_SUSPEND -6 /* return value */
198
199#define PDC_BROADCAST_RESET 136 /* reset all processors */
200#define PDC_DO_RESET 0 /* option: perform a broadcast reset */
201#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
202#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
203#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
204
205#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
206#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
207
208#define PDC_LAN_STATION_ID_SIZE 6
209
210#define PDC_CHECK_RANGES 139 /* (sprockets) */
211
212#define PDC_NV_SECTIONS 141 /* (sprockets) */
213
214#define PDC_PERFORMANCE 142 /* performance monitoring */
215
216#define PDC_SYSTEM_INFO 143 /* system information */
217#define PDC_SYSINFO_RETURN_INFO_SIZE 0
218#define PDC_SYSINFO_RRETURN_SYS_INFO 1
219#define PDC_SYSINFO_RRETURN_ERRORS 2
220#define PDC_SYSINFO_RRETURN_WARNINGS 3
221#define PDC_SYSINFO_RETURN_REVISIONS 4
222#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
223#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
224
225#define PDC_RDR 144 /* (sprockets) */
226#define PDC_RDR_READ_BUFFER 0
227#define PDC_RDR_READ_SINGLE 1
228#define PDC_RDR_WRITE_SINGLE 2
229
230#define PDC_INTRIGUE 145 /* (sprockets) */
231#define PDC_INTRIGUE_WRITE_BUFFER 0
232#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
233#define PDC_INTRIGUE_START_CPU_COUNTERS 2
234#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
235
236#define PDC_STI 146 /* STI access */
237/* same as PDC_PCI_XXX values (see below) */
238
239/* Legacy PDC definitions for same stuff */
240#define PDC_PCI_INDEX 147
241#define PDC_PCI_INTERFACE_INFO 0
242#define PDC_PCI_SLOT_INFO 1
243#define PDC_PCI_INFLIGHT_BYTES 2
244#define PDC_PCI_READ_CONFIG 3
245#define PDC_PCI_WRITE_CONFIG 4
246#define PDC_PCI_READ_PCI_IO 5
247#define PDC_PCI_WRITE_PCI_IO 6
248#define PDC_PCI_READ_CONFIG_DELAY 7
249#define PDC_PCI_UPDATE_CONFIG_DELAY 8
250#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
251#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
252#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
253#define PDC_PCI_PCI_RESERVED 12
254#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
255#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
256#define PDC_PCI_PCI_INT_ROUTE 14
257#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
258#define PDC_PCI_READ_MON_TYPE 15
259#define PDC_PCI_WRITE_MON_TYPE 16
260
261
262/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
263#define PDC_INITIATOR 163
264#define PDC_GET_INITIATOR 0
265#define PDC_SET_INITIATOR 1
266#define PDC_DELETE_INITIATOR 2
267#define PDC_RETURN_TABLE_SIZE 3
268#define PDC_RETURN_TABLE 4
269
270#define PDC_LINK 165 /* (sprockets) */
271#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
272#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
273
274/* cl_class
275 * page 3-33 of IO-Firmware ARS
276 * IODC ENTRY_INIT(Search first) RET[1]
277 */
278#define CL_NULL 0 /* invalid */
279#define CL_RANDOM 1 /* random access (as disk) */
280#define CL_SEQU 2 /* sequential access (as tape) */
281#define CL_DUPLEX 7 /* full-duplex point-to-point (RS-232, Net) */
282#define CL_KEYBD 8 /* half-duplex console (HIL Keyboard) */
283#define CL_DISPL 9 /* half-duplex console (display) */
284#define CL_FC 10 /* FiberChannel access media */
285
286/* IODC ENTRY_INIT() */
287#define ENTRY_INIT_SRCH_FRST 2
288#define ENTRY_INIT_SRCH_NEXT 3
289#define ENTRY_INIT_MOD_DEV 4
290#define ENTRY_INIT_DEV 5
291#define ENTRY_INIT_MOD 6
292#define ENTRY_INIT_MSG 9
293
294/* IODC ENTRY_IO() */
295#define ENTRY_IO_BOOTIN 0
296#define ENTRY_IO_BOOTOUT 1
297#define ENTRY_IO_CIN 2
298#define ENTRY_IO_COUT 3
299#define ENTRY_IO_CLOSE 4
300#define ENTRY_IO_GETMSG 9
301#define ENTRY_IO_BBLOCK_IN 16
302#define ENTRY_IO_BBLOCK_OUT 17
303
304/* IODC ENTRY_SPA() */
305
306/* IODC ENTRY_CONFIG() */
307
308/* IODC ENTRY_TEST() */
309
310/* IODC ENTRY_TLB() */
311
312/* constants for OS (NVM...) */
313#define OS_ID_NONE 0 /* Undefined OS ID */
314#define OS_ID_HPUX 1 /* HP-UX OS */
315#define OS_ID_MPEXL 2 /* MPE XL OS */
316#define OS_ID_OSF 3 /* OSF OS */
317#define OS_ID_HPRT 4 /* HP-RT OS */
318#define OS_ID_NOVEL 5 /* NOVELL OS */
319#define OS_ID_LINUX 6 /* Linux */
320
321
322/* constants for PDC_CHASSIS */
323#define OSTAT_OFF 0
324#define OSTAT_FLT 1
325#define OSTAT_TEST 2
326#define OSTAT_INIT 3
327#define OSTAT_SHUT 4
328#define OSTAT_WARN 5
329#define OSTAT_RUN 6
330#define OSTAT_ON 7
331
332/* Page Zero constant offsets used by the HPMC handler */
333#define BOOT_CONSOLE_HPA_OFFSET 0x3c0
334#define BOOT_CONSOLE_SPA_OFFSET 0x3c4
335#define BOOT_CONSOLE_PATH_OFFSET 0x3a8
336
337/* size of the pdc_result buffer for firmware.c */
338#define NUM_PDC_RESULT 32
339
340#if !defined(__ASSEMBLY__)
341
342#include <linux/types.h>
343
344#ifdef __KERNEL__
345
346#include <asm/page.h> /* for __PAGE_OFFSET */
347
348extern int pdc_type;
349
350/* Values for pdc_type */
351#define PDC_TYPE_ILLEGAL -1
352#define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
353#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
354#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
355
356struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
357 unsigned long actcnt; /* actual number of bytes returned */
358 unsigned long maxcnt; /* maximum number of bytes that could be returned */
359};
360
361struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
362 unsigned long ccr_functional;
363 unsigned long ccr_present;
364 unsigned long revision;
365 unsigned long model;
366};
367
368struct pdc_model { /* for PDC_MODEL */
369 unsigned long hversion;
370 unsigned long sversion;
371 unsigned long hw_id;
372 unsigned long boot_id;
373 unsigned long sw_id;
374 unsigned long sw_cap;
375 unsigned long arch_rev;
376 unsigned long pot_key;
377 unsigned long curr_key;
378};
379
380struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
381 unsigned long
382#ifdef CONFIG_64BIT
383 cc_padW:32,
384#endif
385 cc_alias: 4, /* alias boundaries for virtual addresses */
386 cc_block: 4, /* to determine most efficient stride */
387 cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
388 cc_shift: 2, /* how much to shift cc_block left */
389 cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
390 cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
391 cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
392 cc_pad1 : 10, /* reserved */
393 cc_hv : 3; /* hversion dependent */
394};
395
396struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
397 unsigned long tc_pad0:12, /* reserved */
398#ifdef CONFIG_64BIT
399 tc_padW:32,
400#endif
401 tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
402 tc_hv : 1, /* HV */
403 tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
404 tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
405 tc_aid : 5, /* ITLB: width of access ids of processor (encoded!) */
406 tc_pad1 : 8; /* ITLB: width of space-registers (encoded) */
407};
408
409struct pdc_cache_info { /* main-PDC_CACHE-structure (caches & TLB's) */
410 /* I-cache */
411 unsigned long ic_size; /* size in bytes */
412 struct pdc_cache_cf ic_conf; /* configuration */
413 unsigned long ic_base; /* base-addr */
414 unsigned long ic_stride;
415 unsigned long ic_count;
416 unsigned long ic_loop;
417 /* D-cache */
418 unsigned long dc_size; /* size in bytes */
419 struct pdc_cache_cf dc_conf; /* configuration */
420 unsigned long dc_base; /* base-addr */
421 unsigned long dc_stride;
422 unsigned long dc_count;
423 unsigned long dc_loop;
424 /* Instruction-TLB */
425 unsigned long it_size; /* number of entries in I-TLB */
426 struct pdc_tlb_cf it_conf; /* I-TLB-configuration */
427 unsigned long it_sp_base;
428 unsigned long it_sp_stride;
429 unsigned long it_sp_count;
430 unsigned long it_off_base;
431 unsigned long it_off_stride;
432 unsigned long it_off_count;
433 unsigned long it_loop;
434 /* data-TLB */
435 unsigned long dt_size; /* number of entries in D-TLB */
436 struct pdc_tlb_cf dt_conf; /* D-TLB-configuration */
437 unsigned long dt_sp_base;
438 unsigned long dt_sp_stride;
439 unsigned long dt_sp_count;
440 unsigned long dt_off_base;
441 unsigned long dt_off_stride;
442 unsigned long dt_off_count;
443 unsigned long dt_loop;
444};
445
446#if 0
447/* If you start using the next struct, you'll have to adjust it to
448 * work with 64-bit firmware I think -PB
449 */
450struct pdc_iodc { /* PDC_IODC */
451 unsigned char hversion_model;
452 unsigned char hversion;
453 unsigned char spa;
454 unsigned char type;
455 unsigned int sversion_rev:4;
456 unsigned int sversion_model:19;
457 unsigned int sversion_opt:8;
458 unsigned char rev;
459 unsigned char dep;
460 unsigned char features;
461 unsigned char pad1;
462 unsigned int checksum:16;
463 unsigned int length:16;
464 unsigned int pad[15];
465} __attribute__((aligned(8))) ;
466#endif
467
468#ifndef CONFIG_PA20
469/* no BLTBs in pa2.0 processors */
470struct pdc_btlb_info_range {
471 __u8 res00;
472 __u8 num_i;
473 __u8 num_d;
474 __u8 num_comb;
475};
476
477struct pdc_btlb_info { /* PDC_BLOCK_TLB, return of PDC_BTLB_INFO */
478 unsigned int min_size; /* minimum size of BTLB in pages */
479 unsigned int max_size; /* maximum size of BTLB in pages */
480 struct pdc_btlb_info_range fixed_range_info;
481 struct pdc_btlb_info_range variable_range_info;
482};
483
484#endif /* !CONFIG_PA20 */
485
486#ifdef CONFIG_64BIT
487struct pdc_memory_table_raddr { /* PDC_MEM/PDC_MEM_TABLE (return info) */
488 unsigned long entries_returned;
489 unsigned long entries_total;
490};
491
492struct pdc_memory_table { /* PDC_MEM/PDC_MEM_TABLE (arguments) */
493 unsigned long paddr;
494 unsigned int pages;
495 unsigned int reserved;
496};
497#endif /* CONFIG_64BIT */
498
499struct pdc_system_map_mod_info { /* PDC_SYSTEM_MAP/FIND_MODULE */
500 unsigned long mod_addr;
501 unsigned long mod_pgs;
502 unsigned long add_addrs;
503};
504
505struct pdc_system_map_addr_info { /* PDC_SYSTEM_MAP/FIND_ADDRESS */
506 unsigned long mod_addr;
507 unsigned long mod_pgs;
508};
509
510struct pdc_initiator { /* PDC_INITIATOR */
511 int host_id;
512 int factor;
513 int width;
514 int mode;
515};
516
517struct hardware_path {
518 char flags; /* see bit definitions below */
519 char bc[6]; /* Bus Converter routing info to a specific */
520 /* I/O adaptor (< 0 means none, > 63 resvd) */
521 char mod; /* fixed field of specified module */
522};
523
524/*
525 * Device path specifications used by PDC.
526 */
527struct pdc_module_path {
528 struct hardware_path path;
529 unsigned int layers[6]; /* device-specific info (ctlr #, unit # ...) */
530};
531
532#ifndef CONFIG_PA20
533/* Only used on some pre-PA2.0 boxes */
534struct pdc_memory_map { /* PDC_MEMORY_MAP */
535 unsigned long hpa; /* mod's register set address */
536 unsigned long more_pgs; /* number of additional I/O pgs */
537};
538#endif
539
540struct pdc_tod {
541 unsigned long tod_sec;
542 unsigned long tod_usec;
543};
544
545/* architected results from PDC_PIM/transfer hpmc on a PA1.1 machine */
546
547struct pdc_hpmc_pim_11 { /* PDC_PIM */
548 __u32 gr[32];
549 __u32 cr[32];
550 __u32 sr[8];
551 __u32 iasq_back;
552 __u32 iaoq_back;
553 __u32 check_type;
554 __u32 cpu_state;
555 __u32 rsvd1;
556 __u32 cache_check;
557 __u32 tlb_check;
558 __u32 bus_check;
559 __u32 assists_check;
560 __u32 rsvd2;
561 __u32 assist_state;
562 __u32 responder_addr;
563 __u32 requestor_addr;
564 __u32 path_info;
565 __u64 fr[32];
566};
567
568/*
569 * architected results from PDC_PIM/transfer hpmc on a PA2.0 machine
570 *
571 * Note that PDC_PIM doesn't care whether or not wide mode was enabled
572 * so the results are different on PA1.1 vs. PA2.0 when in narrow mode.
573 *
574 * Note also that there are unarchitected results available, which
575 * are hversion dependent. Do a "ser pim 0 hpmc" after rebooting, since
576 * the firmware is probably the best way of printing hversion dependent
577 * data.
578 */
579
580struct pdc_hpmc_pim_20 { /* PDC_PIM */
581 __u64 gr[32];
582 __u64 cr[32];
583 __u64 sr[8];
584 __u64 iasq_back;
585 __u64 iaoq_back;
586 __u32 check_type;
587 __u32 cpu_state;
588 __u32 cache_check;
589 __u32 tlb_check;
590 __u32 bus_check;
591 __u32 assists_check;
592 __u32 assist_state;
593 __u32 path_info;
594 __u64 responder_addr;
595 __u64 requestor_addr;
596 __u64 fr[32];
597};
598
599void pdc_console_init(void); /* in pdc_console.c */
600void pdc_console_restart(void);
601
602void setup_pdc(void); /* in inventory.c */
603
604/* wrapper-functions from pdc.c */
605
606int pdc_add_valid(unsigned long address);
607int pdc_chassis_info(struct pdc_chassis_info *chassis_info, void *led_info, unsigned long len);
608int pdc_chassis_disp(unsigned long disp);
609int pdc_chassis_warn(unsigned long *warn);
610int pdc_coproc_cfg(struct pdc_coproc_cfg *pdc_coproc_info);
611int pdc_coproc_cfg_unlocked(struct pdc_coproc_cfg *pdc_coproc_info);
612int pdc_iodc_read(unsigned long *actcnt, unsigned long hpa, unsigned int index,
613 void *iodc_data, unsigned int iodc_data_size);
614int pdc_system_map_find_mods(struct pdc_system_map_mod_info *pdc_mod_info,
615 struct pdc_module_path *mod_path, long mod_index);
616int pdc_system_map_find_addrs(struct pdc_system_map_addr_info *pdc_addr_info,
617 long mod_index, long addr_index);
618int pdc_model_info(struct pdc_model *model);
619int pdc_model_sysmodel(char *name);
620int pdc_model_cpuid(unsigned long *cpu_id);
621int pdc_model_versions(unsigned long *versions, int id);
622int pdc_model_capabilities(unsigned long *capabilities);
623int pdc_cache_info(struct pdc_cache_info *cache);
624int pdc_spaceid_bits(unsigned long *space_bits);
625#ifndef CONFIG_PA20
626int pdc_btlb_info(struct pdc_btlb_info *btlb);
627int pdc_mem_map_hpa(struct pdc_memory_map *r_addr, struct pdc_module_path *mod_path);
628#endif /* !CONFIG_PA20 */
629int pdc_lan_station_id(char *lan_addr, unsigned long net_hpa);
630
631int pdc_stable_read(unsigned long staddr, void *memaddr, unsigned long count);
632int pdc_stable_write(unsigned long staddr, void *memaddr, unsigned long count);
633int pdc_stable_get_size(unsigned long *size);
634int pdc_stable_verify_contents(void);
635int pdc_stable_initialize(void);
636
637int pdc_pci_irt_size(unsigned long *num_entries, unsigned long hpa);
638int pdc_pci_irt(unsigned long num_entries, unsigned long hpa, void *tbl);
639
640int pdc_get_initiator(struct hardware_path *, struct pdc_initiator *);
641int pdc_tod_read(struct pdc_tod *tod);
642int pdc_tod_set(unsigned long sec, unsigned long usec);
643
644#ifdef CONFIG_64BIT
645int pdc_mem_mem_table(struct pdc_memory_table_raddr *r_addr,
646 struct pdc_memory_table *tbl, unsigned long entries);
647#endif
648
649void set_firmware_width(void);
650void set_firmware_width_unlocked(void);
651int pdc_do_firm_test_reset(unsigned long ftc_bitmap);
652int pdc_do_reset(void);
653int pdc_soft_power_info(unsigned long *power_reg);
654int pdc_soft_power_button(int sw_control);
655void pdc_io_reset(void);
656void pdc_io_reset_devices(void);
657int pdc_iodc_getc(void);
658int pdc_iodc_print(const unsigned char *str, unsigned count);
659
660void pdc_emergency_unlock(void);
661int pdc_sti_call(unsigned long func, unsigned long flags,
662 unsigned long inptr, unsigned long outputr,
663 unsigned long glob_cfg);
664
665static inline char * os_id_to_string(u16 os_id) {
666 switch(os_id) {
667 case OS_ID_NONE: return "No OS";
668 case OS_ID_HPUX: return "HP-UX";
669 case OS_ID_MPEXL: return "MPE-iX";
670 case OS_ID_OSF: return "OSF";
671 case OS_ID_HPRT: return "HP-RT";
672 case OS_ID_NOVEL: return "Novell Netware";
673 case OS_ID_LINUX: return "Linux";
674 default: return "Unknown";
675 }
676}
677
678#endif /* __KERNEL__ */
679
680#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
681
682/* DEFINITION OF THE ZERO-PAGE (PAG0) */
683/* based on work by Jason Eckhardt (jason@equator.com) */
684
685/* flags of the device_path */
686#define PF_AUTOBOOT 0x80
687#define PF_AUTOSEARCH 0x40
688#define PF_TIMER 0x0F
689
690struct device_path { /* page 1-69 */
691 unsigned char flags; /* flags see above! */
692 unsigned char bc[6]; /* bus converter routing info */
693 unsigned char mod;
694 unsigned int layers[6];/* device-specific layer-info */
695} __attribute__((aligned(8))) ;
696
697struct pz_device {
698 struct device_path dp; /* see above */
699 /* struct iomod *hpa; */
700 unsigned int hpa; /* HPA base address */
701 /* char *spa; */
702 unsigned int spa; /* SPA base address */
703 /* int (*iodc_io)(struct iomod*, ...); */
704 unsigned int iodc_io; /* device entry point */
705 short pad; /* reserved */
706 unsigned short cl_class;/* see below */
707} __attribute__((aligned(8))) ;
708
709struct zeropage {
710 /* [0x000] initialize vectors (VEC) */
711 unsigned int vec_special; /* must be zero */
712 /* int (*vec_pow_fail)(void);*/
713 unsigned int vec_pow_fail; /* power failure handler */
714 /* int (*vec_toc)(void); */
715 unsigned int vec_toc;
716 unsigned int vec_toclen;
717 /* int (*vec_rendz)(void); */
718 unsigned int vec_rendz;
719 int vec_pow_fail_flen;
720 int vec_pad[10];
721
722 /* [0x040] reserved processor dependent */
723 int pad0[112];
724
725 /* [0x200] reserved */
726 int pad1[84];
727
728 /* [0x350] memory configuration (MC) */
729 int memc_cont; /* contiguous mem size (bytes) */
730 int memc_phsize; /* physical memory size */
731 int memc_adsize; /* additional mem size, bytes of SPA space used by PDC */
732 unsigned int mem_pdc_hi; /* used for 64-bit */
733
734 /* [0x360] various parameters for the boot-CPU */
735 /* unsigned int *mem_booterr[8]; */
736 unsigned int mem_booterr[8]; /* ptr to boot errors */
737 unsigned int mem_free; /* first location, where OS can be loaded */
738 /* struct iomod *mem_hpa; */
739 unsigned int mem_hpa; /* HPA of the boot-CPU */
740 /* int (*mem_pdc)(int, ...); */
741 unsigned int mem_pdc; /* PDC entry point */
742 unsigned int mem_10msec; /* number of clock ticks in 10msec */
743
744 /* [0x390] initial memory module (IMM) */
745 /* struct iomod *imm_hpa; */
746 unsigned int imm_hpa; /* HPA of the IMM */
747 int imm_soft_boot; /* 0 = was hard boot, 1 = was soft boot */
748 unsigned int imm_spa_size; /* SPA size of the IMM in bytes */
749 unsigned int imm_max_mem; /* bytes of mem in IMM */
750
751 /* [0x3A0] boot console, display device and keyboard */
752 struct pz_device mem_cons; /* description of console device */
753 struct pz_device mem_boot; /* description of boot device */
754 struct pz_device mem_kbd; /* description of keyboard device */
755
756 /* [0x430] reserved */
757 int pad430[116];
758
759 /* [0x600] processor dependent */
760 __u32 pad600[1];
761 __u32 proc_sti; /* pointer to STI ROM */
762 __u32 pad608[126];
763};
764
765#endif /* !defined(__ASSEMBLY__) */
766
767#endif /* _PARISC_PDC_H */