/arch/mips/math-emu/sp_sub.c

  1/* IEEE754 floating point arithmetic
  2 * single precision
  3 */
  4/*
  5 * MIPS floating point support
  6 * Copyright (C) 1994-2000 Algorithmics Ltd.
  7 * http://www.algor.co.uk
  8 *
  9 * ########################################################################
 10 *
 11 *  This program is free software; you can distribute it and/or modify it
 12 *  under the terms of the GNU General Public License (Version 2) as
 13 *  published by the Free Software Foundation.
 14 *
 15 *  This program is distributed in the hope it will be useful, but WITHOUT
 16 *  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 17 *  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
 18 *  for more details.
 19 *
 20 *  You should have received a copy of the GNU General Public License along
 21 *  with this program; if not, write to the Free Software Foundation, Inc.,
 22 *  59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
 23 *
 24 * ########################################################################
 25 */
 26
 27
 28#include "ieee754sp.h"
 29
 30ieee754sp ieee754sp_sub(ieee754sp x, ieee754sp y)
 31{
 32	COMPXSP;
 33	COMPYSP;
 34
 35	EXPLODEXSP;
 36	EXPLODEYSP;
 37
 38	CLEARCX;
 39
 40	FLUSHXSP;
 41	FLUSHYSP;
 42
 43	switch (CLPAIR(xc, yc)) {
 44	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_QNAN):
 45	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_SNAN):
 46	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_SNAN):
 47	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_SNAN):
 48	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_SNAN):
 49	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_SNAN):
 50	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_SNAN):
 51	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_ZERO):
 52	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_NORM):
 53	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_DNORM):
 54	case CLPAIR(IEEE754_CLASS_SNAN, IEEE754_CLASS_INF):
 55		SETCX(IEEE754_INVALID_OPERATION);
 56		return ieee754sp_nanxcpt(ieee754sp_indef(), "sub", x, y);
 57
 58	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_QNAN):
 59	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_QNAN):
 60	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_QNAN):
 61	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_QNAN):
 62		return y;
 63
 64	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_QNAN):
 65	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_ZERO):
 66	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_NORM):
 67	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_DNORM):
 68	case CLPAIR(IEEE754_CLASS_QNAN, IEEE754_CLASS_INF):
 69		return x;
 70
 71
 72		/* Infinity handling
 73		 */
 74
 75	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_INF):
 76		if (xs != ys)
 77			return x;
 78		SETCX(IEEE754_INVALID_OPERATION);
 79		return ieee754sp_xcpt(ieee754sp_indef(), "sub", x, y);
 80
 81	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_INF):
 82	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_INF):
 83	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_INF):
 84		return ieee754sp_inf(ys ^ 1);
 85
 86	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_ZERO):
 87	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_NORM):
 88	case CLPAIR(IEEE754_CLASS_INF, IEEE754_CLASS_DNORM):
 89		return x;
 90
 91		/* Zero handling
 92		 */
 93
 94	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_ZERO):
 95		if (xs != ys)
 96			return x;
 97		else
 98			return ieee754sp_zero(ieee754_csr.rm ==
 99					      IEEE754_RD);
100
101	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_ZERO):
102	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_ZERO):
103		return x;
104
105	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_NORM):
106	case CLPAIR(IEEE754_CLASS_ZERO, IEEE754_CLASS_DNORM):
107		/* quick fix up */
108		DPSIGN(y) ^= 1;
109		return y;
110
111	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_DNORM):
112		SPDNORMX;
113
114	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_DNORM):
115		SPDNORMY;
116		break;
117
118	case CLPAIR(IEEE754_CLASS_DNORM, IEEE754_CLASS_NORM):
119		SPDNORMX;
120		break;
121
122	case CLPAIR(IEEE754_CLASS_NORM, IEEE754_CLASS_NORM):
123		break;
124	}
125	/* flip sign of y and handle as add */
126	ys ^= 1;
127
128	assert(xm & SP_HIDDEN_BIT);
129	assert(ym & SP_HIDDEN_BIT);
130
131
132	/* provide guard,round and stick bit space */
133	xm <<= 3;
134	ym <<= 3;
135
136	if (xe > ye) {
137		/* have to shift y fraction right to align
138		 */
139		int s = xe - ye;
140		SPXSRSYn(s);
141	} else if (ye > xe) {
142		/* have to shift x fraction right to align
143		 */
144		int s = ye - xe;
145		SPXSRSXn(s);
146	}
147	assert(xe == ye);
148	assert(xe <= SP_EMAX);
149
150	if (xs == ys) {
151		/* generate 28 bit result of adding two 27 bit numbers
152		 */
153		xm = xm + ym;
154		xe = xe;
155		xs = xs;
156
157		if (xm >> (SP_MBITS + 1 + 3)) {	/* carry out */
158			SPXSRSX1();	/* shift preserving sticky */
159		}
160	} else {
161		if (xm >= ym) {
162			xm = xm - ym;
163			xe = xe;
164			xs = xs;
165		} else {
166			xm = ym - xm;
167			xe = xe;
168			xs = ys;
169		}
170		if (xm == 0) {
171			if (ieee754_csr.rm == IEEE754_RD)
172				return ieee754sp_zero(1);	/* round negative inf. => sign = -1 */
173			else
174				return ieee754sp_zero(0);	/* other round modes   => sign = 1 */
175		}
176		/* normalize to rounding precision
177		 */
178		while ((xm >> (SP_MBITS + 3)) == 0) {
179			xm <<= 1;
180			xe--;
181		}
182	}
183	SPNORMRET2(xs, xe, xm, "sub", x, y);
184}