/arch/mips/include/asm/octeon/cvmx-bootinfo.h
C Header | 275 lines | 159 code | 25 blank | 91 comment | 3 complexity | ddd60e54f16c3a199bf2f01a46320d5a MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
1/***********************license start***************
2 * Author: Cavium Networks
3 *
4 * Contact: support@caviumnetworks.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2008 Cavium Networks
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Networks for more information
26 ***********************license end**************************************/
27
28/*
29 * Header file containing the ABI with the bootloader.
30 */
31
32#ifndef __CVMX_BOOTINFO_H__
33#define __CVMX_BOOTINFO_H__
34
35/*
36 * Current major and minor versions of the CVMX bootinfo block that is
37 * passed from the bootloader to the application. This is versioned
38 * so that applications can properly handle multiple bootloader
39 * versions.
40 */
41#define CVMX_BOOTINFO_MAJ_VER 1
42#define CVMX_BOOTINFO_MIN_VER 2
43
44#if (CVMX_BOOTINFO_MAJ_VER == 1)
45#define CVMX_BOOTINFO_OCTEON_SERIAL_LEN 20
46/*
47 * This structure is populated by the bootloader. For binary
48 * compatibility the only changes that should be made are
49 * adding members to the end of the structure, and the minor
50 * version should be incremented at that time.
51 * If an incompatible change is made, the major version
52 * must be incremented, and the minor version should be reset
53 * to 0.
54 */
55struct cvmx_bootinfo {
56 uint32_t major_version;
57 uint32_t minor_version;
58
59 uint64_t stack_top;
60 uint64_t heap_base;
61 uint64_t heap_end;
62 uint64_t desc_vaddr;
63
64 uint32_t exception_base_addr;
65 uint32_t stack_size;
66 uint32_t flags;
67 uint32_t core_mask;
68 /* DRAM size in megabytes */
69 uint32_t dram_size;
70 /* physical address of free memory descriptor block*/
71 uint32_t phy_mem_desc_addr;
72 /* used to pass flags from app to debugger */
73 uint32_t debugger_flags_base_addr;
74
75 /* CPU clock speed, in hz */
76 uint32_t eclock_hz;
77
78 /* DRAM clock speed, in hz */
79 uint32_t dclock_hz;
80
81 uint32_t reserved0;
82 uint16_t board_type;
83 uint8_t board_rev_major;
84 uint8_t board_rev_minor;
85 uint16_t reserved1;
86 uint8_t reserved2;
87 uint8_t reserved3;
88 char board_serial_number[CVMX_BOOTINFO_OCTEON_SERIAL_LEN];
89 uint8_t mac_addr_base[6];
90 uint8_t mac_addr_count;
91#if (CVMX_BOOTINFO_MIN_VER >= 1)
92 /*
93 * Several boards support compact flash on the Octeon boot
94 * bus. The CF memory spaces may be mapped to different
95 * addresses on different boards. These are the physical
96 * addresses, so care must be taken to use the correct
97 * XKPHYS/KSEG0 addressing depending on the application's
98 * ABI. These values will be 0 if CF is not present.
99 */
100 uint64_t compact_flash_common_base_addr;
101 uint64_t compact_flash_attribute_base_addr;
102 /*
103 * Base address of the LED display (as on EBT3000 board)
104 * This will be 0 if LED display not present.
105 */
106 uint64_t led_display_base_addr;
107#endif
108#if (CVMX_BOOTINFO_MIN_VER >= 2)
109 /* DFA reference clock in hz (if applicable)*/
110 uint32_t dfa_ref_clock_hz;
111
112 /*
113 * flags indicating various configuration options. These
114 * flags supercede the 'flags' variable and should be used
115 * instead if available.
116 */
117 uint32_t config_flags;
118#endif
119
120};
121
122#define CVMX_BOOTINFO_CFG_FLAG_PCI_HOST (1ull << 0)
123#define CVMX_BOOTINFO_CFG_FLAG_PCI_TARGET (1ull << 1)
124#define CVMX_BOOTINFO_CFG_FLAG_DEBUG (1ull << 2)
125#define CVMX_BOOTINFO_CFG_FLAG_NO_MAGIC (1ull << 3)
126/* This flag is set if the TLB mappings are not contained in the
127 * 0x10000000 - 0x20000000 boot bus region. */
128#define CVMX_BOOTINFO_CFG_FLAG_OVERSIZE_TLB_MAPPING (1ull << 4)
129#define CVMX_BOOTINFO_CFG_FLAG_BREAK (1ull << 5)
130
131#endif /* (CVMX_BOOTINFO_MAJ_VER == 1) */
132
133/* Type defines for board and chip types */
134enum cvmx_board_types_enum {
135 CVMX_BOARD_TYPE_NULL = 0,
136 CVMX_BOARD_TYPE_SIM = 1,
137 CVMX_BOARD_TYPE_EBT3000 = 2,
138 CVMX_BOARD_TYPE_KODAMA = 3,
139 CVMX_BOARD_TYPE_NIAGARA = 4,
140 CVMX_BOARD_TYPE_NAC38 = 5, /* formerly NAO38 */
141 CVMX_BOARD_TYPE_THUNDER = 6,
142 CVMX_BOARD_TYPE_TRANTOR = 7,
143 CVMX_BOARD_TYPE_EBH3000 = 8,
144 CVMX_BOARD_TYPE_EBH3100 = 9,
145 CVMX_BOARD_TYPE_HIKARI = 10,
146 CVMX_BOARD_TYPE_CN3010_EVB_HS5 = 11,
147 CVMX_BOARD_TYPE_CN3005_EVB_HS5 = 12,
148 CVMX_BOARD_TYPE_KBP = 13,
149 /* Deprecated, CVMX_BOARD_TYPE_CN3010_EVB_HS5 supports the CN3020 */
150 CVMX_BOARD_TYPE_CN3020_EVB_HS5 = 14,
151 CVMX_BOARD_TYPE_EBT5800 = 15,
152 CVMX_BOARD_TYPE_NICPRO2 = 16,
153 CVMX_BOARD_TYPE_EBH5600 = 17,
154 CVMX_BOARD_TYPE_EBH5601 = 18,
155 CVMX_BOARD_TYPE_EBH5200 = 19,
156 CVMX_BOARD_TYPE_BBGW_REF = 20,
157 CVMX_BOARD_TYPE_NIC_XLE_4G = 21,
158 CVMX_BOARD_TYPE_EBT5600 = 22,
159 CVMX_BOARD_TYPE_EBH5201 = 23,
160 CVMX_BOARD_TYPE_EBT5200 = 24,
161 CVMX_BOARD_TYPE_CB5600 = 25,
162 CVMX_BOARD_TYPE_CB5601 = 26,
163 CVMX_BOARD_TYPE_CB5200 = 27,
164 /* Special 'generic' board type, supports many boards */
165 CVMX_BOARD_TYPE_GENERIC = 28,
166 CVMX_BOARD_TYPE_EBH5610 = 29,
167 CVMX_BOARD_TYPE_MAX,
168
169 /*
170 * The range from CVMX_BOARD_TYPE_MAX to
171 * CVMX_BOARD_TYPE_CUST_DEFINED_MIN is reserved for future
172 * SDK use.
173 */
174
175 /*
176 * Set aside a range for customer boards. These numbers are managed
177 * by Cavium.
178 */
179 CVMX_BOARD_TYPE_CUST_DEFINED_MIN = 10000,
180 CVMX_BOARD_TYPE_CUST_WSX16 = 10001,
181 CVMX_BOARD_TYPE_CUST_NS0216 = 10002,
182 CVMX_BOARD_TYPE_CUST_NB5 = 10003,
183 CVMX_BOARD_TYPE_CUST_WMR500 = 10004,
184 CVMX_BOARD_TYPE_CUST_DEFINED_MAX = 20000,
185
186 /*
187 * Set aside a range for customer private use. The SDK won't
188 * use any numbers in this range.
189 */
190 CVMX_BOARD_TYPE_CUST_PRIVATE_MIN = 20001,
191 CVMX_BOARD_TYPE_CUST_PRIVATE_MAX = 30000,
192
193 /* The remaining range is reserved for future use. */
194};
195
196enum cvmx_chip_types_enum {
197 CVMX_CHIP_TYPE_NULL = 0,
198 CVMX_CHIP_SIM_TYPE_DEPRECATED = 1,
199 CVMX_CHIP_TYPE_OCTEON_SAMPLE = 2,
200 CVMX_CHIP_TYPE_MAX,
201};
202
203/* Compatability alias for NAC38 name change, planned to be removed
204 * from SDK 1.7 */
205#define CVMX_BOARD_TYPE_NAO38 CVMX_BOARD_TYPE_NAC38
206
207/* Functions to return string based on type */
208#define ENUM_BRD_TYPE_CASE(x) \
209 case x: return(#x + 16); /* Skip CVMX_BOARD_TYPE_ */
210static inline const char *cvmx_board_type_to_string(enum
211 cvmx_board_types_enum type)
212{
213 switch (type) {
214 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NULL)
215 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_SIM)
216 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT3000)
217 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KODAMA)
218 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIAGARA)
219 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NAC38)
220 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_THUNDER)
221 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_TRANTOR)
222 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3000)
223 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH3100)
224 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_HIKARI)
225 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3010_EVB_HS5)
226 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3005_EVB_HS5)
227 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_KBP)
228 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CN3020_EVB_HS5)
229 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5800)
230 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NICPRO2)
231 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5600)
232 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5601)
233 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5200)
234 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_BBGW_REF)
235 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_NIC_XLE_4G)
236 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5600)
237 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5201)
238 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBT5200)
239 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5600)
240 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5601)
241 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CB5200)
242 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_GENERIC)
243 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_EBH5610)
244 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_MAX)
245
246 /* Customer boards listed here */
247 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MIN)
248 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WSX16)
249 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NS0216)
250 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_NB5)
251 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_WMR500)
252 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_DEFINED_MAX)
253
254 /* Customer private range */
255 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MIN)
256 ENUM_BRD_TYPE_CASE(CVMX_BOARD_TYPE_CUST_PRIVATE_MAX)
257 }
258 return "Unsupported Board";
259}
260
261#define ENUM_CHIP_TYPE_CASE(x) \
262 case x: return(#x + 15); /* Skip CVMX_CHIP_TYPE */
263static inline const char *cvmx_chip_type_to_string(enum
264 cvmx_chip_types_enum type)
265{
266 switch (type) {
267 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_NULL)
268 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_SIM_TYPE_DEPRECATED)
269 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_OCTEON_SAMPLE)
270 ENUM_CHIP_TYPE_CASE(CVMX_CHIP_TYPE_MAX)
271 }
272 return "Unsupported Chip";
273}
274
275#endif /* __CVMX_BOOTINFO_H__ */