PageRenderTime 27ms CodeModel.GetById 21ms RepoModel.GetById 3ms app.codeStats 0ms

/arch/mips/include/asm/mach-tx49xx/mangle-port.h

https://bitbucket.org/cresqo/cm7-p500-kernel
C Header | 26 lines | 23 code | 3 blank | 0 comment | 3 complexity | 985caa4c055b1b3cec749cd9ada54e6f MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1. #ifndef __ASM_MACH_TX49XX_MANGLE_PORT_H
  2. #define __ASM_MACH_TX49XX_MANGLE_PORT_H
  3. #define __swizzle_addr_b(port) (port)
  4. #define __swizzle_addr_w(port) (port)
  5. #define __swizzle_addr_l(port) (port)
  6. #define __swizzle_addr_q(port) (port)
  7. #define ioswabb(a, x) (x)
  8. #define __mem_ioswabb(a, x) (x)
  9. #if defined(CONFIG_TOSHIBA_RBTX4939) && \
  10. (defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)) && \
  11. defined(__BIG_ENDIAN)
  12. #define NEEDS_TXX9_IOSWABW
  13. extern u16 (*ioswabw)(volatile u16 *a, u16 x);
  14. extern u16 (*__mem_ioswabw)(volatile u16 *a, u16 x);
  15. #else
  16. #define ioswabw(a, x) le16_to_cpu(x)
  17. #define __mem_ioswabw(a, x) (x)
  18. #endif
  19. #define ioswabl(a, x) le32_to_cpu(x)
  20. #define __mem_ioswabl(a, x) (x)
  21. #define ioswabq(a, x) le64_to_cpu(x)
  22. #define __mem_ioswabq(a, x) (x)
  23. #endif /* __ASM_MACH_TX49XX_MANGLE_PORT_H */