/arch/mips/include/asm/mach-bcm47xx/war.h

https://bitbucket.org/cresqo/cm7-p500-kernel · C Header · 25 lines · 16 code · 2 blank · 7 comment · 0 complexity · 47c733ad62d27f7d54fc8874c82846e7 MD5 · raw file 

    

  1. /*
    2. 

  2.  * This file is subject to the terms and conditions of the GNU General Public
    3. 

  3.  * License.  See the file "COPYING" in the main directory of this archive
    4. 

  4.  * for more details.
    5. 

  5.  *
    6. 

  6.  * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org>
    7. 

  7.  */
    8. 

  8. #ifndef __ASM_MIPS_MACH_BCM47XX_WAR_H
    9. 

  9. #define __ASM_MIPS_MACH_BCM47XX_WAR_H
    10. 

  10. 

  11. #define R4600_V1_INDEX_ICACHEOP_WAR	0
    12. 

  12. #define R4600_V1_HIT_CACHEOP_WAR	0
    13. 

  13. #define R4600_V2_HIT_CACHEOP_WAR	0
    14. 

  14. #define R5432_CP0_INTERRUPT_WAR		0
    15. 

  15. #define BCM1250_M3_WAR			0
    16. 

  16. #define SIBYTE_1956_WAR			0
    17. 

  17. #define MIPS4K_ICACHE_REFILL_WAR	0
    18. 

  18. #define MIPS_CACHE_SYNC_WAR		0
    19. 

  19. #define TX49XX_ICACHE_INDEX_INV_WAR	0
    20. 

  20. #define RM9000_CDEX_SMP_WAR		0
    21. 

  21. #define ICACHE_REFILLS_WORKAROUND_WAR	0
    22. 

  22. #define R10000_LLSC_WAR			0
    23. 

  23. #define MIPS34K_MISSED_ITLB_WAR		0
    24. 

  24. 

  25. #endif /* __ASM_MIPS_MACH_BCM47XX_WAR_H */
    26.