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/arch/m68k/fpsp040/smovecr.S

https://bitbucket.org/cresqo/cm7-p500-kernel
Assembly | 161 lines | 161 code | 0 blank | 0 comment | 0 complexity | 05f85815b0597aa44a1c13f4856c5640 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1|
  2|	smovecr.sa 3.1 12/10/90
  3|
  4|	The entry point sMOVECR returns the constant at the
  5|	offset given in the instruction field.
  6|
  7|	Input: An offset in the instruction word.
  8|
  9|	Output:	The constant rounded to the user's rounding
 10|		mode unchecked for overflow.
 11|
 12|	Modified: fp0.
 13|
 14|
 15|		Copyright (C) Motorola, Inc. 1990
 16|			All Rights Reserved
 17|
 18|       For details on the license for this file, please see the
 19|       file, README, in this same directory.
 20
 21|SMOVECR	idnt	2,1 | Motorola 040 Floating Point Software Package
 22
 23	|section 8
 24
 25#include "fpsp.h"
 26
 27	|xref	nrm_set
 28	|xref	round
 29	|xref	PIRN
 30	|xref	PIRZRM
 31	|xref	PIRP
 32	|xref	SMALRN
 33	|xref	SMALRZRM
 34	|xref	SMALRP
 35	|xref	BIGRN
 36	|xref	BIGRZRM
 37	|xref	BIGRP
 38
 39FZERO:	.long	00000000
 40|
 41|	FMOVECR
 42|
 43	.global	smovcr
 44smovcr:
 45	bfextu	CMDREG1B(%a6){#9:#7},%d0 |get offset
 46	bfextu	USER_FPCR(%a6){#26:#2},%d1 |get rmode
 47|
 48| check range of offset
 49|
 50	tstb	%d0		|if zero, offset is to pi
 51	beqs	PI_TBL		|it is pi
 52	cmpib	#0x0a,%d0		|check range $01 - $0a
 53	bles	Z_VAL		|if in this range, return zero
 54	cmpib	#0x0e,%d0		|check range $0b - $0e
 55	bles	SM_TBL		|valid constants in this range
 56	cmpib	#0x2f,%d0		|check range $10 - $2f
 57	bles	Z_VAL		|if in this range, return zero
 58	cmpib	#0x3f,%d0		|check range $30 - $3f
 59	ble	BG_TBL		|valid constants in this range
 60Z_VAL:
 61	fmoves	FZERO,%fp0
 62	rts
 63PI_TBL:
 64	tstb	%d1		|offset is zero, check for rmode
 65	beqs	PI_RN		|if zero, rn mode
 66	cmpib	#0x3,%d1		|check for rp
 67	beqs	PI_RP		|if 3, rp mode
 68PI_RZRM:
 69	leal	PIRZRM,%a0	|rmode is rz or rm, load PIRZRM in a0
 70	bra	set_finx
 71PI_RN:
 72	leal	PIRN,%a0		|rmode is rn, load PIRN in a0
 73	bra	set_finx
 74PI_RP:
 75	leal	PIRP,%a0		|rmode is rp, load PIRP in a0
 76	bra	set_finx
 77SM_TBL:
 78	subil	#0xb,%d0		|make offset in 0 - 4 range
 79	tstb	%d1		|check for rmode
 80	beqs	SM_RN		|if zero, rn mode
 81	cmpib	#0x3,%d1		|check for rp
 82	beqs	SM_RP		|if 3, rp mode
 83SM_RZRM:
 84	leal	SMALRZRM,%a0	|rmode is rz or rm, load SMRZRM in a0
 85	cmpib	#0x2,%d0		|check if result is inex
 86	ble	set_finx	|if 0 - 2, it is inexact
 87	bra	no_finx		|if 3, it is exact
 88SM_RN:
 89	leal	SMALRN,%a0	|rmode is rn, load SMRN in a0
 90	cmpib	#0x2,%d0		|check if result is inex
 91	ble	set_finx	|if 0 - 2, it is inexact
 92	bra	no_finx		|if 3, it is exact
 93SM_RP:
 94	leal	SMALRP,%a0	|rmode is rp, load SMRP in a0
 95	cmpib	#0x2,%d0		|check if result is inex
 96	ble	set_finx	|if 0 - 2, it is inexact
 97	bra	no_finx		|if 3, it is exact
 98BG_TBL:
 99	subil	#0x30,%d0		|make offset in 0 - f range
100	tstb	%d1		|check for rmode
101	beqs	BG_RN		|if zero, rn mode
102	cmpib	#0x3,%d1		|check for rp
103	beqs	BG_RP		|if 3, rp mode
104BG_RZRM:
105	leal	BIGRZRM,%a0	|rmode is rz or rm, load BGRZRM in a0
106	cmpib	#0x1,%d0		|check if result is inex
107	ble	set_finx	|if 0 - 1, it is inexact
108	cmpib	#0x7,%d0		|second check
109	ble	no_finx		|if 0 - 7, it is exact
110	bra	set_finx	|if 8 - f, it is inexact
111BG_RN:
112	leal	BIGRN,%a0	|rmode is rn, load BGRN in a0
113	cmpib	#0x1,%d0		|check if result is inex
114	ble	set_finx	|if 0 - 1, it is inexact
115	cmpib	#0x7,%d0		|second check
116	ble	no_finx		|if 0 - 7, it is exact
117	bra	set_finx	|if 8 - f, it is inexact
118BG_RP:
119	leal	BIGRP,%a0	|rmode is rp, load SMRP in a0
120	cmpib	#0x1,%d0		|check if result is inex
121	ble	set_finx	|if 0 - 1, it is inexact
122	cmpib	#0x7,%d0		|second check
123	ble	no_finx		|if 0 - 7, it is exact
124|	bra	set_finx	;if 8 - f, it is inexact
125set_finx:
126	orl	#inx2a_mask,USER_FPSR(%a6) |set inex2/ainex
127no_finx:
128	mulul	#12,%d0			|use offset to point into tables
129	movel	%d1,L_SCR1(%a6)		|load mode for round call
130	bfextu	USER_FPCR(%a6){#24:#2},%d1	|get precision
131	tstl	%d1			|check if extended precision
132|
133| Precision is extended
134|
135	bnes	not_ext			|if extended, do not call round
136	fmovemx (%a0,%d0),%fp0-%fp0		|return result in fp0
137	rts
138|
139| Precision is single or double
140|
141not_ext:
142	swap	%d1			|rnd prec in upper word of d1
143	addl	L_SCR1(%a6),%d1		|merge rmode in low word of d1
144	movel	(%a0,%d0),FP_SCR1(%a6)	|load first word to temp storage
145	movel	4(%a0,%d0),FP_SCR1+4(%a6)	|load second word
146	movel	8(%a0,%d0),FP_SCR1+8(%a6)	|load third word
147	clrl	%d0			|clear g,r,s
148	lea	FP_SCR1(%a6),%a0
149	btstb	#sign_bit,LOCAL_EX(%a0)
150	sne	LOCAL_SGN(%a0)		|convert to internal ext. format
151
152	bsr	round			|go round the mantissa
153
154	bfclr	LOCAL_SGN(%a0){#0:#8}	|convert back to IEEE ext format
155	beqs	fin_fcr
156	bsetb	#sign_bit,LOCAL_EX(%a0)
157fin_fcr:
158	fmovemx (%a0),%fp0-%fp0
159	rts
160
161	|end