/arch/m32r/include/asm/cachectl.h
C Header | 26 lines | 8 code | 3 blank | 15 comment | 0 complexity | 94c668db9769058aaf4e0bf3d2ffbb1f MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
1/*
2 * cachectl.h -- defines for M32R cache control system calls
3 *
4 * Copyright (C) 2003 by Kazuhiro Inaoka
5 */
6#ifndef __ASM_M32R_CACHECTL
7#define __ASM_M32R_CACHECTL
8
9/*
10 * Options for cacheflush system call
11 *
12 * cacheflush() is currently fluch_cache_all().
13 */
14#define ICACHE (1<<0) /* flush instruction cache */
15#define DCACHE (1<<1) /* writeback and flush data cache */
16#define BCACHE (ICACHE|DCACHE) /* flush both caches */
17
18/*
19 * Caching modes for the cachectl(2) call
20 *
21 * cachectl(2) is currently not supported and returns ENOSYS.
22 */
23#define CACHEABLE 0 /* make pages cacheable */
24#define UNCACHEABLE 1 /* make pages uncacheable */
25
26#endif /* __ASM_M32R_CACHECTL */