/Projects/STM32L4R9I-EVAL/Examples/OSPI/OSPI_NOR_ExecuteInPlace/Inc/main.h

https://github.com/STMicroelectronics/STM32CubeL4 · C Header · 127 lines · 74 code · 18 blank · 35 comment · 0 complexity · f6a56d85c0e9946e13ba23fa3e91d6da MD5 · raw file

  1. /**
  2. ******************************************************************************
  3. * @file OSPI/OSPI_NOR_ExecuteInPlace/Inc/main.h
  4. * @author MCD Application Team
  5. * @brief Header for main.c module
  6. ******************************************************************************
  7. * @attention
  8. *
  9. * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10. * All rights reserved.</center></h2>
  11. *
  12. * This software component is licensed by ST under BSD 3-Clause license,
  13. * the "License"; You may not use this file except in compliance with the
  14. * License. You may obtain a copy of the License at:
  15. * opensource.org/licenses/BSD-3-Clause
  16. *
  17. ******************************************************************************
  18. */
  19. /* Define to prevent recursive inclusion -------------------------------------*/
  20. #ifndef __MAIN_H
  21. #define __MAIN_H
  22. /* Includes ------------------------------------------------------------------*/
  23. #include "stm32l4xx_hal.h"
  24. #include "stm32l4r9i_eval.h"
  25. /* Exported types ------------------------------------------------------------*/
  26. /* Exported constants --------------------------------------------------------*/
  27. /* Definition for OSPI Pins */
  28. #define OSPI_CS_PIN GPIO_PIN_2
  29. #define OSPI_CS_GPIO_PORT GPIOA
  30. #define OSPI_CLK_PIN GPIO_PIN_3
  31. #define OSPI_CLK_GPIO_PORT GPIOA
  32. #define OSPI_D0_PIN GPIO_PIN_1
  33. #define OSPI_D0_GPIO_PORT GPIOB
  34. #define OSPI_D1_PIN GPIO_PIN_0
  35. #define OSPI_D1_GPIO_PORT GPIOB
  36. #define OSPI_D2_PIN GPIO_PIN_7
  37. #define OSPI_D2_GPIO_PORT GPIOA
  38. #define OSPI_D3_PIN GPIO_PIN_6
  39. #define OSPI_D3_GPIO_PORT GPIOA
  40. #define OSPI_D4_PIN GPIO_PIN_2
  41. #define OSPI_D4_GPIO_PORT GPIOH
  42. #define OSPI_D5_PIN GPIO_PIN_11
  43. #define OSPI_D5_GPIO_PORT GPIOG
  44. #define OSPI_D6_PIN GPIO_PIN_3
  45. #define OSPI_D6_GPIO_PORT GPIOC
  46. #define OSPI_D7_PIN GPIO_PIN_4
  47. #define OSPI_D7_GPIO_PORT GPIOC
  48. #define OSPI_DQS_PIN GPIO_PIN_2
  49. #define OSPI_DQS_GPIO_PORT GPIOB
  50. /* Definition for OSPI DMA */
  51. #define OSPI_DMA_CHANNEL DMA1_Channel1
  52. #define OSPI_DMA_REQUEST DMA_REQUEST_OCTOSPI2
  53. #define OSPI_DMA_IRQ DMA1_Channel1_IRQn
  54. #define OSPI_DMA_IRQ_HANDLER DMA1_Channel1_IRQHandler
  55. /* MX25LM512ABA1G12 Macronix memory */
  56. /* Size of the flash */
  57. #define OSPI_FLASH_SIZE 26
  58. #define OSPI_PAGE_SIZE 256
  59. #define OSPI_SECTOR_SIZE 4096
  60. /* Flash commands */
  61. #define OCTAL_IO_READ_CMD 0xEC13
  62. #define OCTAL_PAGE_PROG_CMD 0x12ED
  63. #define OCTAL_READ_STATUS_REG_CMD 0x05FA
  64. #define OCTAL_SECTOR_ERASE_CMD 0x21DE
  65. #define OCTAL_WRITE_ENABLE_CMD 0x06F9
  66. #define READ_STATUS_REG_CMD 0x05
  67. #define WRITE_CFG_REG_2_CMD 0x72
  68. #define WRITE_ENABLE_CMD 0x06
  69. /* Dummy clocks cycles */
  70. #define DUMMY_CLOCK_CYCLES_READ 6
  71. #define DUMMY_CLOCK_CYCLES_READ_REG 4
  72. /* Auto-polling values */
  73. #define WRITE_ENABLE_MATCH_VALUE 0x02
  74. #define WRITE_ENABLE_MASK_VALUE 0x02
  75. #define MEMORY_READY_MATCH_VALUE 0x00
  76. #define MEMORY_READY_MASK_VALUE 0x01
  77. #define AUTO_POLLING_INTERVAL 0x10
  78. /* Memory registers address */
  79. #define CONFIG_REG2_ADDR1 0x0000000
  80. #define CR2_STR_OPI_ENABLE 0x01
  81. #define CONFIG_REG2_ADDR3 0x00000300
  82. #define CR2_DUMMY_CYCLES_66MHZ 0x07
  83. /* Memory delay */
  84. #define MEMORY_REG_WRITE_DELAY 40
  85. #define MEMORY_PAGE_PROG_DELAY 2
  86. /* Exported macro ------------------------------------------------------------*/
  87. /* Definition for OSPI clock resources */
  88. #define OSPI_CLK_ENABLE() __HAL_RCC_OSPI2_CLK_ENABLE()
  89. #define OSPI_CLK_DISABLE() __HAL_RCC_OSPI2_CLK_DISABLE()
  90. #define OSPIM_CLK_ENABLE() __HAL_RCC_OSPIM_CLK_ENABLE()
  91. #define OSPIM_CLK_DISABLE() __HAL_RCC_OSPIM_CLK_DISABLE()
  92. #define OSPI_CS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  93. #define OSPI_CLK_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  94. #define OSPI_D0_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  95. #define OSPI_D1_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  96. #define OSPI_D2_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  97. #define OSPI_D3_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
  98. #define OSPI_D4_GPIO_CLK_ENABLE() __HAL_RCC_GPIOH_CLK_ENABLE()
  99. #define OSPI_D5_GPIO_CLK_ENABLE() __HAL_RCC_GPIOG_CLK_ENABLE()
  100. #define OSPI_D6_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  101. #define OSPI_D7_GPIO_CLK_ENABLE() __HAL_RCC_GPIOC_CLK_ENABLE()
  102. #define OSPI_DQS_GPIO_CLK_ENABLE() __HAL_RCC_GPIOB_CLK_ENABLE()
  103. #define OSPI_DMA_CLK_ENABLE() __HAL_RCC_DMA1_CLK_ENABLE()
  104. #define OSPI_DMAMUX_CLK_ENABLE() __HAL_RCC_DMAMUX1_CLK_ENABLE()
  105. #define OSPI_FORCE_RESET() __HAL_RCC_OSPI2_FORCE_RESET()
  106. #define OSPI_RELEASE_RESET() __HAL_RCC_OSPI2_RELEASE_RESET()
  107. /* Exported functions ------------------------------------------------------- */
  108. #endif /* __MAIN_H */
  109. /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/