/arch/arm/mach-omap2/powerdomains.h

  1/*
  2 * OMAP2/3 common powerdomain definitions
  3 *
  4 * Copyright (C) 2007-2008 Texas Instruments, Inc.
  5 * Copyright (C) 2007-2009 Nokia Corporation
  6 *
  7 * Written by Paul Walmsley
  8 * Debugging and integration fixes by Jouni Hรถgander
  9 *
 10 * This program is free software; you can redistribute it and/or modify
 11 * it under the terms of the GNU General Public License version 2 as
 12 * published by the Free Software Foundation.
 13 */
 14
 15/*
 16 * To Do List
 17 * -> Move the Sleep/Wakeup dependencies from Power Domain framework to
 18 *    Clock Domain Framework
 19 */
 20
 21#ifndef ARCH_ARM_MACH_OMAP2_POWERDOMAINS
 22#define ARCH_ARM_MACH_OMAP2_POWERDOMAINS
 23
 24/*
 25 * This file contains all of the powerdomains that have some element
 26 * of software control for the OMAP24xx and OMAP34xx chips.
 27 *
 28 * This is not an exhaustive listing of powerdomains on the chips; only
 29 * powerdomains that can be controlled in software.
 30 */
 31
 32/*
 33 * The names for the DSP/IVA2 powerdomains are confusing.
 34 *
 35 * Most OMAP chips have an on-board DSP.
 36 *
 37 * On the 2420, this is a 'C55 DSP called, simply, the DSP.  Its
 38 * powerdomain is called the "DSP power domain."  On the 2430, the
 39 * on-board DSP is a 'C64 DSP, now called (along with its hardware
 40 * accelerators) the IVA2 or IVA2.1.  Its powerdomain is still called
 41 * the "DSP power domain." On the 3430, the DSP is a 'C64 DSP like the
 42 * 2430, also known as the IVA2; but its powerdomain is now called the
 43 * "IVA2 power domain."
 44 *
 45 * The 2420 also has something called the IVA, which is a separate ARM
 46 * core, and has nothing to do with the DSP/IVA2.
 47 *
 48 * Ideally the DSP/IVA2 could just be the same powerdomain, but the PRCM
 49 * address offset is different between the C55 and C64 DSPs.
 50 */
 51
 52#include <plat/powerdomain.h>
 53
 54#include "prcm-common.h"
 55#include "prm.h"
 56#include "cm.h"
 57#include "powerdomains24xx.h"
 58#include "powerdomains34xx.h"
 59#include "powerdomains44xx.h"
 60
 61/* OMAP2/3-common powerdomains */
 62
 63#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 64
 65/*
 66 * The GFX powerdomain is not present on 3430ES2, but currently we do not
 67 * have a macro to filter it out at compile-time.
 68 */
 69static struct powerdomain gfx_omap2_pwrdm = {
 70	.name		  = "gfx_pwrdm",
 71	.prcm_offs	  = GFX_MOD,
 72	.omap_chip	  = OMAP_CHIP_INIT(CHIP_IS_OMAP24XX |
 73					   CHIP_IS_OMAP3430ES1),
 74	.pwrsts		  = PWRSTS_OFF_RET_ON,
 75	.pwrsts_logic_ret = PWRDM_POWER_RET,
 76	.banks		  = 1,
 77	.pwrsts_mem_ret	  = {
 78		[0] = PWRDM_POWER_RET, /* MEMRETSTATE */
 79	},
 80	.pwrsts_mem_on	  = {
 81		[0] = PWRDM_POWER_ON,  /* MEMONSTATE */
 82	},
 83};
 84
 85static struct powerdomain wkup_omap2_pwrdm = {
 86	.name		= "wkup_pwrdm",
 87	.prcm_offs	= WKUP_MOD,
 88	.omap_chip	= OMAP_CHIP_INIT(CHIP_IS_OMAP24XX | CHIP_IS_OMAP3430),
 89};
 90
 91#endif
 92
 93
 94/* As powerdomains are added or removed above, this list must also be changed */
 95static struct powerdomain *powerdomains_omap[] __initdata = {
 96
 97#if defined(CONFIG_ARCH_OMAP2) || defined(CONFIG_ARCH_OMAP3)
 98	&wkup_omap2_pwrdm,
 99	&gfx_omap2_pwrdm,
100#endif
101
102#ifdef CONFIG_ARCH_OMAP2
103	&dsp_pwrdm,
104	&mpu_24xx_pwrdm,
105	&core_24xx_pwrdm,
106#endif
107
108#ifdef CONFIG_ARCH_OMAP2430
109	&mdm_pwrdm,
110#endif
111
112#ifdef CONFIG_ARCH_OMAP3
113	&iva2_pwrdm,
114	&mpu_3xxx_pwrdm,
115	&neon_pwrdm,
116	&core_3xxx_pre_es3_1_pwrdm,
117	&core_3xxx_es3_1_pwrdm,
118	&cam_pwrdm,
119	&dss_pwrdm,
120	&per_pwrdm,
121	&emu_pwrdm,
122	&sgx_pwrdm,
123	&usbhost_pwrdm,
124	&dpll1_pwrdm,
125	&dpll2_pwrdm,
126	&dpll3_pwrdm,
127	&dpll4_pwrdm,
128	&dpll5_pwrdm,
129#endif
130
131#ifdef CONFIG_ARCH_OMAP4
132	&core_44xx_pwrdm,
133	&gfx_44xx_pwrdm,
134	&abe_44xx_pwrdm,
135	&dss_44xx_pwrdm,
136	&tesla_44xx_pwrdm,
137	&wkup_44xx_pwrdm,
138	&cpu0_44xx_pwrdm,
139	&cpu1_44xx_pwrdm,
140	&emu_44xx_pwrdm,
141	&mpu_44xx_pwrdm,
142	&ivahd_44xx_pwrdm,
143	&cam_44xx_pwrdm,
144	&l3init_44xx_pwrdm,
145	&l4per_44xx_pwrdm,
146	&always_on_core_44xx_pwrdm,
147	&cefuse_44xx_pwrdm,
148#endif
149	NULL
150};
151
152
153#endif