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/arch/arm/mach-omap1/board-perseus2.c

https://bitbucket.org/sammyz/iscream_thunderc-2.6.35-rebase
C | 345 lines | 266 code | 42 blank | 37 comment | 4 complexity | 1ba12ce07c5b654dc4884c9c073769e7 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1/*
  2 * linux/arch/arm/mach-omap1/board-perseus2.c
  3 *
  4 * Modified from board-generic.c
  5 *
  6 * Original OMAP730 support by Jean Pihet <j-pihet@ti.com>
  7 * Updated for 2.6 by Kevin Hilman <kjh@hilman.org>
  8 *
  9 * This program is free software; you can redistribute it and/or modify
 10 * it under the terms of the GNU General Public License version 2 as
 11 * published by the Free Software Foundation.
 12 */
 13
 14#include <linux/kernel.h>
 15#include <linux/init.h>
 16#include <linux/platform_device.h>
 17#include <linux/delay.h>
 18#include <linux/mtd/mtd.h>
 19#include <linux/mtd/nand.h>
 20#include <linux/mtd/partitions.h>
 21#include <linux/mtd/physmap.h>
 22#include <linux/input.h>
 23#include <linux/smc91x.h>
 24
 25#include <mach/hardware.h>
 26#include <asm/mach-types.h>
 27#include <asm/mach/arch.h>
 28#include <asm/mach/map.h>
 29
 30#include <plat/tc.h>
 31#include <mach/gpio.h>
 32#include <plat/mux.h>
 33#include <plat/fpga.h>
 34#include <plat/flash.h>
 35#include <plat/keypad.h>
 36#include <plat/common.h>
 37#include <plat/board.h>
 38
 39static int p2_keymap[] = {
 40	KEY(0,0,KEY_UP),
 41	KEY(0,1,KEY_RIGHT),
 42	KEY(0,2,KEY_LEFT),
 43	KEY(0,3,KEY_DOWN),
 44	KEY(0,4,KEY_ENTER),
 45	KEY(1,0,KEY_F10),
 46	KEY(1,1,KEY_SEND),
 47	KEY(1,2,KEY_END),
 48	KEY(1,3,KEY_VOLUMEDOWN),
 49	KEY(1,4,KEY_VOLUMEUP),
 50	KEY(1,5,KEY_RECORD),
 51	KEY(2,0,KEY_F9),
 52	KEY(2,1,KEY_3),
 53	KEY(2,2,KEY_6),
 54	KEY(2,3,KEY_9),
 55	KEY(2,4,KEY_KPDOT),
 56	KEY(3,0,KEY_BACK),
 57	KEY(3,1,KEY_2),
 58	KEY(3,2,KEY_5),
 59	KEY(3,3,KEY_8),
 60	KEY(3,4,KEY_0),
 61	KEY(3,5,KEY_KPSLASH),
 62	KEY(4,0,KEY_HOME),
 63	KEY(4,1,KEY_1),
 64	KEY(4,2,KEY_4),
 65	KEY(4,3,KEY_7),
 66	KEY(4,4,KEY_KPASTERISK),
 67	KEY(4,5,KEY_POWER),
 68	0
 69};
 70
 71static struct smc91x_platdata smc91x_info = {
 72	.flags	= SMC91X_USE_16BIT | SMC91X_NOWAIT,
 73	.leda	= RPC_LED_100_10,
 74	.ledb	= RPC_LED_TX_RX,
 75};
 76
 77static struct resource smc91x_resources[] = {
 78	[0] = {
 79		.start	= H2P2_DBG_FPGA_ETHR_START,	/* Physical */
 80		.end	= H2P2_DBG_FPGA_ETHR_START + 0xf,
 81		.flags	= IORESOURCE_MEM,
 82	},
 83	[1] = {
 84		.start	= INT_7XX_MPU_EXT_NIRQ,
 85		.end	= 0,
 86		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
 87	},
 88};
 89
 90static struct mtd_partition nor_partitions[] = {
 91	/* bootloader (U-Boot, etc) in first sector */
 92	{
 93	      .name		= "bootloader",
 94	      .offset		= 0,
 95	      .size		= SZ_128K,
 96	      .mask_flags	= MTD_WRITEABLE, /* force read-only */
 97	},
 98	/* bootloader params in the next sector */
 99	{
100	      .name		= "params",
101	      .offset		= MTDPART_OFS_APPEND,
102	      .size		= SZ_128K,
103	      .mask_flags	= 0,
104	},
105	/* kernel */
106	{
107	      .name		= "kernel",
108	      .offset		= MTDPART_OFS_APPEND,
109	      .size		= SZ_2M,
110	      .mask_flags	= 0
111	},
112	/* rest of flash is a file system */
113	{
114	      .name		= "rootfs",
115	      .offset		= MTDPART_OFS_APPEND,
116	      .size		= MTDPART_SIZ_FULL,
117	      .mask_flags	= 0
118	},
119};
120
121static struct physmap_flash_data nor_data = {
122	.width		= 2,
123	.set_vpp	= omap1_set_vpp,
124	.parts		= nor_partitions,
125	.nr_parts	= ARRAY_SIZE(nor_partitions),
126};
127
128static struct resource nor_resource = {
129	.start		= OMAP_CS0_PHYS,
130	.end		= OMAP_CS0_PHYS + SZ_32M - 1,
131	.flags		= IORESOURCE_MEM,
132};
133
134static struct platform_device nor_device = {
135	.name		= "physmap-flash",
136	.id		= 0,
137	.dev		= {
138		.platform_data	= &nor_data,
139	},
140	.num_resources	= 1,
141	.resource	= &nor_resource,
142};
143
144static void nand_cmd_ctl(struct mtd_info *mtd, int cmd,	unsigned int ctrl)
145{
146	struct nand_chip *this = mtd->priv;
147	unsigned long mask;
148
149	if (cmd == NAND_CMD_NONE)
150		return;
151
152	mask = (ctrl & NAND_CLE) ? 0x02 : 0;
153	if (ctrl & NAND_ALE)
154		mask |= 0x04;
155	writeb(cmd, (unsigned long)this->IO_ADDR_W | mask);
156}
157
158#define P2_NAND_RB_GPIO_PIN	62
159
160static int nand_dev_ready(struct mtd_info *mtd)
161{
162	return gpio_get_value(P2_NAND_RB_GPIO_PIN);
163}
164
165static const char *part_probes[] = { "cmdlinepart", NULL };
166
167static struct platform_nand_data nand_data = {
168	.chip	= {
169		.nr_chips		= 1,
170		.chip_offset		= 0,
171		.options		= NAND_SAMSUNG_LP_OPTIONS,
172		.part_probe_types	= part_probes,
173	},
174	.ctrl	= {
175		.cmd_ctrl	= nand_cmd_ctl,
176		.dev_ready	= nand_dev_ready,
177	},
178};
179
180static struct resource nand_resource = {
181	.start		= OMAP_CS3_PHYS,
182	.end		= OMAP_CS3_PHYS + SZ_4K - 1,
183	.flags		= IORESOURCE_MEM,
184};
185
186static struct platform_device nand_device = {
187	.name		= "gen_nand",
188	.id		= 0,
189	.dev		= {
190		.platform_data	= &nand_data,
191	},
192	.num_resources	= 1,
193	.resource	= &nand_resource,
194};
195
196static struct platform_device smc91x_device = {
197	.name		= "smc91x",
198	.id		= 0,
199	.dev	= {
200		.platform_data	= &smc91x_info,
201	},
202	.num_resources	= ARRAY_SIZE(smc91x_resources),
203	.resource	= smc91x_resources,
204};
205
206static struct resource kp_resources[] = {
207	[0] = {
208		.start	= INT_7XX_MPUIO_KEYPAD,
209		.end	= INT_7XX_MPUIO_KEYPAD,
210		.flags	= IORESOURCE_IRQ,
211	},
212};
213
214static struct omap_kp_platform_data kp_data = {
215	.rows		= 8,
216	.cols		= 8,
217	.keymap		= p2_keymap,
218	.keymapsize	= ARRAY_SIZE(p2_keymap),
219	.delay		= 4,
220	.dbounce	= 1,
221};
222
223static struct platform_device kp_device = {
224	.name		= "omap-keypad",
225	.id		= -1,
226	.dev		= {
227		.platform_data = &kp_data,
228	},
229	.num_resources	= ARRAY_SIZE(kp_resources),
230	.resource	= kp_resources,
231};
232
233static struct platform_device lcd_device = {
234	.name		= "lcd_p2",
235	.id		= -1,
236};
237
238static struct platform_device *devices[] __initdata = {
239	&nor_device,
240	&nand_device,
241	&smc91x_device,
242	&kp_device,
243	&lcd_device,
244};
245
246static struct omap_lcd_config perseus2_lcd_config __initdata = {
247	.ctrl_name	= "internal",
248};
249
250static struct omap_board_config_kernel perseus2_config[] __initdata = {
251	{ OMAP_TAG_LCD,		&perseus2_lcd_config },
252};
253
254static void __init omap_perseus2_init(void)
255{
256	if (gpio_request(P2_NAND_RB_GPIO_PIN, "NAND ready") < 0)
257		BUG();
258	gpio_direction_input(P2_NAND_RB_GPIO_PIN);
259
260	omap_cfg_reg(L3_1610_FLASH_CS2B_OE);
261	omap_cfg_reg(M8_1610_FLASH_CS2B_WE);
262
263	platform_add_devices(devices, ARRAY_SIZE(devices));
264
265	omap_board_config = perseus2_config;
266	omap_board_config_size = ARRAY_SIZE(perseus2_config);
267	omap_serial_init();
268	omap_register_i2c_bus(1, 100, NULL, 0);
269}
270
271static void __init perseus2_init_smc91x(void)
272{
273	fpga_write(1, H2P2_DBG_FPGA_LAN_RESET);
274	mdelay(50);
275	fpga_write(fpga_read(H2P2_DBG_FPGA_LAN_RESET) & ~1,
276		   H2P2_DBG_FPGA_LAN_RESET);
277	mdelay(50);
278}
279
280static void __init omap_perseus2_init_irq(void)
281{
282	omap1_init_common_hw();
283	omap_init_irq();
284	omap_gpio_init();
285	perseus2_init_smc91x();
286}
287/* Only FPGA needs to be mapped here. All others are done with ioremap */
288static struct map_desc omap_perseus2_io_desc[] __initdata = {
289	{
290		.virtual	= H2P2_DBG_FPGA_BASE,
291		.pfn		= __phys_to_pfn(H2P2_DBG_FPGA_START),
292		.length		= H2P2_DBG_FPGA_SIZE,
293		.type		= MT_DEVICE
294	}
295};
296
297static void __init omap_perseus2_map_io(void)
298{
299	omap1_map_common_io();
300	iotable_init(omap_perseus2_io_desc,
301		     ARRAY_SIZE(omap_perseus2_io_desc));
302
303	/* Early, board-dependent init */
304
305	/*
306	 * Hold GSM Reset until needed
307	 */
308	omap_writew(omap_readw(OMAP7XX_DSP_M_CTL) & ~1, OMAP7XX_DSP_M_CTL);
309
310	/*
311	 * UARTs -> done automagically by 8250 driver
312	 */
313
314	/*
315	 * CSx timings, GPIO Mux ... setup
316	 */
317
318	/* Flash: CS0 timings setup */
319	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_0);
320	omap_writel(0x00000088, OMAP7XX_FLASH_ACFG_0);
321
322	/*
323	 * Ethernet support through the debug board
324	 * CS1 timings setup
325	 */
326	omap_writel(0x0000fff3, OMAP7XX_FLASH_CFG_1);
327	omap_writel(0x00000000, OMAP7XX_FLASH_ACFG_1);
328
329	/*
330	 * Configure MPU_EXT_NIRQ IO in IO_CONF9 register,
331	 * It is used as the Ethernet controller interrupt
332	 */
333	omap_writel(omap_readl(OMAP7XX_IO_CONF_9) & 0x1FFFFFFF, OMAP7XX_IO_CONF_9);
334}
335
336MACHINE_START(OMAP_PERSEUS2, "OMAP730 Perseus2")
337	/* Maintainer: Kevin Hilman <kjh@hilman.org> */
338	.phys_io	= 0xfff00000,
339	.io_pg_offst	= ((0xfef00000) >> 18) & 0xfffc,
340	.boot_params	= 0x10000100,
341	.map_io		= omap_perseus2_map_io,
342	.init_irq	= omap_perseus2_init_irq,
343	.init_machine	= omap_perseus2_init,
344	.timer		= &omap_timer,
345MACHINE_END