/arch/arm/mach-nuc93x/include/mach/regs-irq.h
C++ Header | 42 lines | 22 code | 5 blank | 15 comment | 0 complexity | 6bc58db0668e26653f41f651279541f1 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
1/*
2 * arch/arm/mach-nuc93x/include/mach/regs-irq.h
3 *
4 * Copyright (c) 2008 Nuvoton technology corporation
5 * All rights reserved.
6 *
7 * Wan ZongShun <mcuos.com@gmail.com>
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 */
15
16#ifndef ___ASM_ARCH_REGS_IRQ_H
17#define ___ASM_ARCH_REGS_IRQ_H
18
19/* Advance Interrupt Controller (AIC) Registers */
20
21#define AIC_BA NUC93X_VA_IRQ
22
23#define REG_AIC_IRQSC (AIC_BA+0x80)
24#define REG_AIC_GEN (AIC_BA+0x84)
25#define REG_AIC_GASR (AIC_BA+0x88)
26#define REG_AIC_GSCR (AIC_BA+0x8C)
27#define REG_AIC_IRSR (AIC_BA+0x100)
28#define REG_AIC_IASR (AIC_BA+0x104)
29#define REG_AIC_ISR (AIC_BA+0x108)
30#define REG_AIC_IPER (AIC_BA+0x10C)
31#define REG_AIC_ISNR (AIC_BA+0x110)
32#define REG_AIC_IMR (AIC_BA+0x114)
33#define REG_AIC_OISR (AIC_BA+0x118)
34#define REG_AIC_MECR (AIC_BA+0x120)
35#define REG_AIC_MDCR (AIC_BA+0x124)
36#define REG_AIC_SSCR (AIC_BA+0x128)
37#define REG_AIC_SCCR (AIC_BA+0x12C)
38#define REG_AIC_EOSCR (AIC_BA+0x130)
39#define AIC_IPER (0x10C)
40#define AIC_ISNR (0x110)
41
42#endif /* ___ASM_ARCH_REGS_IRQ_H */