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/arch/arm/mach-msm/include/mach/msm_bus.h

https://bitbucket.org/sammyz/iscream_thunderc-2.6.35-rebase
C++ Header | 137 lines | 59 code | 14 blank | 64 comment | 2 complexity | 03f5980ccae4c564559805eaf32dadf4 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0
  1. /* Copyright (c) 2010, Code Aurora Forum. All rights reserved.
  2. *
  3. * Redistribution and use in source and binary forms, with or without
  4. * modification, are permitted provided that the following conditions
  5. * are met:
  6. * 1. Redistributions of source code must retain the above copyright
  7. * notice, and the entire permission notice in its entirety,
  8. * including the disclaimer of warranties.
  9. * 2. Redistributions in binary form must reproduce the above copyright
  10. * notice, this list of conditions and the following disclaimer in the
  11. * documentation and/or other materials provided with the distribution.
  12. * 3. The name of the author may not be used to endorse or promote
  13. * products derived from this software without specific prior
  14. * written permission.
  15. *
  16. * ALTERNATIVELY, this product may be distributed under the terms of
  17. * the GNU General Public License, version 2, in which case the provisions
  18. * of the GPL version 2 are required INSTEAD OF the BSD license.
  19. *
  20. * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
  21. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  22. * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE, ALL OF
  23. * WHICH ARE HEREBY DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE
  24. * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
  25. * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
  26. * OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR
  27. * BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  28. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  29. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE
  30. * USE OF THIS SOFTWARE, EVEN IF NOT ADVISED OF THE POSSIBILITY OF SUCH
  31. * DAMAGE.
  32. */
  33. #ifndef _ARCH_ARM_MACH_MSM_BUS_H
  34. #define _ARCH_ARM_MACH_MSM_BUS_H
  35. #include <linux/types.h>
  36. #include <linux/input.h>
  37. /*
  38. * Macros for clients to convert their data to ib and ab
  39. * Ws : Time window over which to transfer the data in SECONDS
  40. * Bs : Size of the data block in bytes
  41. * Per : Recurrence period
  42. * Tb : Throughput bandwidth to prevent stalling
  43. * R : Ratio of actual bandwidth used to Tb
  44. * Ib : Instantaneous bandwidth
  45. * Ab : Arbitrated bandwidth
  46. *
  47. * IB_RECURRBLOCK and AB_RECURRBLOCK:
  48. * These are used if the requirement is to transfer a
  49. * recurring block of data over a known time window.
  50. *
  51. * IB_THROUGHPUTBW and AB_THROUGHPUTBW:
  52. * These are used for CPU style masters. Here the requirement
  53. * is to have minimum throughput bandwidth available to avoid
  54. * stalling.
  55. */
  56. #define IB_RECURRBLOCK(Ws, Bs) ((Ws) == 0 ? 0 : ((Bs)/(Ws)))
  57. #define AB_RECURRBLOCK(Ws, Per) ((Ws) == 0 ? 0 : ((Bs)/(Per)))
  58. #define IB_THROUGHPUTBW(Tb) (Tb)
  59. #define AB_THROUGHPUTBW(Tb, R) ((Tb) * (R))
  60. struct msm_bus_node_info {
  61. unsigned int id;
  62. int gateway;
  63. int masterp;
  64. int slavep;
  65. int tier;
  66. int ahb;
  67. const char *slaveclk;
  68. const char *a_slaveclk;
  69. const char *memclk;
  70. unsigned int buswidth;
  71. };
  72. struct msm_bus_vectors {
  73. int src; /* Master */
  74. int dst; /* Slave */
  75. unsigned int ab; /* Arbitrated bandwidth */
  76. unsigned int ib; /* Instantaneous bandwidth */
  77. };
  78. struct msm_bus_paths {
  79. int num_paths;
  80. struct msm_bus_vectors *vectors;
  81. };
  82. struct msm_bus_scale_pdata {
  83. struct msm_bus_paths *usecase;
  84. int num_usecases;
  85. const char *name;
  86. /*
  87. * If the active_only flag is set to 1, the BW request is applied
  88. * only when at least one CPU is active (powered on). If the flag
  89. * is set to 0, then the BW request is always applied irrespective
  90. * of the CPU state.
  91. */
  92. unsigned int active_only;
  93. };
  94. /* Scaling APIs */
  95. /*
  96. * This function returns a handle to the client. This should be used to
  97. * call msm_bus_scale_client_update_request.
  98. * The function returns 0 if bus driver is unable to register a client
  99. */
  100. #ifdef CONFIG_MSM_BUS_SCALING
  101. uint32_t msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata);
  102. int msm_bus_scale_client_update_request(uint32_t cl, unsigned int index);
  103. void msm_bus_scale_unregister_client(uint32_t cl);
  104. #else
  105. static inline uint32_t
  106. msm_bus_scale_register_client(struct msm_bus_scale_pdata *pdata)
  107. {
  108. return 1;
  109. }
  110. static inline int
  111. msm_bus_scale_client_update_request(uint32_t cl, unsigned int index)
  112. {
  113. return 0;
  114. }
  115. static inline void
  116. msm_bus_scale_unregister_client(uint32_t cl)
  117. {
  118. }
  119. #endif
  120. /* AXI Port configuration APIs */
  121. int msm_bus_axi_porthalt(int master_port);
  122. int msm_bus_axi_portunhalt(int master_port);
  123. #endif /*_ARCH_ARM_MACH_MSM_BUS_H*/