/arch/arm/mach-fsm/jtag-v7.S

  1/* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
  2 *
  3 * This program is free software; you can redistribute it and/or modify
  4 * it under the terms of the GNU General Public License version 2 and
  5 * only version 2 as published by the Free Software Foundation.
  6 *
  7 * This program is distributed in the hope that it will be useful,
  8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 10 * GNU General Public License for more details.
 11 *
 12 * You should have received a copy of the GNU General Public License
 13 * along with this program; if not, write to the Free Software
 14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
 15 * 02110-1301, USA.
 16 *
 17 */
 18
 19/*
 20 * JTAG support functions for ARMv7-based Qualcomm SoCs.
 21 */
 22#include <linux/linkage.h>
 23#include <asm/assembler.h>
 24
 25ENTRY(msm_save_jtag_debug)
 26	/* lock debug and preserve registers through power collapse */
 27	ldr     r3, =dbg_state        /* store state at dbg_state */
 28
 29	ldr     r1, =0xc5ACCE55       /* set DBGOSLAR lock */
 30	mcr     p14,0,r1,c1,c0,4
 31	isb
 32
 33	mrc     p14,0,r1,c1,c2,4      /* DBGOSSRR state register count */
 34
 35	cmp     r1, #(0x20-1)         /* check for state overflow */
 36	movge   r1, #0                /* if not enough space, don't save */
 37
 38	str     r1,[r3],#4            /* save count for restore */
 39
 401:	cmp     r1,#0
 41	mrcne   p14,0,r2,c1,c2,4      /* DBGOSSRR state value */
 42	strne   r2,[r3],#4            /* push value */
 43	subne   r1,r1,#1
 44	bne     1b
 45
 46	/* unlock JTAG.  Works better than leaving locked. */
 47	stmfd   sp!, {lr}
 48	bl      msm_unlock_jtag_debug
 49	ldmfd   sp!, {lr}
 50	bx      lr
 51
 52ENTRY(msm_unlock_jtag_debug)
 53	mov     r0, #0                /* unlock value */
 54	mcr     p14,0,r0,c1,c0,4      /* unlock DBGOSLAR */
 55	isb
 56	bx      lr
 57
 58ENTRY(msm_restore_jtag_debug)
 59	/* restore debug registers after power collapse  */
 60	ldr     r3, =dbg_state        /* load state from dbg_state */
 61
 62	ldr     r1, =0xc5ACCE55       /* set DBGOSLAR lock */
 63	mcr     p14,0,r1,c1,c0,4
 64	isb
 65
 66	mrc     p14,0,r1,c1,c2,4      /* DBGOSSRR dummy read (required)*/
 67	ldr     r1,[r3],#4            /* load saved count */
 68	cmp     r1,#0                 /* skip if none stored
 69	beq     msm_pm_dbg_restore_end
 70
 71	/* restores debug state except DBGDSCR */
 721:	ldr     r2,[r3],#4
 73	cmp     r1,#0x10              /* DBGDSCR special case */
 74	biceq   r2,r2,#0xc000         /* DBGDSCR = DBGDSCR & ~0xc000 */
 75	mcr     p14,0,r2,c1,c2,4      /* DBGOSSRR write state value */
 76	subs    r1,r1,#1
 77	bne     1b
 78	isb
 79
 80	/* second loop to restore DBGDSCR after other state restored */
 81	ldr     r3, =dbg_state        /* load state from dbg_state */
 82
 83	ldr     r1, =0xc5ACCE55       /* set DBGOSLAR lock */
 84	mcr     p14,0,r1,c1,c0,4
 85	isb
 86
 87	mrc     p14,0,r1,c1,c5,4      /* clear sticky power down bit */
 88	isb
 89
 90	mrc     p14,0,r1,c1,c2,4      /* DBGOSSRR dummy read (required)*/
 91	ldr     r1,[r3],#4            /* load saved count */
 92
 931:	ldr     r2,[r3],#4
 94	mcr     p14,0,r2,c1,c2,4      /* DBGOSSRR write state value */
 95	subs    r1,r1,#1
 96	bne     1b
 97msm_pm_dbg_restore_end:
 98	mcr     p14,0,r1,c1,c0,4      /* unlock DBGOSLAR */
 99	isb
100	bx      lr
101
102
103	.data
104
105dbg_state:
106	.space  4 * 0x20
107