/arch/arm/mach-fsm/jtag-v7.S

https://bitbucket.org/sammyz/iscream_thunderc-2.6.35-rebase · Assembly · 107 lines · 59 code · 21 blank · 27 comment · 0 complexity · 2579aeb4de1dfe6f6962871c2fe1e850 MD5 · raw file

  1. /* Copyright (c) 2009, Code Aurora Forum. All rights reserved.
  2. *
  3. * This program is free software; you can redistribute it and/or modify
  4. * it under the terms of the GNU General Public License version 2 and
  5. * only version 2 as published by the Free Software Foundation.
  6. *
  7. * This program is distributed in the hope that it will be useful,
  8. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  9. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  10. * GNU General Public License for more details.
  11. *
  12. * You should have received a copy of the GNU General Public License
  13. * along with this program; if not, write to the Free Software
  14. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
  15. * 02110-1301, USA.
  16. *
  17. */
  18. /*
  19. * JTAG support functions for ARMv7-based Qualcomm SoCs.
  20. */
  21. #include <linux/linkage.h>
  22. #include <asm/assembler.h>
  23. ENTRY(msm_save_jtag_debug)
  24. /* lock debug and preserve registers through power collapse */
  25. ldr r3, =dbg_state /* store state at dbg_state */
  26. ldr r1, =0xc5ACCE55 /* set DBGOSLAR lock */
  27. mcr p14,0,r1,c1,c0,4
  28. isb
  29. mrc p14,0,r1,c1,c2,4 /* DBGOSSRR state register count */
  30. cmp r1, #(0x20-1) /* check for state overflow */
  31. movge r1, #0 /* if not enough space, don't save */
  32. str r1,[r3],#4 /* save count for restore */
  33. 1: cmp r1,#0
  34. mrcne p14,0,r2,c1,c2,4 /* DBGOSSRR state value */
  35. strne r2,[r3],#4 /* push value */
  36. subne r1,r1,#1
  37. bne 1b
  38. /* unlock JTAG. Works better than leaving locked. */
  39. stmfd sp!, {lr}
  40. bl msm_unlock_jtag_debug
  41. ldmfd sp!, {lr}
  42. bx lr
  43. ENTRY(msm_unlock_jtag_debug)
  44. mov r0, #0 /* unlock value */
  45. mcr p14,0,r0,c1,c0,4 /* unlock DBGOSLAR */
  46. isb
  47. bx lr
  48. ENTRY(msm_restore_jtag_debug)
  49. /* restore debug registers after power collapse */
  50. ldr r3, =dbg_state /* load state from dbg_state */
  51. ldr r1, =0xc5ACCE55 /* set DBGOSLAR lock */
  52. mcr p14,0,r1,c1,c0,4
  53. isb
  54. mrc p14,0,r1,c1,c2,4 /* DBGOSSRR dummy read (required)*/
  55. ldr r1,[r3],#4 /* load saved count */
  56. cmp r1,#0 /* skip if none stored
  57. beq msm_pm_dbg_restore_end
  58. /* restores debug state except DBGDSCR */
  59. 1: ldr r2,[r3],#4
  60. cmp r1,#0x10 /* DBGDSCR special case */
  61. biceq r2,r2,#0xc000 /* DBGDSCR = DBGDSCR & ~0xc000 */
  62. mcr p14,0,r2,c1,c2,4 /* DBGOSSRR write state value */
  63. subs r1,r1,#1
  64. bne 1b
  65. isb
  66. /* second loop to restore DBGDSCR after other state restored */
  67. ldr r3, =dbg_state /* load state from dbg_state */
  68. ldr r1, =0xc5ACCE55 /* set DBGOSLAR lock */
  69. mcr p14,0,r1,c1,c0,4
  70. isb
  71. mrc p14,0,r1,c1,c5,4 /* clear sticky power down bit */
  72. isb
  73. mrc p14,0,r1,c1,c2,4 /* DBGOSSRR dummy read (required)*/
  74. ldr r1,[r3],#4 /* load saved count */
  75. 1: ldr r2,[r3],#4
  76. mcr p14,0,r2,c1,c2,4 /* DBGOSSRR write state value */
  77. subs r1,r1,#1
  78. bne 1b
  79. msm_pm_dbg_restore_end:
  80. mcr p14,0,r1,c1,c0,4 /* unlock DBGOSLAR */
  81. isb
  82. bx lr
  83. .data
  84. dbg_state:
  85. .space 4 * 0x20