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/arch/arm/mach-footbridge/include/mach/system.h

https://bitbucket.org/sammyz/iscream_thunderc-2.6.35-rebase
C++ Header | 69 lines | 33 code | 5 blank | 31 comment | 5 complexity | 83da8a57d0d0e576906dfbf219c55961 MD5 | raw file
Possible License(s): GPL-2.0, LGPL-2.0, AGPL-1.0 
    

  1. /*
    2. 

  2.  *  arch/arm/mach-footbridge/include/mach/system.h
    3. 

  3.  *
    4. 

  4.  *  Copyright (C) 1996-1999 Russell King.
    5. 

  5.  *
    6. 

  6.  * This program is free software; you can redistribute it and/or modify
    7. 

  7.  * it under the terms of the GNU General Public License version 2 as
    8. 

  8.  * published by the Free Software Foundation.
    9. 

  9.  */
    10. 

  10. #include <linux/io.h>
    11. 

  11. #include <asm/hardware/dec21285.h>
    12. 

  12. #include <mach/hardware.h>
    13. 

  13. #include <asm/leds.h>
    14. 

  14. #include <asm/mach-types.h>
    15. 

  15. 

  16. static inline void arch_idle(void)
    17. 

  17. {
    18. 

  18. 	cpu_do_idle();
    19. 

  19. }
    20. 

  20. 

  21. static inline void arch_reset(char mode, const char *cmd)
    22. 

  22. {
    23. 

  23. 	if (mode == 's') {
    24. 

  24. 		/*
    25. 

  25. 		 * Jump into the ROM
    26. 

  26. 		 */
    27. 

  27. 		cpu_reset(0x41000000);
    28. 

  28. 	} else {
    29. 

  29. 		if (machine_is_netwinder()) {
    30. 

  30. 			/* open up the SuperIO chip
    31. 

  31. 			 */
    32. 

  32. 			outb(0x87, 0x370);
    33. 

  33. 			outb(0x87, 0x370);
    34. 

  34. 

  35. 			/* aux function group 1 (logical device 7)
    36. 

  36. 			 */
    37. 

  37. 			outb(0x07, 0x370);
    38. 

  38. 			outb(0x07, 0x371);
    39. 

  39. 

  40. 			/* set GP16 for WD-TIMER output
    41. 

  41. 			 */
    42. 

  42. 			outb(0xe6, 0x370);
    43. 

  43. 			outb(0x00, 0x371);
    44. 

  44. 

  45. 			/* set a RED LED and toggle WD_TIMER for rebooting
    46. 

  46. 			 */
    47. 

  47. 			outb(0xc4, 0x338);
    48. 

  48. 		} else {
    49. 

  49. 			/* 
    50. 

  50. 			 * Force the watchdog to do a CPU reset.
    51. 

  51. 			 *
    52. 

  52. 			 * After making sure that the watchdog is disabled
    53. 

  53. 			 * (so we can change the timer registers) we first
    54. 

  54. 			 * enable the timer to autoreload itself.  Next, the
    55. 

  55. 			 * timer interval is set really short and any
    56. 

  56. 			 * current interrupt request is cleared (so we can
    57. 

  57. 			 * see an edge transition).  Finally, TIMER4 is
    58. 

  58. 			 * enabled as the watchdog.
    59. 

  59. 			 */
    60. 

  60. 			*CSR_SA110_CNTL &= ~(1 << 13);
    61. 

  61. 			*CSR_TIMER4_CNTL = TIMER_CNTL_ENABLE |
    62. 

  62. 					   TIMER_CNTL_AUTORELOAD |
    63. 

  63. 					   TIMER_CNTL_DIV16;
    64. 

  64. 			*CSR_TIMER4_LOAD = 0x2;
    65. 

  65. 			*CSR_TIMER4_CLR  = 0;
    66. 

  66. 			*CSR_SA110_CNTL |= (1 << 13);
    67. 

  67. 		}
    68. 

  68. 	}
    69. 

  69. }
    70. 

  70.