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/include/linux/mfd/tps6586x.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C Header | 132 lines | 110 code | 16 blank | 6 comment | 0 complexity | 05df38214499155a8dec295a70db14fe MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1#ifndef __LINUX_MFD_TPS6586X_H
  2#define __LINUX_MFD_TPS6586X_H
  3
  4#define SM0_PWM_BIT 0
  5#define SM1_PWM_BIT 1
  6#define SM2_PWM_BIT 2
  7
  8enum {
  9	TPS6586X_ID_SM_0,
 10	TPS6586X_ID_SM_1,
 11	TPS6586X_ID_SM_2,
 12	TPS6586X_ID_LDO_0,
 13	TPS6586X_ID_LDO_1,
 14	TPS6586X_ID_LDO_2,
 15	TPS6586X_ID_LDO_3,
 16	TPS6586X_ID_LDO_4,
 17	TPS6586X_ID_LDO_5,
 18	TPS6586X_ID_LDO_6,
 19	TPS6586X_ID_LDO_7,
 20	TPS6586X_ID_LDO_8,
 21	TPS6586X_ID_LDO_9,
 22	TPS6586X_ID_LDO_RTC,
 23};
 24
 25enum {
 26	TPS6586X_INT_PLDO_0,
 27	TPS6586X_INT_PLDO_1,
 28	TPS6586X_INT_PLDO_2,
 29	TPS6586X_INT_PLDO_3,
 30	TPS6586X_INT_PLDO_4,
 31	TPS6586X_INT_PLDO_5,
 32	TPS6586X_INT_PLDO_6,
 33	TPS6586X_INT_PLDO_7,
 34	TPS6586X_INT_COMP_DET,
 35	TPS6586X_INT_ADC,
 36	TPS6586X_INT_PLDO_8,
 37	TPS6586X_INT_PLDO_9,
 38	TPS6586X_INT_PSM_0,
 39	TPS6586X_INT_PSM_1,
 40	TPS6586X_INT_PSM_2,
 41	TPS6586X_INT_PSM_3,
 42	TPS6586X_INT_RTC_ALM1,
 43	TPS6586X_INT_ACUSB_OVP,
 44	TPS6586X_INT_USB_DET,
 45	TPS6586X_INT_AC_DET,
 46	TPS6586X_INT_BAT_DET,
 47	TPS6586X_INT_CHG_STAT,
 48	TPS6586X_INT_CHG_TEMP,
 49	TPS6586X_INT_PP,
 50	TPS6586X_INT_RESUME,
 51	TPS6586X_INT_LOW_SYS,
 52	TPS6586X_INT_RTC_ALM2,
 53};
 54
 55enum pwm_pfm_mode {
 56	PWM_ONLY,
 57	AUTO_PWM_PFM,
 58	PWM_DEFAULT_VALUE,
 59
 60};
 61
 62enum slew_rate_settings {
 63	SLEW_RATE_INSTANTLY = 0,
 64	SLEW_RATE_0110UV_PER_SEC = 0x1,
 65	SLEW_RATE_0220UV_PER_SEC = 0x2,
 66	SLEW_RATE_0440UV_PER_SEC = 0x3,
 67	SLEW_RATE_0880UV_PER_SEC = 0x4,
 68	SLEW_RATE_1760UV_PER_SEC = 0x5,
 69	SLEW_RATE_3520UV_PER_SEC = 0x6,
 70	SLEW_RATE_7040UV_PER_SEC = 0x7,
 71	SLEW_RATE_DEFAULT_VALUE,
 72};
 73
 74struct tps6586x_settings {
 75	/* SM0, SM1 and SM2 have PWM-only and auto PWM/PFM mode */
 76	enum pwm_pfm_mode sm_pwm_mode;
 77	/* SM0 and SM1 have slew rate settings */
 78	enum slew_rate_settings slew_rate;
 79};
 80
 81enum {
 82	TPS6586X_RTC_CL_SEL_1_5PF  = 0x0,
 83	TPS6586X_RTC_CL_SEL_6_5PF  = 0x1,
 84	TPS6586X_RTC_CL_SEL_7_5PF  = 0x2,
 85	TPS6586X_RTC_CL_SEL_12_5PF = 0x3,
 86};
 87
 88struct tps6586x_subdev_info {
 89	int		id;
 90	const char	*name;
 91	void		*platform_data;
 92};
 93
 94struct tps6586x_epoch_start {
 95	int year;
 96	int month;
 97	int day;
 98	int hour;
 99	int min;
100	int sec;
101};
102
103struct tps6586x_rtc_platform_data {
104	int irq;
105	struct tps6586x_epoch_start start;
106	int cl_sel; /* internal XTAL capacitance, see TPS6586X_RTC_CL_SEL* */
107};
108
109struct tps6586x_platform_data {
110	int num_subdevs;
111	struct tps6586x_subdev_info *subdevs;
112
113	int gpio_base;
114	int irq_base;
115
116	bool use_power_off;
117};
118
119/*
120 * NOTE: the functions below are not intended for use outside
121 * of the TPS6586X sub-device drivers
122 */
123extern int tps6586x_write(struct device *dev, int reg, uint8_t val);
124extern int tps6586x_writes(struct device *dev, int reg, int len, uint8_t *val);
125extern int tps6586x_read(struct device *dev, int reg, uint8_t *val);
126extern int tps6586x_reads(struct device *dev, int reg, int len, uint8_t *val);
127extern int tps6586x_set_bits(struct device *dev, int reg, uint8_t bit_mask);
128extern int tps6586x_clr_bits(struct device *dev, int reg, uint8_t bit_mask);
129extern int tps6586x_update(struct device *dev, int reg, uint8_t val,
130			   uint8_t mask);
131
132#endif /*__LINUX_MFD_TPS6586X_H */