/include/linux/mfd/ab8500/sysctrl.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C Header · 254 lines · 203 code · 44 blank · 7 comment · 0 complexity · 6821f05c8e02c134cd33f6e63d44727a MD5 · raw file

  1. /*
  2. * Copyright (C) ST-Ericsson SA 2010
  3. * Author: Mattias Nilsson <mattias.i.nilsson@stericsson.com> for ST Ericsson.
  4. * License terms: GNU General Public License (GPL) version 2
  5. */
  6. #ifndef __AB8500_SYSCTRL_H
  7. #define __AB8500_SYSCTRL_H
  8. #include <linux/bitops.h>
  9. #ifdef CONFIG_AB8500_CORE
  10. int ab8500_sysctrl_read(u16 reg, u8 *value);
  11. int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value);
  12. #else
  13. static inline int ab8500_sysctrl_read(u16 reg, u8 *value)
  14. {
  15. return 0;
  16. }
  17. static inline int ab8500_sysctrl_write(u16 reg, u8 mask, u8 value)
  18. {
  19. return 0;
  20. }
  21. #endif /* CONFIG_AB8500_CORE */
  22. static inline int ab8500_sysctrl_set(u16 reg, u8 bits)
  23. {
  24. return ab8500_sysctrl_write(reg, bits, bits);
  25. }
  26. static inline int ab8500_sysctrl_clear(u16 reg, u8 bits)
  27. {
  28. return ab8500_sysctrl_write(reg, bits, 0);
  29. }
  30. /* Registers */
  31. #define AB8500_TURNONSTATUS 0x100
  32. #define AB8500_RESETSTATUS 0x101
  33. #define AB8500_PONKEY1PRESSSTATUS 0x102
  34. #define AB8500_SYSCLKREQSTATUS 0x142
  35. #define AB8500_STW4500CTRL1 0x180
  36. #define AB8500_STW4500CTRL2 0x181
  37. #define AB8500_STW4500CTRL3 0x200
  38. #define AB8500_MAINWDOGCTRL 0x201
  39. #define AB8500_MAINWDOGTIMER 0x202
  40. #define AB8500_LOWBAT 0x203
  41. #define AB8500_BATTOK 0x204
  42. #define AB8500_SYSCLKTIMER 0x205
  43. #define AB8500_SMPSCLKCTRL 0x206
  44. #define AB8500_SMPSCLKSEL1 0x207
  45. #define AB8500_SMPSCLKSEL2 0x208
  46. #define AB8500_SMPSCLKSEL3 0x209
  47. #define AB8500_SYSULPCLKCONF 0x20A
  48. #define AB8500_SYSULPCLKCTRL1 0x20B
  49. #define AB8500_SYSCLKCTRL 0x20C
  50. #define AB8500_SYSCLKREQ1VALID 0x20D
  51. #define AB8500_SYSTEMCTRLSUP 0x20F
  52. #define AB8500_SYSCLKREQ1RFCLKBUF 0x210
  53. #define AB8500_SYSCLKREQ2RFCLKBUF 0x211
  54. #define AB8500_SYSCLKREQ3RFCLKBUF 0x212
  55. #define AB8500_SYSCLKREQ4RFCLKBUF 0x213
  56. #define AB8500_SYSCLKREQ5RFCLKBUF 0x214
  57. #define AB8500_SYSCLKREQ6RFCLKBUF 0x215
  58. #define AB8500_SYSCLKREQ7RFCLKBUF 0x216
  59. #define AB8500_SYSCLKREQ8RFCLKBUF 0x217
  60. #define AB8500_DITHERCLKCTRL 0x220
  61. #define AB8500_SWATCTRL 0x230
  62. #define AB8500_HIQCLKCTRL 0x232
  63. #define AB8500_VSIMSYSCLKCTRL 0x233
  64. /* Bits */
  65. #define AB8500_TURNONSTATUS_PORNVBAT BIT(0)
  66. #define AB8500_TURNONSTATUS_PONKEY1DBF BIT(1)
  67. #define AB8500_TURNONSTATUS_PONKEY2DBF BIT(2)
  68. #define AB8500_TURNONSTATUS_RTCALARM BIT(3)
  69. #define AB8500_TURNONSTATUS_MAINCHDET BIT(4)
  70. #define AB8500_TURNONSTATUS_VBUSDET BIT(5)
  71. #define AB8500_TURNONSTATUS_USBIDDETECT BIT(6)
  72. #define AB8500_RESETSTATUS_RESETN4500NSTATUS BIT(0)
  73. #define AB8500_RESETSTATUS_SWRESETN4500NSTATUS BIT(2)
  74. #define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_MASK 0x7F
  75. #define AB8500_PONKEY1PRESSSTATUS_PONKEY1PRESSTIME_SHIFT 0
  76. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ1STATUS BIT(0)
  77. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ2STATUS BIT(1)
  78. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ3STATUS BIT(2)
  79. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ4STATUS BIT(3)
  80. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ5STATUS BIT(4)
  81. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ6STATUS BIT(5)
  82. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ7STATUS BIT(6)
  83. #define AB8500_SYSCLKREQSTATUS_SYSCLKREQ8STATUS BIT(7)
  84. #define AB8500_STW4500CTRL1_SWOFF BIT(0)
  85. #define AB8500_STW4500CTRL1_SWRESET4500N BIT(1)
  86. #define AB8500_STW4500CTRL1_THDB8500SWOFF BIT(2)
  87. #define AB8500_STW4500CTRL2_RESETNVAUX1VALID BIT(0)
  88. #define AB8500_STW4500CTRL2_RESETNVAUX2VALID BIT(1)
  89. #define AB8500_STW4500CTRL2_RESETNVAUX3VALID BIT(2)
  90. #define AB8500_STW4500CTRL2_RESETNVMODVALID BIT(3)
  91. #define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY1VALID BIT(4)
  92. #define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY2VALID BIT(5)
  93. #define AB8500_STW4500CTRL2_RESETNVEXTSUPPLY3VALID BIT(6)
  94. #define AB8500_STW4500CTRL2_RESETNVSMPS1VALID BIT(7)
  95. #define AB8500_STW4500CTRL3_CLK32KOUT2DIS BIT(0)
  96. #define AB8500_STW4500CTRL3_RESETAUDN BIT(1)
  97. #define AB8500_STW4500CTRL3_RESETDENCN BIT(2)
  98. #define AB8500_STW4500CTRL3_THSDENA BIT(3)
  99. #define AB8500_MAINWDOGCTRL_MAINWDOGENA BIT(0)
  100. #define AB8500_MAINWDOGCTRL_MAINWDOGKICK BIT(1)
  101. #define AB8500_MAINWDOGCTRL_WDEXPTURNONVALID BIT(4)
  102. #define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_MASK 0x7F
  103. #define AB8500_MAINWDOGTIMER_MAINWDOGTIMER_SHIFT 0
  104. #define AB8500_LOWBAT_LOWBATENA BIT(0)
  105. #define AB8500_LOWBAT_LOWBAT_MASK 0x7E
  106. #define AB8500_LOWBAT_LOWBAT_SHIFT 1
  107. #define AB8500_BATTOK_BATTOKSEL0THF_MASK 0x0F
  108. #define AB8500_BATTOK_BATTOKSEL0THF_SHIFT 0
  109. #define AB8500_BATTOK_BATTOKSEL1THF_MASK 0xF0
  110. #define AB8500_BATTOK_BATTOKSEL1THF_SHIFT 4
  111. #define AB8500_SYSCLKTIMER_SYSCLKTIMER_MASK 0x0F
  112. #define AB8500_SYSCLKTIMER_SYSCLKTIMER_SHIFT 0
  113. #define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_MASK 0xF0
  114. #define AB8500_SYSCLKTIMER_SYSCLKTIMERADJ_SHIFT 4
  115. #define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_MASK 0x03
  116. #define AB8500_SMPSCLKCTRL_SMPSCLKINTSEL_SHIFT 0
  117. #define AB8500_SMPSCLKCTRL_3M2CLKINTENA BIT(2)
  118. #define AB8500_SMPSCLKSEL1_VARMCLKSEL_MASK 0x07
  119. #define AB8500_SMPSCLKSEL1_VARMCLKSEL_SHIFT 0
  120. #define AB8500_SMPSCLKSEL1_VAPECLKSEL_MASK 0x38
  121. #define AB8500_SMPSCLKSEL1_VAPECLKSEL_SHIFT 3
  122. #define AB8500_SMPSCLKSEL2_VMODCLKSEL_MASK 0x07
  123. #define AB8500_SMPSCLKSEL2_VMODCLKSEL_SHIFT 0
  124. #define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_MASK 0x38
  125. #define AB8500_SMPSCLKSEL2_VSMPS1CLKSEL_SHIFT 3
  126. #define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_MASK 0x07
  127. #define AB8500_SMPSCLKSEL3_VSMPS2CLKSEL_SHIFT 0
  128. #define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_MASK 0x38
  129. #define AB8500_SMPSCLKSEL3_VSMPS3CLKSEL_SHIFT 3
  130. #define AB8500_SYSULPCLKCONF_ULPCLKCONF_MASK 0x03
  131. #define AB8500_SYSULPCLKCONF_ULPCLKCONF_SHIFT 0
  132. #define AB8500_SYSULPCLKCONF_CLK27MHZSTRE BIT(2)
  133. #define AB8500_SYSULPCLKCONF_TVOUTCLKDELN BIT(3)
  134. #define AB8500_SYSULPCLKCONF_TVOUTCLKINV BIT(4)
  135. #define AB8500_SYSULPCLKCONF_ULPCLKSTRE BIT(5)
  136. #define AB8500_SYSULPCLKCONF_CLK27MHZBUFENA BIT(6)
  137. #define AB8500_SYSULPCLKCONF_CLK27MHZPDENA BIT(7)
  138. #define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_MASK 0x03
  139. #define AB8500_SYSULPCLKCTRL1_SYSULPCLKINTSEL_SHIFT 0
  140. #define AB8500_SYSULPCLKCTRL1_ULPCLKREQ BIT(2)
  141. #define AB8500_SYSULPCLKCTRL1_4500SYSCLKREQ BIT(3)
  142. #define AB8500_SYSULPCLKCTRL1_AUDIOCLKENA BIT(4)
  143. #define AB8500_SYSULPCLKCTRL1_SYSCLKBUF2REQ BIT(5)
  144. #define AB8500_SYSULPCLKCTRL1_SYSCLKBUF3REQ BIT(6)
  145. #define AB8500_SYSULPCLKCTRL1_SYSCLKBUF4REQ BIT(7)
  146. #define AB8500_SYSCLKCTRL_TVOUTPLLENA BIT(0)
  147. #define AB8500_SYSCLKCTRL_TVOUTCLKENA BIT(1)
  148. #define AB8500_SYSCLKCTRL_USBCLKENA BIT(2)
  149. #define AB8500_SYSCLKREQ1VALID_SYSCLKREQ1VALID BIT(0)
  150. #define AB8500_SYSCLKREQ1VALID_ULPCLKREQ1VALID BIT(1)
  151. #define AB8500_SYSCLKREQ1VALID_USBSYSCLKREQ1VALID BIT(2)
  152. #define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_MASK 0x03
  153. #define AB8500_SYSTEMCTRLSUP_EXTSUP12LPNCLKSEL_SHIFT 0
  154. #define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_MASK 0x0C
  155. #define AB8500_SYSTEMCTRLSUP_EXTSUP3LPNCLKSEL_SHIFT 2
  156. #define AB8500_SYSTEMCTRLSUP_INTDB8500NOD BIT(4)
  157. #define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF2 BIT(2)
  158. #define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF3 BIT(3)
  159. #define AB8500_SYSCLKREQ1RFCLKBUF_SYSCLKREQ1RFCLKBUF4 BIT(4)
  160. #define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF2 BIT(2)
  161. #define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF3 BIT(3)
  162. #define AB8500_SYSCLKREQ2RFCLKBUF_SYSCLKREQ2RFCLKBUF4 BIT(4)
  163. #define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF2 BIT(2)
  164. #define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF3 BIT(3)
  165. #define AB8500_SYSCLKREQ3RFCLKBUF_SYSCLKREQ3RFCLKBUF4 BIT(4)
  166. #define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF2 BIT(2)
  167. #define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF3 BIT(3)
  168. #define AB8500_SYSCLKREQ4RFCLKBUF_SYSCLKREQ4RFCLKBUF4 BIT(4)
  169. #define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF2 BIT(2)
  170. #define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF3 BIT(3)
  171. #define AB8500_SYSCLKREQ5RFCLKBUF_SYSCLKREQ5RFCLKBUF4 BIT(4)
  172. #define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF2 BIT(2)
  173. #define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF3 BIT(3)
  174. #define AB8500_SYSCLKREQ6RFCLKBUF_SYSCLKREQ6RFCLKBUF4 BIT(4)
  175. #define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF2 BIT(2)
  176. #define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF3 BIT(3)
  177. #define AB8500_SYSCLKREQ7RFCLKBUF_SYSCLKREQ7RFCLKBUF4 BIT(4)
  178. #define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF2 BIT(2)
  179. #define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF3 BIT(3)
  180. #define AB8500_SYSCLKREQ8RFCLKBUF_SYSCLKREQ8RFCLKBUF4 BIT(4)
  181. #define AB8500_DITHERCLKCTRL_VARMDITHERENA BIT(0)
  182. #define AB8500_DITHERCLKCTRL_VSMPS3DITHERENA BIT(1)
  183. #define AB8500_DITHERCLKCTRL_VSMPS1DITHERENA BIT(2)
  184. #define AB8500_DITHERCLKCTRL_VSMPS2DITHERENA BIT(3)
  185. #define AB8500_DITHERCLKCTRL_VMODDITHERENA BIT(4)
  186. #define AB8500_DITHERCLKCTRL_VAPEDITHERENA BIT(5)
  187. #define AB8500_DITHERCLKCTRL_DITHERDEL_MASK 0xC0
  188. #define AB8500_DITHERCLKCTRL_DITHERDEL_SHIFT 6
  189. #define AB8500_SWATCTRL_UPDATERF BIT(0)
  190. #define AB8500_SWATCTRL_SWATENABLE BIT(1)
  191. #define AB8500_SWATCTRL_RFOFFTIMER_MASK 0x1C
  192. #define AB8500_SWATCTRL_RFOFFTIMER_SHIFT 2
  193. #define AB8500_SWATCTRL_SWATBIT5 BIT(6)
  194. #define AB8500_HIQCLKCTRL_SYSCLKREQ1HIQENAVALID BIT(0)
  195. #define AB8500_HIQCLKCTRL_SYSCLKREQ2HIQENAVALID BIT(1)
  196. #define AB8500_HIQCLKCTRL_SYSCLKREQ3HIQENAVALID BIT(2)
  197. #define AB8500_HIQCLKCTRL_SYSCLKREQ4HIQENAVALID BIT(3)
  198. #define AB8500_HIQCLKCTRL_SYSCLKREQ5HIQENAVALID BIT(4)
  199. #define AB8500_HIQCLKCTRL_SYSCLKREQ6HIQENAVALID BIT(5)
  200. #define AB8500_HIQCLKCTRL_SYSCLKREQ7HIQENAVALID BIT(6)
  201. #define AB8500_HIQCLKCTRL_SYSCLKREQ8HIQENAVALID BIT(7)
  202. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ1VALID BIT(0)
  203. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ2VALID BIT(1)
  204. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ3VALID BIT(2)
  205. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ4VALID BIT(3)
  206. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ5VALID BIT(4)
  207. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ6VALID BIT(5)
  208. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ7VALID BIT(6)
  209. #define AB8500_VSIMSYSCLKCTRL_VSIMSYSCLKREQ8VALID BIT(7)
  210. #endif /* __AB8500_SYSCTRL_H */