/drivers/watchdog/sp805_wdt.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C · 390 lines · 283 code · 63 blank · 44 comment · 18 complexity · b3cb8b59c12768959e061fea34351b90 MD5 · raw file

  1. /*
  2. * drivers/char/watchdog/sp805-wdt.c
  3. *
  4. * Watchdog driver for ARM SP805 watchdog module
  5. *
  6. * Copyright (C) 2010 ST Microelectronics
  7. * Viresh Kumar<viresh.kumar@st.com>
  8. *
  9. * This file is licensed under the terms of the GNU General Public
  10. * License version 2 or later. This program is licensed "as is" without any
  11. * warranty of any kind, whether express or implied.
  12. */
  13. #include <linux/device.h>
  14. #include <linux/resource.h>
  15. #include <linux/amba/bus.h>
  16. #include <linux/bitops.h>
  17. #include <linux/clk.h>
  18. #include <linux/fs.h>
  19. #include <linux/init.h>
  20. #include <linux/io.h>
  21. #include <linux/ioport.h>
  22. #include <linux/kernel.h>
  23. #include <linux/math64.h>
  24. #include <linux/miscdevice.h>
  25. #include <linux/module.h>
  26. #include <linux/moduleparam.h>
  27. #include <linux/slab.h>
  28. #include <linux/spinlock.h>
  29. #include <linux/types.h>
  30. #include <linux/uaccess.h>
  31. #include <linux/watchdog.h>
  32. /* default timeout in seconds */
  33. #define DEFAULT_TIMEOUT 60
  34. #define MODULE_NAME "sp805-wdt"
  35. /* watchdog register offsets and masks */
  36. #define WDTLOAD 0x000
  37. #define LOAD_MIN 0x00000001
  38. #define LOAD_MAX 0xFFFFFFFF
  39. #define WDTVALUE 0x004
  40. #define WDTCONTROL 0x008
  41. /* control register masks */
  42. #define INT_ENABLE (1 << 0)
  43. #define RESET_ENABLE (1 << 1)
  44. #define WDTINTCLR 0x00C
  45. #define WDTRIS 0x010
  46. #define WDTMIS 0x014
  47. #define INT_MASK (1 << 0)
  48. #define WDTLOCK 0xC00
  49. #define UNLOCK 0x1ACCE551
  50. #define LOCK 0x00000001
  51. /**
  52. * struct sp805_wdt: sp805 wdt device structure
  53. *
  54. * lock: spin lock protecting dev structure and io access
  55. * base: base address of wdt
  56. * clk: clock structure of wdt
  57. * dev: amba device structure of wdt
  58. * status: current status of wdt
  59. * load_val: load value to be set for current timeout
  60. * timeout: current programmed timeout
  61. */
  62. struct sp805_wdt {
  63. spinlock_t lock;
  64. void __iomem *base;
  65. struct clk *clk;
  66. struct amba_device *adev;
  67. unsigned long status;
  68. #define WDT_BUSY 0
  69. #define WDT_CAN_BE_CLOSED 1
  70. unsigned int load_val;
  71. unsigned int timeout;
  72. };
  73. /* local variables */
  74. static struct sp805_wdt *wdt;
  75. static int nowayout = WATCHDOG_NOWAYOUT;
  76. /* This routine finds load value that will reset system in required timout */
  77. static void wdt_setload(unsigned int timeout)
  78. {
  79. u64 load, rate;
  80. rate = clk_get_rate(wdt->clk);
  81. /*
  82. * sp805 runs counter with given value twice, after the end of first
  83. * counter it gives an interrupt and then starts counter again. If
  84. * interrupt already occurred then it resets the system. This is why
  85. * load is half of what should be required.
  86. */
  87. load = div_u64(rate, 2) * timeout - 1;
  88. load = (load > LOAD_MAX) ? LOAD_MAX : load;
  89. load = (load < LOAD_MIN) ? LOAD_MIN : load;
  90. spin_lock(&wdt->lock);
  91. wdt->load_val = load;
  92. /* roundup timeout to closest positive integer value */
  93. wdt->timeout = div_u64((load + 1) * 2 + (rate / 2), rate);
  94. spin_unlock(&wdt->lock);
  95. }
  96. /* returns number of seconds left for reset to occur */
  97. static u32 wdt_timeleft(void)
  98. {
  99. u64 load, rate;
  100. rate = clk_get_rate(wdt->clk);
  101. spin_lock(&wdt->lock);
  102. load = readl(wdt->base + WDTVALUE);
  103. /*If the interrupt is inactive then time left is WDTValue + WDTLoad. */
  104. if (!(readl(wdt->base + WDTRIS) & INT_MASK))
  105. load += wdt->load_val + 1;
  106. spin_unlock(&wdt->lock);
  107. return div_u64(load, rate);
  108. }
  109. /* enables watchdog timers reset */
  110. static void wdt_enable(void)
  111. {
  112. spin_lock(&wdt->lock);
  113. writel(UNLOCK, wdt->base + WDTLOCK);
  114. writel(wdt->load_val, wdt->base + WDTLOAD);
  115. writel(INT_MASK, wdt->base + WDTINTCLR);
  116. writel(INT_ENABLE | RESET_ENABLE, wdt->base + WDTCONTROL);
  117. writel(LOCK, wdt->base + WDTLOCK);
  118. /* Flush posted writes. */
  119. readl(wdt->base + WDTLOCK);
  120. spin_unlock(&wdt->lock);
  121. }
  122. /* disables watchdog timers reset */
  123. static void wdt_disable(void)
  124. {
  125. spin_lock(&wdt->lock);
  126. writel(UNLOCK, wdt->base + WDTLOCK);
  127. writel(0, wdt->base + WDTCONTROL);
  128. writel(LOCK, wdt->base + WDTLOCK);
  129. /* Flush posted writes. */
  130. readl(wdt->base + WDTLOCK);
  131. spin_unlock(&wdt->lock);
  132. }
  133. static ssize_t sp805_wdt_write(struct file *file, const char *data,
  134. size_t len, loff_t *ppos)
  135. {
  136. if (len) {
  137. if (!nowayout) {
  138. size_t i;
  139. clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
  140. for (i = 0; i != len; i++) {
  141. char c;
  142. if (get_user(c, data + i))
  143. return -EFAULT;
  144. /* Check for Magic Close character */
  145. if (c == 'V') {
  146. set_bit(WDT_CAN_BE_CLOSED,
  147. &wdt->status);
  148. break;
  149. }
  150. }
  151. }
  152. wdt_enable();
  153. }
  154. return len;
  155. }
  156. static const struct watchdog_info ident = {
  157. .options = WDIOF_MAGICCLOSE | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING,
  158. .identity = MODULE_NAME,
  159. };
  160. static long sp805_wdt_ioctl(struct file *file, unsigned int cmd,
  161. unsigned long arg)
  162. {
  163. int ret = -ENOTTY;
  164. unsigned int timeout;
  165. switch (cmd) {
  166. case WDIOC_GETSUPPORT:
  167. ret = copy_to_user((struct watchdog_info *)arg, &ident,
  168. sizeof(ident)) ? -EFAULT : 0;
  169. break;
  170. case WDIOC_GETSTATUS:
  171. ret = put_user(0, (int *)arg);
  172. break;
  173. case WDIOC_KEEPALIVE:
  174. wdt_enable();
  175. ret = 0;
  176. break;
  177. case WDIOC_SETTIMEOUT:
  178. ret = get_user(timeout, (unsigned int *)arg);
  179. if (ret)
  180. break;
  181. wdt_setload(timeout);
  182. wdt_enable();
  183. /* Fall through */
  184. case WDIOC_GETTIMEOUT:
  185. ret = put_user(wdt->timeout, (unsigned int *)arg);
  186. break;
  187. case WDIOC_GETTIMELEFT:
  188. ret = put_user(wdt_timeleft(), (unsigned int *)arg);
  189. break;
  190. }
  191. return ret;
  192. }
  193. static int sp805_wdt_open(struct inode *inode, struct file *file)
  194. {
  195. int ret = 0;
  196. if (test_and_set_bit(WDT_BUSY, &wdt->status))
  197. return -EBUSY;
  198. ret = clk_enable(wdt->clk);
  199. if (ret) {
  200. dev_err(&wdt->adev->dev, "clock enable fail");
  201. goto err;
  202. }
  203. wdt_enable();
  204. /* can not be closed, once enabled */
  205. clear_bit(WDT_CAN_BE_CLOSED, &wdt->status);
  206. return nonseekable_open(inode, file);
  207. err:
  208. clear_bit(WDT_BUSY, &wdt->status);
  209. return ret;
  210. }
  211. static int sp805_wdt_release(struct inode *inode, struct file *file)
  212. {
  213. if (!test_bit(WDT_CAN_BE_CLOSED, &wdt->status)) {
  214. clear_bit(WDT_BUSY, &wdt->status);
  215. dev_warn(&wdt->adev->dev, "Device closed unexpectedly\n");
  216. return 0;
  217. }
  218. wdt_disable();
  219. clk_disable(wdt->clk);
  220. clear_bit(WDT_BUSY, &wdt->status);
  221. return 0;
  222. }
  223. static const struct file_operations sp805_wdt_fops = {
  224. .owner = THIS_MODULE,
  225. .llseek = no_llseek,
  226. .write = sp805_wdt_write,
  227. .unlocked_ioctl = sp805_wdt_ioctl,
  228. .open = sp805_wdt_open,
  229. .release = sp805_wdt_release,
  230. };
  231. static struct miscdevice sp805_wdt_miscdev = {
  232. .minor = WATCHDOG_MINOR,
  233. .name = "watchdog",
  234. .fops = &sp805_wdt_fops,
  235. };
  236. static int __devinit
  237. sp805_wdt_probe(struct amba_device *adev, const struct amba_id *id)
  238. {
  239. int ret = 0;
  240. if (!request_mem_region(adev->res.start, resource_size(&adev->res),
  241. "sp805_wdt")) {
  242. dev_warn(&adev->dev, "Failed to get memory region resource\n");
  243. ret = -ENOENT;
  244. goto err;
  245. }
  246. wdt = kzalloc(sizeof(*wdt), GFP_KERNEL);
  247. if (!wdt) {
  248. dev_warn(&adev->dev, "Kzalloc failed\n");
  249. ret = -ENOMEM;
  250. goto err_kzalloc;
  251. }
  252. wdt->clk = clk_get(&adev->dev, NULL);
  253. if (IS_ERR(wdt->clk)) {
  254. dev_warn(&adev->dev, "Clock not found\n");
  255. ret = PTR_ERR(wdt->clk);
  256. goto err_clk_get;
  257. }
  258. wdt->base = ioremap(adev->res.start, resource_size(&adev->res));
  259. if (!wdt->base) {
  260. ret = -ENOMEM;
  261. dev_warn(&adev->dev, "ioremap fail\n");
  262. goto err_ioremap;
  263. }
  264. wdt->adev = adev;
  265. spin_lock_init(&wdt->lock);
  266. wdt_setload(DEFAULT_TIMEOUT);
  267. ret = misc_register(&sp805_wdt_miscdev);
  268. if (ret < 0) {
  269. dev_warn(&adev->dev, "cannot register misc device\n");
  270. goto err_misc_register;
  271. }
  272. dev_info(&adev->dev, "registration successful\n");
  273. return 0;
  274. err_misc_register:
  275. iounmap(wdt->base);
  276. err_ioremap:
  277. clk_put(wdt->clk);
  278. err_clk_get:
  279. kfree(wdt);
  280. wdt = NULL;
  281. err_kzalloc:
  282. release_mem_region(adev->res.start, resource_size(&adev->res));
  283. err:
  284. dev_err(&adev->dev, "Probe Failed!!!\n");
  285. return ret;
  286. }
  287. static int __devexit sp805_wdt_remove(struct amba_device *adev)
  288. {
  289. misc_deregister(&sp805_wdt_miscdev);
  290. iounmap(wdt->base);
  291. clk_put(wdt->clk);
  292. kfree(wdt);
  293. release_mem_region(adev->res.start, resource_size(&adev->res));
  294. return 0;
  295. }
  296. static struct amba_id sp805_wdt_ids[] __initdata = {
  297. {
  298. .id = 0x00141805,
  299. .mask = 0x00ffffff,
  300. },
  301. { 0, 0 },
  302. };
  303. static struct amba_driver sp805_wdt_driver = {
  304. .drv = {
  305. .name = MODULE_NAME,
  306. },
  307. .id_table = sp805_wdt_ids,
  308. .probe = sp805_wdt_probe,
  309. .remove = __devexit_p(sp805_wdt_remove),
  310. };
  311. static int __init sp805_wdt_init(void)
  312. {
  313. return amba_driver_register(&sp805_wdt_driver);
  314. }
  315. module_init(sp805_wdt_init);
  316. static void __exit sp805_wdt_exit(void)
  317. {
  318. amba_driver_unregister(&sp805_wdt_driver);
  319. }
  320. module_exit(sp805_wdt_exit);
  321. module_param(nowayout, int, 0);
  322. MODULE_PARM_DESC(nowayout,
  323. "Set to 1 to keep watchdog running after device release");
  324. MODULE_AUTHOR("Viresh Kumar <viresh.kumar@st.com>");
  325. MODULE_DESCRIPTION("ARM SP805 Watchdog Driver");
  326. MODULE_LICENSE("GPL");
  327. MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR);