/drivers/video/sis/init.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C · 3654 lines · 2881 code · 474 blank · 299 comment · 1089 complexity · 0446235e90d6fea09f8a38cd3ec6a989 MD5 · raw file

Large files are truncated click here to view the full file

  1. /* $XFree86$ */
  2. /* $XdotOrg$ */
  3. /*
  4. * Mode initializing code (CRT1 section) for
  5. * for SiS 300/305/540/630/730,
  6. * SiS 315/550/[M]650/651/[M]661[FGM]X/[M]74x[GX]/330/[M]76x[GX],
  7. * XGI Volari V3XT/V5/V8, Z7
  8. * (Universal module for Linux kernel framebuffer and X.org/XFree86 4.x)
  9. *
  10. * Copyright (C) 2001-2005 by Thomas Winischhofer, Vienna, Austria
  11. *
  12. * If distributed as part of the Linux kernel, the following license terms
  13. * apply:
  14. *
  15. * * This program is free software; you can redistribute it and/or modify
  16. * * it under the terms of the GNU General Public License as published by
  17. * * the Free Software Foundation; either version 2 of the named License,
  18. * * or any later version.
  19. * *
  20. * * This program is distributed in the hope that it will be useful,
  21. * * but WITHOUT ANY WARRANTY; without even the implied warranty of
  22. * * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  23. * * GNU General Public License for more details.
  24. * *
  25. * * You should have received a copy of the GNU General Public License
  26. * * along with this program; if not, write to the Free Software
  27. * * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307, USA
  28. *
  29. * Otherwise, the following license terms apply:
  30. *
  31. * * Redistribution and use in source and binary forms, with or without
  32. * * modification, are permitted provided that the following conditions
  33. * * are met:
  34. * * 1) Redistributions of source code must retain the above copyright
  35. * * notice, this list of conditions and the following disclaimer.
  36. * * 2) Redistributions in binary form must reproduce the above copyright
  37. * * notice, this list of conditions and the following disclaimer in the
  38. * * documentation and/or other materials provided with the distribution.
  39. * * 3) The name of the author may not be used to endorse or promote products
  40. * * derived from this software without specific prior written permission.
  41. * *
  42. * * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  43. * * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
  44. * * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
  45. * * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
  46. * * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  47. * * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  48. * * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  49. * * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  50. * * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  51. * * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  52. *
  53. * Author: Thomas Winischhofer <thomas@winischhofer.net>
  54. *
  55. * Formerly based on non-functional code-fragements for 300 series by SiS, Inc.
  56. * Used by permission.
  57. */
  58. #include "init.h"
  59. #ifdef CONFIG_FB_SIS_300
  60. #include "300vtbl.h"
  61. #endif
  62. #ifdef CONFIG_FB_SIS_315
  63. #include "310vtbl.h"
  64. #endif
  65. #if defined(ALLOC_PRAGMA)
  66. #pragma alloc_text(PAGE,SiSSetMode)
  67. #endif
  68. /*********************************************/
  69. /* POINTER INITIALIZATION */
  70. /*********************************************/
  71. #if defined(CONFIG_FB_SIS_300) || defined(CONFIG_FB_SIS_315)
  72. static void
  73. InitCommonPointer(struct SiS_Private *SiS_Pr)
  74. {
  75. SiS_Pr->SiS_SModeIDTable = SiS_SModeIDTable;
  76. SiS_Pr->SiS_StResInfo = SiS_StResInfo;
  77. SiS_Pr->SiS_ModeResInfo = SiS_ModeResInfo;
  78. SiS_Pr->SiS_StandTable = SiS_StandTable;
  79. SiS_Pr->SiS_NTSCTiming = SiS_NTSCTiming;
  80. SiS_Pr->SiS_PALTiming = SiS_PALTiming;
  81. SiS_Pr->SiS_HiTVSt1Timing = SiS_HiTVSt1Timing;
  82. SiS_Pr->SiS_HiTVSt2Timing = SiS_HiTVSt2Timing;
  83. SiS_Pr->SiS_HiTVExtTiming = SiS_HiTVExtTiming;
  84. SiS_Pr->SiS_HiTVGroup3Data = SiS_HiTVGroup3Data;
  85. SiS_Pr->SiS_HiTVGroup3Simu = SiS_HiTVGroup3Simu;
  86. #if 0
  87. SiS_Pr->SiS_HiTVTextTiming = SiS_HiTVTextTiming;
  88. SiS_Pr->SiS_HiTVGroup3Text = SiS_HiTVGroup3Text;
  89. #endif
  90. SiS_Pr->SiS_StPALData = SiS_StPALData;
  91. SiS_Pr->SiS_ExtPALData = SiS_ExtPALData;
  92. SiS_Pr->SiS_StNTSCData = SiS_StNTSCData;
  93. SiS_Pr->SiS_ExtNTSCData = SiS_ExtNTSCData;
  94. SiS_Pr->SiS_St1HiTVData = SiS_StHiTVData;
  95. SiS_Pr->SiS_St2HiTVData = SiS_St2HiTVData;
  96. SiS_Pr->SiS_ExtHiTVData = SiS_ExtHiTVData;
  97. SiS_Pr->SiS_St525iData = SiS_StNTSCData;
  98. SiS_Pr->SiS_St525pData = SiS_St525pData;
  99. SiS_Pr->SiS_St750pData = SiS_St750pData;
  100. SiS_Pr->SiS_Ext525iData = SiS_ExtNTSCData;
  101. SiS_Pr->SiS_Ext525pData = SiS_ExtNTSCData;
  102. SiS_Pr->SiS_Ext750pData = SiS_Ext750pData;
  103. SiS_Pr->pSiS_OutputSelect = &SiS_OutputSelect;
  104. SiS_Pr->pSiS_SoftSetting = &SiS_SoftSetting;
  105. SiS_Pr->SiS_LCD1280x720Data = SiS_LCD1280x720Data;
  106. SiS_Pr->SiS_StLCD1280x768_2Data = SiS_StLCD1280x768_2Data;
  107. SiS_Pr->SiS_ExtLCD1280x768_2Data = SiS_ExtLCD1280x768_2Data;
  108. SiS_Pr->SiS_LCD1280x800Data = SiS_LCD1280x800Data;
  109. SiS_Pr->SiS_LCD1280x800_2Data = SiS_LCD1280x800_2Data;
  110. SiS_Pr->SiS_LCD1280x854Data = SiS_LCD1280x854Data;
  111. SiS_Pr->SiS_LCD1280x960Data = SiS_LCD1280x960Data;
  112. SiS_Pr->SiS_StLCD1400x1050Data = SiS_StLCD1400x1050Data;
  113. SiS_Pr->SiS_ExtLCD1400x1050Data = SiS_ExtLCD1400x1050Data;
  114. SiS_Pr->SiS_LCD1680x1050Data = SiS_LCD1680x1050Data;
  115. SiS_Pr->SiS_StLCD1600x1200Data = SiS_StLCD1600x1200Data;
  116. SiS_Pr->SiS_ExtLCD1600x1200Data = SiS_ExtLCD1600x1200Data;
  117. SiS_Pr->SiS_NoScaleData = SiS_NoScaleData;
  118. SiS_Pr->SiS_LVDS320x240Data_1 = SiS_LVDS320x240Data_1;
  119. SiS_Pr->SiS_LVDS320x240Data_2 = SiS_LVDS320x240Data_2;
  120. SiS_Pr->SiS_LVDS640x480Data_1 = SiS_LVDS640x480Data_1;
  121. SiS_Pr->SiS_LVDS800x600Data_1 = SiS_LVDS800x600Data_1;
  122. SiS_Pr->SiS_LVDS1024x600Data_1 = SiS_LVDS1024x600Data_1;
  123. SiS_Pr->SiS_LVDS1024x768Data_1 = SiS_LVDS1024x768Data_1;
  124. SiS_Pr->SiS_LVDSCRT1320x240_1 = SiS_LVDSCRT1320x240_1;
  125. SiS_Pr->SiS_LVDSCRT1320x240_2 = SiS_LVDSCRT1320x240_2;
  126. SiS_Pr->SiS_LVDSCRT1320x240_2_H = SiS_LVDSCRT1320x240_2_H;
  127. SiS_Pr->SiS_LVDSCRT1320x240_3 = SiS_LVDSCRT1320x240_3;
  128. SiS_Pr->SiS_LVDSCRT1320x240_3_H = SiS_LVDSCRT1320x240_3_H;
  129. SiS_Pr->SiS_LVDSCRT1640x480_1 = SiS_LVDSCRT1640x480_1;
  130. SiS_Pr->SiS_LVDSCRT1640x480_1_H = SiS_LVDSCRT1640x480_1_H;
  131. #if 0
  132. SiS_Pr->SiS_LVDSCRT11024x600_1 = SiS_LVDSCRT11024x600_1;
  133. SiS_Pr->SiS_LVDSCRT11024x600_1_H = SiS_LVDSCRT11024x600_1_H;
  134. SiS_Pr->SiS_LVDSCRT11024x600_2 = SiS_LVDSCRT11024x600_2;
  135. SiS_Pr->SiS_LVDSCRT11024x600_2_H = SiS_LVDSCRT11024x600_2_H;
  136. #endif
  137. SiS_Pr->SiS_CHTVUNTSCData = SiS_CHTVUNTSCData;
  138. SiS_Pr->SiS_CHTVONTSCData = SiS_CHTVONTSCData;
  139. SiS_Pr->SiS_PanelMinLVDS = Panel_800x600; /* lowest value LVDS/LCDA */
  140. SiS_Pr->SiS_PanelMin301 = Panel_1024x768; /* lowest value 301 */
  141. }
  142. #endif
  143. #ifdef CONFIG_FB_SIS_300
  144. static void
  145. InitTo300Pointer(struct SiS_Private *SiS_Pr)
  146. {
  147. InitCommonPointer(SiS_Pr);
  148. SiS_Pr->SiS_VBModeIDTable = SiS300_VBModeIDTable;
  149. SiS_Pr->SiS_EModeIDTable = SiS300_EModeIDTable;
  150. SiS_Pr->SiS_RefIndex = SiS300_RefIndex;
  151. SiS_Pr->SiS_CRT1Table = SiS300_CRT1Table;
  152. if(SiS_Pr->ChipType == SIS_300) {
  153. SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_300; /* 300 */
  154. } else {
  155. SiS_Pr->SiS_MCLKData_0 = SiS300_MCLKData_630; /* 630, 730 */
  156. }
  157. SiS_Pr->SiS_VCLKData = SiS300_VCLKData;
  158. SiS_Pr->SiS_VBVCLKData = (struct SiS_VBVCLKData *)SiS300_VCLKData;
  159. SiS_Pr->SiS_SR15 = SiS300_SR15;
  160. SiS_Pr->SiS_PanelDelayTbl = SiS300_PanelDelayTbl;
  161. SiS_Pr->SiS_PanelDelayTblLVDS = SiS300_PanelDelayTbl;
  162. SiS_Pr->SiS_ExtLCD1024x768Data = SiS300_ExtLCD1024x768Data;
  163. SiS_Pr->SiS_St2LCD1024x768Data = SiS300_St2LCD1024x768Data;
  164. SiS_Pr->SiS_ExtLCD1280x1024Data = SiS300_ExtLCD1280x1024Data;
  165. SiS_Pr->SiS_St2LCD1280x1024Data = SiS300_St2LCD1280x1024Data;
  166. SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS300_CRT2Part2_1024x768_1;
  167. SiS_Pr->SiS_CRT2Part2_1024x768_2 = SiS300_CRT2Part2_1024x768_2;
  168. SiS_Pr->SiS_CRT2Part2_1024x768_3 = SiS300_CRT2Part2_1024x768_3;
  169. SiS_Pr->SiS_CHTVUPALData = SiS300_CHTVUPALData;
  170. SiS_Pr->SiS_CHTVOPALData = SiS300_CHTVOPALData;
  171. SiS_Pr->SiS_CHTVUPALMData = SiS_CHTVUNTSCData; /* not supported on 300 series */
  172. SiS_Pr->SiS_CHTVOPALMData = SiS_CHTVONTSCData; /* not supported on 300 series */
  173. SiS_Pr->SiS_CHTVUPALNData = SiS300_CHTVUPALData; /* not supported on 300 series */
  174. SiS_Pr->SiS_CHTVOPALNData = SiS300_CHTVOPALData; /* not supported on 300 series */
  175. SiS_Pr->SiS_CHTVSOPALData = SiS300_CHTVSOPALData;
  176. SiS_Pr->SiS_LVDS848x480Data_1 = SiS300_LVDS848x480Data_1;
  177. SiS_Pr->SiS_LVDS848x480Data_2 = SiS300_LVDS848x480Data_2;
  178. SiS_Pr->SiS_LVDSBARCO1024Data_1 = SiS300_LVDSBARCO1024Data_1;
  179. SiS_Pr->SiS_LVDSBARCO1366Data_1 = SiS300_LVDSBARCO1366Data_1;
  180. SiS_Pr->SiS_LVDSBARCO1366Data_2 = SiS300_LVDSBARCO1366Data_2;
  181. SiS_Pr->SiS_PanelType04_1a = SiS300_PanelType04_1a;
  182. SiS_Pr->SiS_PanelType04_2a = SiS300_PanelType04_2a;
  183. SiS_Pr->SiS_PanelType04_1b = SiS300_PanelType04_1b;
  184. SiS_Pr->SiS_PanelType04_2b = SiS300_PanelType04_2b;
  185. SiS_Pr->SiS_CHTVCRT1UNTSC = SiS300_CHTVCRT1UNTSC;
  186. SiS_Pr->SiS_CHTVCRT1ONTSC = SiS300_CHTVCRT1ONTSC;
  187. SiS_Pr->SiS_CHTVCRT1UPAL = SiS300_CHTVCRT1UPAL;
  188. SiS_Pr->SiS_CHTVCRT1OPAL = SiS300_CHTVCRT1OPAL;
  189. SiS_Pr->SiS_CHTVCRT1SOPAL = SiS300_CHTVCRT1SOPAL;
  190. SiS_Pr->SiS_CHTVReg_UNTSC = SiS300_CHTVReg_UNTSC;
  191. SiS_Pr->SiS_CHTVReg_ONTSC = SiS300_CHTVReg_ONTSC;
  192. SiS_Pr->SiS_CHTVReg_UPAL = SiS300_CHTVReg_UPAL;
  193. SiS_Pr->SiS_CHTVReg_OPAL = SiS300_CHTVReg_OPAL;
  194. SiS_Pr->SiS_CHTVReg_UPALM = SiS300_CHTVReg_UNTSC; /* not supported on 300 series */
  195. SiS_Pr->SiS_CHTVReg_OPALM = SiS300_CHTVReg_ONTSC; /* not supported on 300 series */
  196. SiS_Pr->SiS_CHTVReg_UPALN = SiS300_CHTVReg_UPAL; /* not supported on 300 series */
  197. SiS_Pr->SiS_CHTVReg_OPALN = SiS300_CHTVReg_OPAL; /* not supported on 300 series */
  198. SiS_Pr->SiS_CHTVReg_SOPAL = SiS300_CHTVReg_SOPAL;
  199. SiS_Pr->SiS_CHTVVCLKUNTSC = SiS300_CHTVVCLKUNTSC;
  200. SiS_Pr->SiS_CHTVVCLKONTSC = SiS300_CHTVVCLKONTSC;
  201. SiS_Pr->SiS_CHTVVCLKUPAL = SiS300_CHTVVCLKUPAL;
  202. SiS_Pr->SiS_CHTVVCLKOPAL = SiS300_CHTVVCLKOPAL;
  203. SiS_Pr->SiS_CHTVVCLKUPALM = SiS300_CHTVVCLKUNTSC; /* not supported on 300 series */
  204. SiS_Pr->SiS_CHTVVCLKOPALM = SiS300_CHTVVCLKONTSC; /* not supported on 300 series */
  205. SiS_Pr->SiS_CHTVVCLKUPALN = SiS300_CHTVVCLKUPAL; /* not supported on 300 series */
  206. SiS_Pr->SiS_CHTVVCLKOPALN = SiS300_CHTVVCLKOPAL; /* not supported on 300 series */
  207. SiS_Pr->SiS_CHTVVCLKSOPAL = SiS300_CHTVVCLKSOPAL;
  208. }
  209. #endif
  210. #ifdef CONFIG_FB_SIS_315
  211. static void
  212. InitTo310Pointer(struct SiS_Private *SiS_Pr)
  213. {
  214. InitCommonPointer(SiS_Pr);
  215. SiS_Pr->SiS_EModeIDTable = SiS310_EModeIDTable;
  216. SiS_Pr->SiS_RefIndex = SiS310_RefIndex;
  217. SiS_Pr->SiS_CRT1Table = SiS310_CRT1Table;
  218. if(SiS_Pr->ChipType >= SIS_340) {
  219. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_340; /* 340 + XGI */
  220. } else if(SiS_Pr->ChipType >= SIS_761) {
  221. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_761; /* 761 - preliminary */
  222. } else if(SiS_Pr->ChipType >= SIS_760) {
  223. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_760; /* 760 */
  224. } else if(SiS_Pr->ChipType >= SIS_661) {
  225. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_660; /* 661/741 */
  226. } else if(SiS_Pr->ChipType == SIS_330) {
  227. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_330; /* 330 */
  228. } else if(SiS_Pr->ChipType > SIS_315PRO) {
  229. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_650; /* 550, 650, 740 */
  230. } else {
  231. SiS_Pr->SiS_MCLKData_0 = SiS310_MCLKData_0_315; /* 315 */
  232. }
  233. if(SiS_Pr->ChipType >= SIS_340) {
  234. SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1_340;
  235. } else {
  236. SiS_Pr->SiS_MCLKData_1 = SiS310_MCLKData_1;
  237. }
  238. SiS_Pr->SiS_VCLKData = SiS310_VCLKData;
  239. SiS_Pr->SiS_VBVCLKData = SiS310_VBVCLKData;
  240. SiS_Pr->SiS_SR15 = SiS310_SR15;
  241. SiS_Pr->SiS_PanelDelayTbl = SiS310_PanelDelayTbl;
  242. SiS_Pr->SiS_PanelDelayTblLVDS = SiS310_PanelDelayTblLVDS;
  243. SiS_Pr->SiS_St2LCD1024x768Data = SiS310_St2LCD1024x768Data;
  244. SiS_Pr->SiS_ExtLCD1024x768Data = SiS310_ExtLCD1024x768Data;
  245. SiS_Pr->SiS_St2LCD1280x1024Data = SiS310_St2LCD1280x1024Data;
  246. SiS_Pr->SiS_ExtLCD1280x1024Data = SiS310_ExtLCD1280x1024Data;
  247. SiS_Pr->SiS_CRT2Part2_1024x768_1 = SiS310_CRT2Part2_1024x768_1;
  248. SiS_Pr->SiS_CHTVUPALData = SiS310_CHTVUPALData;
  249. SiS_Pr->SiS_CHTVOPALData = SiS310_CHTVOPALData;
  250. SiS_Pr->SiS_CHTVUPALMData = SiS310_CHTVUPALMData;
  251. SiS_Pr->SiS_CHTVOPALMData = SiS310_CHTVOPALMData;
  252. SiS_Pr->SiS_CHTVUPALNData = SiS310_CHTVUPALNData;
  253. SiS_Pr->SiS_CHTVOPALNData = SiS310_CHTVOPALNData;
  254. SiS_Pr->SiS_CHTVSOPALData = SiS310_CHTVSOPALData;
  255. SiS_Pr->SiS_CHTVCRT1UNTSC = SiS310_CHTVCRT1UNTSC;
  256. SiS_Pr->SiS_CHTVCRT1ONTSC = SiS310_CHTVCRT1ONTSC;
  257. SiS_Pr->SiS_CHTVCRT1UPAL = SiS310_CHTVCRT1UPAL;
  258. SiS_Pr->SiS_CHTVCRT1OPAL = SiS310_CHTVCRT1OPAL;
  259. SiS_Pr->SiS_CHTVCRT1SOPAL = SiS310_CHTVCRT1OPAL;
  260. SiS_Pr->SiS_CHTVReg_UNTSC = SiS310_CHTVReg_UNTSC;
  261. SiS_Pr->SiS_CHTVReg_ONTSC = SiS310_CHTVReg_ONTSC;
  262. SiS_Pr->SiS_CHTVReg_UPAL = SiS310_CHTVReg_UPAL;
  263. SiS_Pr->SiS_CHTVReg_OPAL = SiS310_CHTVReg_OPAL;
  264. SiS_Pr->SiS_CHTVReg_UPALM = SiS310_CHTVReg_UPALM;
  265. SiS_Pr->SiS_CHTVReg_OPALM = SiS310_CHTVReg_OPALM;
  266. SiS_Pr->SiS_CHTVReg_UPALN = SiS310_CHTVReg_UPALN;
  267. SiS_Pr->SiS_CHTVReg_OPALN = SiS310_CHTVReg_OPALN;
  268. SiS_Pr->SiS_CHTVReg_SOPAL = SiS310_CHTVReg_OPAL;
  269. SiS_Pr->SiS_CHTVVCLKUNTSC = SiS310_CHTVVCLKUNTSC;
  270. SiS_Pr->SiS_CHTVVCLKONTSC = SiS310_CHTVVCLKONTSC;
  271. SiS_Pr->SiS_CHTVVCLKUPAL = SiS310_CHTVVCLKUPAL;
  272. SiS_Pr->SiS_CHTVVCLKOPAL = SiS310_CHTVVCLKOPAL;
  273. SiS_Pr->SiS_CHTVVCLKUPALM = SiS310_CHTVVCLKUPALM;
  274. SiS_Pr->SiS_CHTVVCLKOPALM = SiS310_CHTVVCLKOPALM;
  275. SiS_Pr->SiS_CHTVVCLKUPALN = SiS310_CHTVVCLKUPALN;
  276. SiS_Pr->SiS_CHTVVCLKOPALN = SiS310_CHTVVCLKOPALN;
  277. SiS_Pr->SiS_CHTVVCLKSOPAL = SiS310_CHTVVCLKOPAL;
  278. }
  279. #endif
  280. bool
  281. SiSInitPtr(struct SiS_Private *SiS_Pr)
  282. {
  283. if(SiS_Pr->ChipType < SIS_315H) {
  284. #ifdef CONFIG_FB_SIS_300
  285. InitTo300Pointer(SiS_Pr);
  286. #else
  287. return false;
  288. #endif
  289. } else {
  290. #ifdef CONFIG_FB_SIS_315
  291. InitTo310Pointer(SiS_Pr);
  292. #else
  293. return false;
  294. #endif
  295. }
  296. return true;
  297. }
  298. /*********************************************/
  299. /* HELPER: Get ModeID */
  300. /*********************************************/
  301. static
  302. unsigned short
  303. SiS_GetModeID(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
  304. int Depth, bool FSTN, int LCDwidth, int LCDheight)
  305. {
  306. unsigned short ModeIndex = 0;
  307. switch(HDisplay)
  308. {
  309. case 320:
  310. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  311. else if(VDisplay == 240) {
  312. if((VBFlags & CRT2_LCD) && (FSTN))
  313. ModeIndex = ModeIndex_320x240_FSTN[Depth];
  314. else
  315. ModeIndex = ModeIndex_320x240[Depth];
  316. }
  317. break;
  318. case 400:
  319. if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 800) && (LCDwidth >= 600))) {
  320. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  321. }
  322. break;
  323. case 512:
  324. if((!(VBFlags & CRT1_LCDA)) || ((LCDwidth >= 1024) && (LCDwidth >= 768))) {
  325. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  326. }
  327. break;
  328. case 640:
  329. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  330. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  331. break;
  332. case 720:
  333. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  334. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  335. break;
  336. case 768:
  337. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  338. break;
  339. case 800:
  340. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  341. else if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  342. break;
  343. case 848:
  344. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  345. break;
  346. case 856:
  347. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  348. break;
  349. case 960:
  350. if(VGAEngine == SIS_315_VGA) {
  351. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  352. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  353. }
  354. break;
  355. case 1024:
  356. if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  357. else if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  358. else if(VGAEngine == SIS_300_VGA) {
  359. if(VDisplay == 600) ModeIndex = ModeIndex_1024x600[Depth];
  360. }
  361. break;
  362. case 1152:
  363. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  364. if(VGAEngine == SIS_300_VGA) {
  365. if(VDisplay == 768) ModeIndex = ModeIndex_1152x768[Depth];
  366. }
  367. break;
  368. case 1280:
  369. switch(VDisplay) {
  370. case 720:
  371. ModeIndex = ModeIndex_1280x720[Depth];
  372. break;
  373. case 768:
  374. if(VGAEngine == SIS_300_VGA) {
  375. ModeIndex = ModeIndex_300_1280x768[Depth];
  376. } else {
  377. ModeIndex = ModeIndex_310_1280x768[Depth];
  378. }
  379. break;
  380. case 800:
  381. if(VGAEngine == SIS_315_VGA) {
  382. ModeIndex = ModeIndex_1280x800[Depth];
  383. }
  384. break;
  385. case 854:
  386. if(VGAEngine == SIS_315_VGA) {
  387. ModeIndex = ModeIndex_1280x854[Depth];
  388. }
  389. break;
  390. case 960:
  391. ModeIndex = ModeIndex_1280x960[Depth];
  392. break;
  393. case 1024:
  394. ModeIndex = ModeIndex_1280x1024[Depth];
  395. break;
  396. }
  397. break;
  398. case 1360:
  399. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  400. if(VGAEngine == SIS_300_VGA) {
  401. if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
  402. }
  403. break;
  404. case 1400:
  405. if(VGAEngine == SIS_315_VGA) {
  406. if(VDisplay == 1050) {
  407. ModeIndex = ModeIndex_1400x1050[Depth];
  408. }
  409. }
  410. break;
  411. case 1600:
  412. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  413. break;
  414. case 1680:
  415. if(VGAEngine == SIS_315_VGA) {
  416. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  417. }
  418. break;
  419. case 1920:
  420. if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
  421. else if(VGAEngine == SIS_315_VGA) {
  422. if(VDisplay == 1080) ModeIndex = ModeIndex_1920x1080[Depth];
  423. }
  424. break;
  425. case 2048:
  426. if(VDisplay == 1536) {
  427. if(VGAEngine == SIS_300_VGA) {
  428. ModeIndex = ModeIndex_300_2048x1536[Depth];
  429. } else {
  430. ModeIndex = ModeIndex_310_2048x1536[Depth];
  431. }
  432. }
  433. break;
  434. }
  435. return ModeIndex;
  436. }
  437. unsigned short
  438. SiS_GetModeID_LCD(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay,
  439. int Depth, bool FSTN, unsigned short CustomT, int LCDwidth, int LCDheight,
  440. unsigned int VBFlags2)
  441. {
  442. unsigned short ModeIndex = 0;
  443. if(VBFlags2 & (VB2_LVDS | VB2_30xBDH)) {
  444. switch(HDisplay)
  445. {
  446. case 320:
  447. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
  448. if(VDisplay == 200) {
  449. if(!FSTN) ModeIndex = ModeIndex_320x200[Depth];
  450. } else if(VDisplay == 240) {
  451. if(!FSTN) ModeIndex = ModeIndex_320x240[Depth];
  452. else if(VGAEngine == SIS_315_VGA) {
  453. ModeIndex = ModeIndex_320x240_FSTN[Depth];
  454. }
  455. }
  456. }
  457. break;
  458. case 400:
  459. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
  460. if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
  461. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  462. }
  463. }
  464. break;
  465. case 512:
  466. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856)) {
  467. if(!((VGAEngine == SIS_300_VGA) && (VBFlags2 & VB2_TRUMPION))) {
  468. if(LCDwidth >= 1024 && LCDwidth != 1152 && LCDheight >= 768) {
  469. if(VDisplay == 384) {
  470. ModeIndex = ModeIndex_512x384[Depth];
  471. }
  472. }
  473. }
  474. }
  475. break;
  476. case 640:
  477. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  478. else if(VDisplay == 400) {
  479. if((CustomT != CUT_PANEL848) && (CustomT != CUT_PANEL856))
  480. ModeIndex = ModeIndex_640x400[Depth];
  481. }
  482. break;
  483. case 800:
  484. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  485. break;
  486. case 848:
  487. if(CustomT == CUT_PANEL848) {
  488. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  489. }
  490. break;
  491. case 856:
  492. if(CustomT == CUT_PANEL856) {
  493. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  494. }
  495. break;
  496. case 1024:
  497. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  498. else if(VGAEngine == SIS_300_VGA) {
  499. if((VDisplay == 600) && (LCDheight == 600)) {
  500. ModeIndex = ModeIndex_1024x600[Depth];
  501. }
  502. }
  503. break;
  504. case 1152:
  505. if(VGAEngine == SIS_300_VGA) {
  506. if((VDisplay == 768) && (LCDheight == 768)) {
  507. ModeIndex = ModeIndex_1152x768[Depth];
  508. }
  509. }
  510. break;
  511. case 1280:
  512. if(VDisplay == 1024) ModeIndex = ModeIndex_1280x1024[Depth];
  513. else if(VGAEngine == SIS_315_VGA) {
  514. if((VDisplay == 768) && (LCDheight == 768)) {
  515. ModeIndex = ModeIndex_310_1280x768[Depth];
  516. }
  517. }
  518. break;
  519. case 1360:
  520. if(VGAEngine == SIS_300_VGA) {
  521. if(CustomT == CUT_BARCO1366) {
  522. if(VDisplay == 1024) ModeIndex = ModeIndex_300_1360x1024[Depth];
  523. }
  524. }
  525. if(CustomT == CUT_PANEL848) {
  526. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  527. }
  528. break;
  529. case 1400:
  530. if(VGAEngine == SIS_315_VGA) {
  531. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  532. }
  533. break;
  534. case 1600:
  535. if(VGAEngine == SIS_315_VGA) {
  536. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  537. }
  538. break;
  539. }
  540. } else if(VBFlags2 & VB2_SISBRIDGE) {
  541. switch(HDisplay)
  542. {
  543. case 320:
  544. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  545. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  546. break;
  547. case 400:
  548. if(LCDwidth >= 800 && LCDheight >= 600) {
  549. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  550. }
  551. break;
  552. case 512:
  553. if(LCDwidth >= 1024 && LCDheight >= 768 && LCDwidth != 1152) {
  554. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  555. }
  556. break;
  557. case 640:
  558. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  559. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  560. break;
  561. case 720:
  562. if(VGAEngine == SIS_315_VGA) {
  563. if(VDisplay == 480) ModeIndex = ModeIndex_720x480[Depth];
  564. else if(VDisplay == 576) ModeIndex = ModeIndex_720x576[Depth];
  565. }
  566. break;
  567. case 768:
  568. if(VGAEngine == SIS_315_VGA) {
  569. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  570. }
  571. break;
  572. case 800:
  573. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  574. if(VGAEngine == SIS_315_VGA) {
  575. if(VDisplay == 480) ModeIndex = ModeIndex_800x480[Depth];
  576. }
  577. break;
  578. case 848:
  579. if(VGAEngine == SIS_315_VGA) {
  580. if(VDisplay == 480) ModeIndex = ModeIndex_848x480[Depth];
  581. }
  582. break;
  583. case 856:
  584. if(VGAEngine == SIS_315_VGA) {
  585. if(VDisplay == 480) ModeIndex = ModeIndex_856x480[Depth];
  586. }
  587. break;
  588. case 960:
  589. if(VGAEngine == SIS_315_VGA) {
  590. if(VDisplay == 540) ModeIndex = ModeIndex_960x540[Depth];
  591. else if(VDisplay == 600) ModeIndex = ModeIndex_960x600[Depth];
  592. }
  593. break;
  594. case 1024:
  595. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  596. if(VGAEngine == SIS_315_VGA) {
  597. if(VDisplay == 576) ModeIndex = ModeIndex_1024x576[Depth];
  598. }
  599. break;
  600. case 1152:
  601. if(VGAEngine == SIS_315_VGA) {
  602. if(VDisplay == 864) ModeIndex = ModeIndex_1152x864[Depth];
  603. }
  604. break;
  605. case 1280:
  606. switch(VDisplay) {
  607. case 720:
  608. ModeIndex = ModeIndex_1280x720[Depth];
  609. case 768:
  610. if(VGAEngine == SIS_300_VGA) {
  611. ModeIndex = ModeIndex_300_1280x768[Depth];
  612. } else {
  613. ModeIndex = ModeIndex_310_1280x768[Depth];
  614. }
  615. break;
  616. case 800:
  617. if(VGAEngine == SIS_315_VGA) {
  618. ModeIndex = ModeIndex_1280x800[Depth];
  619. }
  620. break;
  621. case 854:
  622. if(VGAEngine == SIS_315_VGA) {
  623. ModeIndex = ModeIndex_1280x854[Depth];
  624. }
  625. break;
  626. case 960:
  627. ModeIndex = ModeIndex_1280x960[Depth];
  628. break;
  629. case 1024:
  630. ModeIndex = ModeIndex_1280x1024[Depth];
  631. break;
  632. }
  633. break;
  634. case 1360:
  635. if(VGAEngine == SIS_315_VGA) { /* OVER1280 only? */
  636. if(VDisplay == 768) ModeIndex = ModeIndex_1360x768[Depth];
  637. }
  638. break;
  639. case 1400:
  640. if(VGAEngine == SIS_315_VGA) {
  641. if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
  642. if(VDisplay == 1050) ModeIndex = ModeIndex_1400x1050[Depth];
  643. }
  644. }
  645. break;
  646. case 1600:
  647. if(VGAEngine == SIS_315_VGA) {
  648. if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
  649. if(VDisplay == 1200) ModeIndex = ModeIndex_1600x1200[Depth];
  650. }
  651. }
  652. break;
  653. #ifndef VB_FORBID_CRT2LCD_OVER_1600
  654. case 1680:
  655. if(VGAEngine == SIS_315_VGA) {
  656. if(VBFlags2 & VB2_LCDOVER1280BRIDGE) {
  657. if(VDisplay == 1050) ModeIndex = ModeIndex_1680x1050[Depth];
  658. }
  659. }
  660. break;
  661. case 1920:
  662. if(VGAEngine == SIS_315_VGA) {
  663. if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
  664. if(VDisplay == 1440) ModeIndex = ModeIndex_1920x1440[Depth];
  665. }
  666. }
  667. break;
  668. case 2048:
  669. if(VGAEngine == SIS_315_VGA) {
  670. if(VBFlags2 & VB2_LCDOVER1600BRIDGE) {
  671. if(VDisplay == 1536) ModeIndex = ModeIndex_310_2048x1536[Depth];
  672. }
  673. }
  674. break;
  675. #endif
  676. }
  677. }
  678. return ModeIndex;
  679. }
  680. unsigned short
  681. SiS_GetModeID_TV(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
  682. unsigned int VBFlags2)
  683. {
  684. unsigned short ModeIndex = 0;
  685. if(VBFlags2 & VB2_CHRONTEL) {
  686. switch(HDisplay)
  687. {
  688. case 512:
  689. if(VGAEngine == SIS_315_VGA) {
  690. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  691. }
  692. break;
  693. case 640:
  694. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  695. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  696. break;
  697. case 800:
  698. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  699. break;
  700. case 1024:
  701. if(VGAEngine == SIS_315_VGA) {
  702. if(VDisplay == 768) ModeIndex = ModeIndex_1024x768[Depth];
  703. }
  704. break;
  705. }
  706. } else if(VBFlags2 & VB2_SISTVBRIDGE) {
  707. switch(HDisplay)
  708. {
  709. case 320:
  710. if(VDisplay == 200) ModeIndex = ModeIndex_320x200[Depth];
  711. else if(VDisplay == 240) ModeIndex = ModeIndex_320x240[Depth];
  712. break;
  713. case 400:
  714. if(VDisplay == 300) ModeIndex = ModeIndex_400x300[Depth];
  715. break;
  716. case 512:
  717. if( ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR750P | TV_YPBPR1080I))) ||
  718. (VBFlags & TV_HIVISION) ||
  719. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
  720. if(VDisplay == 384) ModeIndex = ModeIndex_512x384[Depth];
  721. }
  722. break;
  723. case 640:
  724. if(VDisplay == 480) ModeIndex = ModeIndex_640x480[Depth];
  725. else if(VDisplay == 400) ModeIndex = ModeIndex_640x400[Depth];
  726. break;
  727. case 720:
  728. if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
  729. if(VDisplay == 480) {
  730. ModeIndex = ModeIndex_720x480[Depth];
  731. } else if(VDisplay == 576) {
  732. if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
  733. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) )
  734. ModeIndex = ModeIndex_720x576[Depth];
  735. }
  736. }
  737. break;
  738. case 768:
  739. if((!(VBFlags & TV_HIVISION)) && (!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)))) {
  740. if( ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P)) ||
  741. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL)) ) {
  742. if(VDisplay == 576) ModeIndex = ModeIndex_768x576[Depth];
  743. }
  744. }
  745. break;
  746. case 800:
  747. if(VDisplay == 600) ModeIndex = ModeIndex_800x600[Depth];
  748. else if(VDisplay == 480) {
  749. if(!((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR750P))) {
  750. ModeIndex = ModeIndex_800x480[Depth];
  751. }
  752. }
  753. break;
  754. case 960:
  755. if(VGAEngine == SIS_315_VGA) {
  756. if(VDisplay == 600) {
  757. if((VBFlags & TV_HIVISION) || ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  758. ModeIndex = ModeIndex_960x600[Depth];
  759. }
  760. }
  761. }
  762. break;
  763. case 1024:
  764. if(VDisplay == 768) {
  765. if(VBFlags2 & VB2_30xBLV) {
  766. ModeIndex = ModeIndex_1024x768[Depth];
  767. }
  768. } else if(VDisplay == 576) {
  769. if( (VBFlags & TV_HIVISION) ||
  770. ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I)) ||
  771. ((VBFlags2 & VB2_30xBLV) &&
  772. ((!(VBFlags & (TV_YPBPR | TV_PALM))) && (VBFlags & TV_PAL))) ) {
  773. ModeIndex = ModeIndex_1024x576[Depth];
  774. }
  775. }
  776. break;
  777. case 1280:
  778. if(VDisplay == 720) {
  779. if((VBFlags & TV_HIVISION) ||
  780. ((VBFlags & TV_YPBPR) && (VBFlags & (TV_YPBPR1080I | TV_YPBPR750P)))) {
  781. ModeIndex = ModeIndex_1280x720[Depth];
  782. }
  783. } else if(VDisplay == 1024) {
  784. if((VBFlags & TV_HIVISION) ||
  785. ((VBFlags & TV_YPBPR) && (VBFlags & TV_YPBPR1080I))) {
  786. ModeIndex = ModeIndex_1280x1024[Depth];
  787. }
  788. }
  789. break;
  790. }
  791. }
  792. return ModeIndex;
  793. }
  794. unsigned short
  795. SiS_GetModeID_VGA2(int VGAEngine, unsigned int VBFlags, int HDisplay, int VDisplay, int Depth,
  796. unsigned int VBFlags2)
  797. {
  798. if(!(VBFlags2 & VB2_SISVGA2BRIDGE)) return 0;
  799. if(HDisplay >= 1920) return 0;
  800. switch(HDisplay)
  801. {
  802. case 1600:
  803. if(VDisplay == 1200) {
  804. if(VGAEngine != SIS_315_VGA) return 0;
  805. if(!(VBFlags2 & VB2_30xB)) return 0;
  806. }
  807. break;
  808. case 1680:
  809. if(VDisplay == 1050) {
  810. if(VGAEngine != SIS_315_VGA) return 0;
  811. if(!(VBFlags2 & VB2_30xB)) return 0;
  812. }
  813. break;
  814. }
  815. return SiS_GetModeID(VGAEngine, 0, HDisplay, VDisplay, Depth, false, 0, 0);
  816. }
  817. /*********************************************/
  818. /* HELPER: SetReg, GetReg */
  819. /*********************************************/
  820. void
  821. SiS_SetReg(SISIOADDRESS port, u8 index, u8 data)
  822. {
  823. outb(index, port);
  824. outb(data, port + 1);
  825. }
  826. void
  827. SiS_SetRegByte(SISIOADDRESS port, u8 data)
  828. {
  829. outb(data, port);
  830. }
  831. void
  832. SiS_SetRegShort(SISIOADDRESS port, u16 data)
  833. {
  834. outw(data, port);
  835. }
  836. void
  837. SiS_SetRegLong(SISIOADDRESS port, u32 data)
  838. {
  839. outl(data, port);
  840. }
  841. u8
  842. SiS_GetReg(SISIOADDRESS port, u8 index)
  843. {
  844. outb(index, port);
  845. return inb(port + 1);
  846. }
  847. u8
  848. SiS_GetRegByte(SISIOADDRESS port)
  849. {
  850. return inb(port);
  851. }
  852. u16
  853. SiS_GetRegShort(SISIOADDRESS port)
  854. {
  855. return inw(port);
  856. }
  857. u32
  858. SiS_GetRegLong(SISIOADDRESS port)
  859. {
  860. return inl(port);
  861. }
  862. void
  863. SiS_SetRegANDOR(SISIOADDRESS Port, u8 Index, u8 DataAND, u8 DataOR)
  864. {
  865. u8 temp;
  866. temp = SiS_GetReg(Port, Index);
  867. temp = (temp & (DataAND)) | DataOR;
  868. SiS_SetReg(Port, Index, temp);
  869. }
  870. void
  871. SiS_SetRegAND(SISIOADDRESS Port, u8 Index, u8 DataAND)
  872. {
  873. u8 temp;
  874. temp = SiS_GetReg(Port, Index);
  875. temp &= DataAND;
  876. SiS_SetReg(Port, Index, temp);
  877. }
  878. void
  879. SiS_SetRegOR(SISIOADDRESS Port, u8 Index, u8 DataOR)
  880. {
  881. u8 temp;
  882. temp = SiS_GetReg(Port, Index);
  883. temp |= DataOR;
  884. SiS_SetReg(Port, Index, temp);
  885. }
  886. /*********************************************/
  887. /* HELPER: DisplayOn, DisplayOff */
  888. /*********************************************/
  889. void
  890. SiS_DisplayOn(struct SiS_Private *SiS_Pr)
  891. {
  892. SiS_SetRegAND(SiS_Pr->SiS_P3c4,0x01,0xDF);
  893. }
  894. void
  895. SiS_DisplayOff(struct SiS_Private *SiS_Pr)
  896. {
  897. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x01,0x20);
  898. }
  899. /*********************************************/
  900. /* HELPER: Init Port Addresses */
  901. /*********************************************/
  902. void
  903. SiSRegInit(struct SiS_Private *SiS_Pr, SISIOADDRESS BaseAddr)
  904. {
  905. SiS_Pr->SiS_P3c4 = BaseAddr + 0x14;
  906. SiS_Pr->SiS_P3d4 = BaseAddr + 0x24;
  907. SiS_Pr->SiS_P3c0 = BaseAddr + 0x10;
  908. SiS_Pr->SiS_P3ce = BaseAddr + 0x1e;
  909. SiS_Pr->SiS_P3c2 = BaseAddr + 0x12;
  910. SiS_Pr->SiS_P3ca = BaseAddr + 0x1a;
  911. SiS_Pr->SiS_P3c6 = BaseAddr + 0x16;
  912. SiS_Pr->SiS_P3c7 = BaseAddr + 0x17;
  913. SiS_Pr->SiS_P3c8 = BaseAddr + 0x18;
  914. SiS_Pr->SiS_P3c9 = BaseAddr + 0x19;
  915. SiS_Pr->SiS_P3cb = BaseAddr + 0x1b;
  916. SiS_Pr->SiS_P3cc = BaseAddr + 0x1c;
  917. SiS_Pr->SiS_P3cd = BaseAddr + 0x1d;
  918. SiS_Pr->SiS_P3da = BaseAddr + 0x2a;
  919. SiS_Pr->SiS_Part1Port = BaseAddr + SIS_CRT2_PORT_04;
  920. SiS_Pr->SiS_Part2Port = BaseAddr + SIS_CRT2_PORT_10;
  921. SiS_Pr->SiS_Part3Port = BaseAddr + SIS_CRT2_PORT_12;
  922. SiS_Pr->SiS_Part4Port = BaseAddr + SIS_CRT2_PORT_14;
  923. SiS_Pr->SiS_Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
  924. SiS_Pr->SiS_DDC_Port = BaseAddr + 0x14;
  925. SiS_Pr->SiS_VidCapt = BaseAddr + SIS_VIDEO_CAPTURE;
  926. SiS_Pr->SiS_VidPlay = BaseAddr + SIS_VIDEO_PLAYBACK;
  927. }
  928. /*********************************************/
  929. /* HELPER: GetSysFlags */
  930. /*********************************************/
  931. static void
  932. SiS_GetSysFlags(struct SiS_Private *SiS_Pr)
  933. {
  934. unsigned char cr5f, temp1, temp2;
  935. /* 661 and newer: NEVER write non-zero to SR11[7:4] */
  936. /* (SR11 is used for DDC and in enable/disablebridge) */
  937. SiS_Pr->SiS_SensibleSR11 = false;
  938. SiS_Pr->SiS_MyCR63 = 0x63;
  939. if(SiS_Pr->ChipType >= SIS_330) {
  940. SiS_Pr->SiS_MyCR63 = 0x53;
  941. if(SiS_Pr->ChipType >= SIS_661) {
  942. SiS_Pr->SiS_SensibleSR11 = true;
  943. }
  944. }
  945. /* You should use the macros, not these flags directly */
  946. SiS_Pr->SiS_SysFlags = 0;
  947. if(SiS_Pr->ChipType == SIS_650) {
  948. cr5f = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0xf0;
  949. SiS_SetRegAND(SiS_Pr->SiS_P3d4,0x5c,0x07);
  950. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  951. SiS_SetRegOR(SiS_Pr->SiS_P3d4,0x5c,0xf8);
  952. temp2 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  953. if((!temp1) || (temp2)) {
  954. switch(cr5f) {
  955. case 0x80:
  956. case 0x90:
  957. case 0xc0:
  958. SiS_Pr->SiS_SysFlags |= SF_IsM650;
  959. break;
  960. case 0xa0:
  961. case 0xb0:
  962. case 0xe0:
  963. SiS_Pr->SiS_SysFlags |= SF_Is651;
  964. break;
  965. }
  966. } else {
  967. switch(cr5f) {
  968. case 0x90:
  969. temp1 = SiS_GetReg(SiS_Pr->SiS_P3d4,0x5c) & 0xf8;
  970. switch(temp1) {
  971. case 0x00: SiS_Pr->SiS_SysFlags |= SF_IsM652; break;
  972. case 0x40: SiS_Pr->SiS_SysFlags |= SF_IsM653; break;
  973. default: SiS_Pr->SiS_SysFlags |= SF_IsM650; break;
  974. }
  975. break;
  976. case 0xb0:
  977. SiS_Pr->SiS_SysFlags |= SF_Is652;
  978. break;
  979. default:
  980. SiS_Pr->SiS_SysFlags |= SF_IsM650;
  981. break;
  982. }
  983. }
  984. }
  985. if(SiS_Pr->ChipType >= SIS_760 && SiS_Pr->ChipType <= SIS_761) {
  986. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x30) {
  987. SiS_Pr->SiS_SysFlags |= SF_760LFB;
  988. }
  989. if(SiS_GetReg(SiS_Pr->SiS_P3d4,0x79) & 0xf0) {
  990. SiS_Pr->SiS_SysFlags |= SF_760UMA;
  991. }
  992. }
  993. }
  994. /*********************************************/
  995. /* HELPER: Init PCI & Engines */
  996. /*********************************************/
  997. static void
  998. SiSInitPCIetc(struct SiS_Private *SiS_Pr)
  999. {
  1000. switch(SiS_Pr->ChipType) {
  1001. #ifdef CONFIG_FB_SIS_300
  1002. case SIS_300:
  1003. case SIS_540:
  1004. case SIS_630:
  1005. case SIS_730:
  1006. /* Set - PCI LINEAR ADDRESSING ENABLE (0x80)
  1007. * - RELOCATED VGA IO ENABLED (0x20)
  1008. * - MMIO ENABLED (0x01)
  1009. * Leave other bits untouched.
  1010. */
  1011. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1012. /* - Enable 2D (0x40)
  1013. * - Enable 3D (0x02)
  1014. * - Enable 3D Vertex command fetch (0x10) ?
  1015. * - Enable 3D command parser (0x08) ?
  1016. */
  1017. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0x5A);
  1018. break;
  1019. #endif
  1020. #ifdef CONFIG_FB_SIS_315
  1021. case SIS_315H:
  1022. case SIS_315:
  1023. case SIS_315PRO:
  1024. case SIS_650:
  1025. case SIS_740:
  1026. case SIS_330:
  1027. case SIS_661:
  1028. case SIS_741:
  1029. case SIS_660:
  1030. case SIS_760:
  1031. case SIS_761:
  1032. case SIS_340:
  1033. case XGI_40:
  1034. /* See above */
  1035. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1036. /* - Enable 3D G/L transformation engine (0x80)
  1037. * - Enable 2D (0x40)
  1038. * - Enable 3D vertex command fetch (0x10)
  1039. * - Enable 3D command parser (0x08)
  1040. * - Enable 3D (0x02)
  1041. */
  1042. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x1E,0xDA);
  1043. break;
  1044. case XGI_20:
  1045. case SIS_550:
  1046. /* See above */
  1047. SiS_SetRegOR(SiS_Pr->SiS_P3c4,0x20,0xa1);
  1048. /* No 3D engine ! */
  1049. /* - Enable 2D (0x40)
  1050. * - disable 3D
  1051. */
  1052. SiS_SetRegANDOR(SiS_Pr->SiS_P3c4,0x1E,0x60,0x40);
  1053. break;
  1054. #endif
  1055. default:
  1056. break;
  1057. }
  1058. }
  1059. /*********************************************/
  1060. /* HELPER: SetLVDSetc */
  1061. /*********************************************/
  1062. static
  1063. void
  1064. SiSSetLVDSetc(struct SiS_Private *SiS_Pr)
  1065. {
  1066. unsigned short temp;
  1067. SiS_Pr->SiS_IF_DEF_LVDS = 0;
  1068. SiS_Pr->SiS_IF_DEF_TRUMPION = 0;
  1069. SiS_Pr->SiS_IF_DEF_CH70xx = 0;
  1070. SiS_Pr->SiS_IF_DEF_CONEX = 0;
  1071. SiS_Pr->SiS_ChrontelInit = 0;
  1072. if(SiS_Pr->ChipType == XGI_20) return;
  1073. /* Check for SiS30x first */
  1074. temp = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
  1075. if((temp == 1) || (temp == 2)) return;
  1076. switch(SiS_Pr->ChipType) {
  1077. #ifdef CONFIG_FB_SIS_300
  1078. case SIS_540:
  1079. case SIS_630:
  1080. case SIS_730:
  1081. temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
  1082. if((temp >= 2) && (temp <= 5)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1083. if(temp == 3) SiS_Pr->SiS_IF_DEF_TRUMPION = 1;
  1084. if((temp == 4) || (temp == 5)) {
  1085. /* Save power status (and error check) - UNUSED */
  1086. SiS_Pr->SiS_Backup70xx = SiS_GetCH700x(SiS_Pr, 0x0e);
  1087. SiS_Pr->SiS_IF_DEF_CH70xx = 1;
  1088. }
  1089. break;
  1090. #endif
  1091. #ifdef CONFIG_FB_SIS_315
  1092. case SIS_550:
  1093. case SIS_650:
  1094. case SIS_740:
  1095. case SIS_330:
  1096. temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x37) & 0x0e) >> 1;
  1097. if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1098. if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
  1099. break;
  1100. case SIS_661:
  1101. case SIS_741:
  1102. case SIS_660:
  1103. case SIS_760:
  1104. case SIS_761:
  1105. case SIS_340:
  1106. case XGI_20:
  1107. case XGI_40:
  1108. temp = (SiS_GetReg(SiS_Pr->SiS_P3d4,0x38) & 0xe0) >> 5;
  1109. if((temp >= 2) && (temp <= 3)) SiS_Pr->SiS_IF_DEF_LVDS = 1;
  1110. if(temp == 3) SiS_Pr->SiS_IF_DEF_CH70xx = 2;
  1111. if(temp == 4) SiS_Pr->SiS_IF_DEF_CONEX = 1; /* Not yet supported */
  1112. break;
  1113. #endif
  1114. default:
  1115. break;
  1116. }
  1117. }
  1118. /*********************************************/
  1119. /* HELPER: Enable DSTN/FSTN */
  1120. /*********************************************/
  1121. void
  1122. SiS_SetEnableDstn(struct SiS_Private *SiS_Pr, int enable)
  1123. {
  1124. SiS_Pr->SiS_IF_DEF_DSTN = enable ? 1 : 0;
  1125. }
  1126. void
  1127. SiS_SetEnableFstn(struct SiS_Private *SiS_Pr, int enable)
  1128. {
  1129. SiS_Pr->SiS_IF_DEF_FSTN = enable ? 1 : 0;
  1130. }
  1131. /*********************************************/
  1132. /* HELPER: Get modeflag */
  1133. /*********************************************/
  1134. unsigned short
  1135. SiS_GetModeFlag(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1136. unsigned short ModeIdIndex)
  1137. {
  1138. if(SiS_Pr->UseCustomMode) {
  1139. return SiS_Pr->CModeFlag;
  1140. } else if(ModeNo <= 0x13) {
  1141. return SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_ModeFlag;
  1142. } else {
  1143. return SiS_Pr->SiS_EModeIDTable[ModeIdIndex].Ext_ModeFlag;
  1144. }
  1145. }
  1146. /*********************************************/
  1147. /* HELPER: Determine ROM usage */
  1148. /*********************************************/
  1149. bool
  1150. SiSDetermineROMLayout661(struct SiS_Private *SiS_Pr)
  1151. {
  1152. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  1153. unsigned short romversoffs, romvmaj = 1, romvmin = 0;
  1154. if(SiS_Pr->ChipType >= XGI_20) {
  1155. /* XGI ROMs don't qualify */
  1156. return false;
  1157. } else if(SiS_Pr->ChipType >= SIS_761) {
  1158. /* I very much assume 761, 340 and newer will use new layout */
  1159. return true;
  1160. } else if(SiS_Pr->ChipType >= SIS_661) {
  1161. if((ROMAddr[0x1a] == 'N') &&
  1162. (ROMAddr[0x1b] == 'e') &&
  1163. (ROMAddr[0x1c] == 'w') &&
  1164. (ROMAddr[0x1d] == 'V')) {
  1165. return true;
  1166. }
  1167. romversoffs = ROMAddr[0x16] | (ROMAddr[0x17] << 8);
  1168. if(romversoffs) {
  1169. if((ROMAddr[romversoffs+1] == '.') || (ROMAddr[romversoffs+4] == '.')) {
  1170. romvmaj = ROMAddr[romversoffs] - '0';
  1171. romvmin = ((ROMAddr[romversoffs+2] -'0') * 10) + (ROMAddr[romversoffs+3] - '0');
  1172. }
  1173. }
  1174. if((romvmaj != 0) || (romvmin >= 92)) {
  1175. return true;
  1176. }
  1177. } else if(IS_SIS650740) {
  1178. if((ROMAddr[0x1a] == 'N') &&
  1179. (ROMAddr[0x1b] == 'e') &&
  1180. (ROMAddr[0x1c] == 'w') &&
  1181. (ROMAddr[0x1d] == 'V')) {
  1182. return true;
  1183. }
  1184. }
  1185. return false;
  1186. }
  1187. static void
  1188. SiSDetermineROMUsage(struct SiS_Private *SiS_Pr)
  1189. {
  1190. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  1191. unsigned short romptr = 0;
  1192. SiS_Pr->SiS_UseROM = false;
  1193. SiS_Pr->SiS_ROMNew = false;
  1194. SiS_Pr->SiS_PWDOffset = 0;
  1195. if(SiS_Pr->ChipType >= XGI_20) return;
  1196. if((ROMAddr) && (SiS_Pr->UseROM)) {
  1197. if(SiS_Pr->ChipType == SIS_300) {
  1198. /* 300: We check if the code starts below 0x220 by
  1199. * checking the jmp instruction at the beginning
  1200. * of the BIOS image.
  1201. */
  1202. if((ROMAddr[3] == 0xe9) && ((ROMAddr[5] << 8) | ROMAddr[4]) > 0x21a)
  1203. SiS_Pr->SiS_UseROM = true;
  1204. } else if(SiS_Pr->ChipType < SIS_315H) {
  1205. /* Sony's VAIO BIOS 1.09 follows the standard, so perhaps
  1206. * the others do as well
  1207. */
  1208. SiS_Pr->SiS_UseROM = true;
  1209. } else {
  1210. /* 315/330 series stick to the standard(s) */
  1211. SiS_Pr->SiS_UseROM = true;
  1212. if((SiS_Pr->SiS_ROMNew = SiSDetermineROMLayout661(SiS_Pr))) {
  1213. SiS_Pr->SiS_EMIOffset = 14;
  1214. SiS_Pr->SiS_PWDOffset = 17;
  1215. SiS_Pr->SiS661LCD2TableSize = 36;
  1216. /* Find out about LCD data table entry size */
  1217. if((romptr = SISGETROMW(0x0102))) {
  1218. if(ROMAddr[romptr + (32 * 16)] == 0xff)
  1219. SiS_Pr->SiS661LCD2TableSize = 32;
  1220. else if(ROMAddr[romptr + (34 * 16)] == 0xff)
  1221. SiS_Pr->SiS661LCD2TableSize = 34;
  1222. else if(ROMAddr[romptr + (36 * 16)] == 0xff) /* 0.94, 2.05.00+ */
  1223. SiS_Pr->SiS661LCD2TableSize = 36;
  1224. else if( (ROMAddr[romptr + (38 * 16)] == 0xff) || /* 2.00.00 - 2.02.00 */
  1225. (ROMAddr[0x6F] & 0x01) ) { /* 2.03.00 - <2.05.00 */
  1226. SiS_Pr->SiS661LCD2TableSize = 38; /* UMC data layout abandoned at 2.05.00 */
  1227. SiS_Pr->SiS_EMIOffset = 16;
  1228. SiS_Pr->SiS_PWDOffset = 19;
  1229. }
  1230. }
  1231. }
  1232. }
  1233. }
  1234. }
  1235. /*********************************************/
  1236. /* HELPER: SET SEGMENT REGISTERS */
  1237. /*********************************************/
  1238. static void
  1239. SiS_SetSegRegLower(struct SiS_Private *SiS_Pr, unsigned short value)
  1240. {
  1241. unsigned short temp;
  1242. value &= 0x00ff;
  1243. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0xf0;
  1244. temp |= (value >> 4);
  1245. SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
  1246. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0xf0;
  1247. temp |= (value & 0x0f);
  1248. SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
  1249. }
  1250. static void
  1251. SiS_SetSegRegUpper(struct SiS_Private *SiS_Pr, unsigned short value)
  1252. {
  1253. unsigned short temp;
  1254. value &= 0x00ff;
  1255. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cb) & 0x0f;
  1256. temp |= (value & 0xf0);
  1257. SiS_SetRegByte(SiS_Pr->SiS_P3cb, temp);
  1258. temp = SiS_GetRegByte(SiS_Pr->SiS_P3cd) & 0x0f;
  1259. temp |= (value << 4);
  1260. SiS_SetRegByte(SiS_Pr->SiS_P3cd, temp);
  1261. }
  1262. static void
  1263. SiS_SetSegmentReg(struct SiS_Private *SiS_Pr, unsigned short value)
  1264. {
  1265. SiS_SetSegRegLower(SiS_Pr, value);
  1266. SiS_SetSegRegUpper(SiS_Pr, value);
  1267. }
  1268. static void
  1269. SiS_ResetSegmentReg(struct SiS_Private *SiS_Pr)
  1270. {
  1271. SiS_SetSegmentReg(SiS_Pr, 0);
  1272. }
  1273. static void
  1274. SiS_SetSegmentRegOver(struct SiS_Private *SiS_Pr, unsigned short value)
  1275. {
  1276. unsigned short temp = value >> 8;
  1277. temp &= 0x07;
  1278. temp |= (temp << 4);
  1279. SiS_SetReg(SiS_Pr->SiS_P3c4,0x1d,temp);
  1280. SiS_SetSegmentReg(SiS_Pr, value);
  1281. }
  1282. static void
  1283. SiS_ResetSegmentRegOver(struct SiS_Private *SiS_Pr)
  1284. {
  1285. SiS_SetSegmentRegOver(SiS_Pr, 0);
  1286. }
  1287. static void
  1288. SiS_ResetSegmentRegisters(struct SiS_Private *SiS_Pr)
  1289. {
  1290. if((IS_SIS65x) || (SiS_Pr->ChipType >= SIS_661)) {
  1291. SiS_ResetSegmentReg(SiS_Pr);
  1292. SiS_ResetSegmentRegOver(SiS_Pr);
  1293. }
  1294. }
  1295. /*********************************************/
  1296. /* HELPER: GetVBType */
  1297. /*********************************************/
  1298. static
  1299. void
  1300. SiS_GetVBType(struct SiS_Private *SiS_Pr)
  1301. {
  1302. unsigned short flag = 0, rev = 0, nolcd = 0;
  1303. unsigned short p4_0f, p4_25, p4_27;
  1304. SiS_Pr->SiS_VBType = 0;
  1305. if((SiS_Pr->SiS_IF_DEF_LVDS) || (SiS_Pr->SiS_IF_DEF_CONEX))
  1306. return;
  1307. if(SiS_Pr->ChipType == XGI_20)
  1308. return;
  1309. flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x00);
  1310. if(flag > 3)
  1311. return;
  1312. rev = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x01);
  1313. if(flag >= 2) {
  1314. SiS_Pr->SiS_VBType = VB_SIS302B;
  1315. } else if(flag == 1) {
  1316. if(rev >= 0xC0) {
  1317. SiS_Pr->SiS_VBType = VB_SIS301C;
  1318. } else if(rev >= 0xB0) {
  1319. SiS_Pr->SiS_VBType = VB_SIS301B;
  1320. /* Check if 30xB DH version (no LCD support, use Panel Link instead) */
  1321. nolcd = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x23);
  1322. if(!(nolcd & 0x02)) SiS_Pr->SiS_VBType |= VB_NoLCD;
  1323. } else {
  1324. SiS_Pr->SiS_VBType = VB_SIS301;
  1325. }
  1326. }
  1327. if(SiS_Pr->SiS_VBType & (VB_SIS301B | VB_SIS301C | VB_SIS302B)) {
  1328. if(rev >= 0xE0) {
  1329. flag = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x39);
  1330. if(flag == 0xff) SiS_Pr->SiS_VBType = VB_SIS302LV;
  1331. else SiS_Pr->SiS_VBType = VB_SIS301C; /* VB_SIS302ELV; */
  1332. } else if(rev >= 0xD0) {
  1333. SiS_Pr->SiS_VBType = VB_SIS301LV;
  1334. }
  1335. }
  1336. if(SiS_Pr->SiS_VBType & (VB_SIS301C | VB_SIS301LV | VB_SIS302LV | VB_SIS302ELV)) {
  1337. p4_0f = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x0f);
  1338. p4_25 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x25);
  1339. p4_27 = SiS_GetReg(SiS_Pr->SiS_Part4Port,0x27);
  1340. SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x0f,0x7f);
  1341. SiS_SetRegOR(SiS_Pr->SiS_Part4Port,0x25,0x08);
  1342. SiS_SetRegAND(SiS_Pr->SiS_Part4Port,0x27,0xfd);
  1343. if(SiS_GetReg(SiS_Pr->SiS_Part4Port,0x26) & 0x08) {
  1344. SiS_Pr->SiS_VBType |= VB_UMC;
  1345. }
  1346. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x27,p4_27);
  1347. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x25,p4_25);
  1348. SiS_SetReg(SiS_Pr->SiS_Part4Port,0x0f,p4_0f);
  1349. }
  1350. }
  1351. /*********************************************/
  1352. /* HELPER: Check RAM size */
  1353. /*********************************************/
  1354. static bool
  1355. SiS_CheckMemorySize(struct SiS_Private *SiS_Pr, unsigned short ModeNo,
  1356. unsigned short ModeIdIndex)
  1357. {
  1358. unsigned short AdapterMemSize = SiS_Pr->VideoMemorySize / (1024*1024);
  1359. unsigned short modeflag = SiS_GetModeFlag(SiS_Pr, ModeNo, ModeIdIndex);
  1360. unsigned short memorysize = ((modeflag & MemoryInfoFlag) >> MemorySizeShift) + 1;
  1361. if(!AdapterMemSize) return true;
  1362. if(AdapterMemSize < memorysize) return false;
  1363. return true;
  1364. }
  1365. /*********************************************/
  1366. /* HELPER: Get DRAM type */
  1367. /*********************************************/
  1368. #ifdef CONFIG_FB_SIS_315
  1369. static unsigned char
  1370. SiS_Get310DRAMType(struct SiS_Private *SiS_Pr)
  1371. {
  1372. unsigned char data;
  1373. if((*SiS_Pr->pSiS_SoftSetting) & SoftDRAMType) {
  1374. data = (*SiS_Pr->pSiS_SoftSetting) & 0x03;
  1375. } else {
  1376. if(SiS_Pr->ChipType >= XGI_20) {
  1377. /* Do I need this? SR17 seems to be zero anyway... */
  1378. data = 0;
  1379. } else if(SiS_Pr->ChipType >= SIS_340) {
  1380. /* TODO */
  1381. data = 0;
  1382. } if(SiS_Pr->ChipType >= SIS_661) {
  1383. if(SiS_Pr->SiS_ROMNew) {
  1384. data = ((SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0xc0) >> 6);
  1385. } else {
  1386. data = SiS_GetReg(SiS_Pr->SiS_P3d4,0x78) & 0x07;
  1387. }
  1388. } else if(IS_SIS550650740) {
  1389. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x13) & 0x07;
  1390. } else { /* 315, 330 */
  1391. data = SiS_GetReg(SiS_Pr->SiS_P3c4,0x3a) & 0x03;
  1392. if(SiS_Pr->ChipType == SIS_330) {
  1393. if(data > 1) {
  1394. switch(SiS_GetReg(SiS_Pr->SiS_P3d4,0x5f) & 0x30) {
  1395. case 0x00: data = 1; break;
  1396. case 0x10: data = 3; break;
  1397. case 0x20: data = 3; break;
  1398. case 0x30: data = 2; break;
  1399. }
  1400. } else {
  1401. data = 0;
  1402. }
  1403. }
  1404. }
  1405. }
  1406. return data;
  1407. }
  1408. static unsigned short
  1409. SiS_GetMCLK(struct SiS_Private *SiS_Pr)
  1410. {
  1411. unsigned char *ROMAddr = SiS_Pr->VirtualRomBase;
  1412. unsigned short index;
  1413. index = SiS_Get310DRAMType(SiS_Pr);
  1414. if(SiS_Pr->ChipType >= SIS_661) {
  1415. if(SiS_Pr->SiS_ROMNew) {
  1416. return((unsigned short)(SISGETROMW((0x90 + (index * 5) + 3))));
  1417. }
  1418. return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
  1419. } else if(index >= 4) {
  1420. return(SiS_Pr->SiS_MCLKData_1[index - 4].CLOCK);
  1421. } else {
  1422. return(SiS_Pr->SiS_MCLKData_0[index].CLOCK);
  1423. }
  1424. }
  1425. #endif
  1426. /*********************************************/
  1427. /* HELPER: ClearBuffer */
  1428. /*********************************************/
  1429. static void
  1430. SiS_ClearBuffer(struct SiS_Private *SiS_Pr, unsigned short ModeNo)
  1431. {
  1432. unsigned char SISIOMEMTYPE *memaddr = SiS_Pr->VideoMemoryAddress;
  1433. unsigned int memsize = SiS_Pr->VideoMemorySize;
  1434. unsigned short SISIOMEMTYPE *pBuffer;
  1435. int i;
  1436. if(!memaddr || !memsize) return;
  1437. if(SiS_Pr->SiS_ModeType >= ModeEGA) {
  1438. if(ModeNo > 0x13) {
  1439. memset_io(memaddr, 0, memsize);
  1440. } else {
  1441. pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
  1442. for(i = 0; i < 0x4000; i++) writew(0x0000, &pBuffer[i]);
  1443. }
  1444. } else if(SiS_Pr->SiS_ModeType < ModeCGA) {
  1445. pBuffer = (unsigned short SISIOMEMTYPE *)memaddr;
  1446. for(i = 0; i < 0x4000; i++) writew(0x0720, &pBuffer[i]);
  1447. } else {
  1448. memset_io(memaddr, 0, 0x8000);
  1449. }
  1450. }
  1451. /*********************************************/
  1452. /* HELPER: SearchModeID */
  1453. /*********************************************/
  1454. bool
  1455. SiS_SearchModeID(struct SiS_Private *SiS_Pr, unsigned short *ModeNo,
  1456. unsigned short *ModeIdIndex)
  1457. {
  1458. unsigned char VGAINFO = SiS_Pr->SiS_VGAINFO;
  1459. if((*ModeNo) <= 0x13) {
  1460. if((*ModeNo) <= 0x05) (*ModeNo) |= 0x01;
  1461. for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
  1462. if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == (*ModeNo)) break;
  1463. if(SiS_Pr->SiS_SModeIDTable[(*ModeIdIndex)].St_ModeID == 0xFF) return false;
  1464. }
  1465. if((*ModeNo) == 0x07) {
  1466. if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
  1467. /* else 350 lines */
  1468. }
  1469. if((*ModeNo) <= 0x03) {
  1470. if(!(VGAINFO & 0x80)) (*ModeIdIndex)++;
  1471. if(VGAINFO & 0x10) (*ModeIdIndex)++; /* 400 lines */
  1472. /* else 350 lines */
  1473. }
  1474. /* else 200 lines */
  1475. } else {
  1476. for((*ModeIdIndex) = 0; ;(*ModeIdIndex)++) {
  1477. if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == (*ModeNo)) break;
  1478. if(SiS_Pr->SiS_EModeIDTable[(*ModeIdIndex)].Ext_ModeID == 0xFF) return false;
  1479. }
  1480. }
  1481. return true;
  1482. }
  1483. /*********************************************/
  1484. /* HELPER: GetModePtr */
  1485. /*********************************************/
  1486. unsigned short
  1487. SiS_GetModePtr(struct SiS_Private *SiS_Pr, unsigned short ModeNo, unsigned short ModeIdIndex)
  1488. {
  1489. unsigned short index;
  1490. if(ModeNo <= 0x13) {
  1491. index = SiS_Pr->SiS_SModeIDTable[ModeIdIndex].St_StTableIndex;
  1492. } else {
  1493. if(SiS_Pr->SiS_ModeType <= ModeEGA) index = 0x1B;
  1494. else index = 0x0F;
  1495. }
  1496. return index;
  1497. }
  1498. /****************************************…