/drivers/usb/host/ehci-hub.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C · 1091 lines · 749 code · 138 blank · 204 comment · 169 complexity · 9eb1158a1535498b825a368d2985f4c4 MD5 · raw file

  1. /*
  2. * Copyright (C) 2001-2004 by David Brownell
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms of the GNU General Public License as published by the
  6. * Free Software Foundation; either version 2 of the License, or (at your
  7. * option) any later version.
  8. *
  9. * This program is distributed in the hope that it will be useful, but
  10. * WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  11. * or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
  12. * for more details.
  13. *
  14. * You should have received a copy of the GNU General Public License
  15. * along with this program; if not, write to the Free Software Foundation,
  16. * Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  17. */
  18. /* this file is part of ehci-hcd.c */
  19. /*-------------------------------------------------------------------------*/
  20. /*
  21. * EHCI Root Hub ... the nonsharable stuff
  22. *
  23. * Registers don't need cpu_to_le32, that happens transparently
  24. */
  25. /*-------------------------------------------------------------------------*/
  26. #define PORT_WAKE_BITS (PORT_WKOC_E|PORT_WKDISC_E|PORT_WKCONN_E)
  27. #ifdef CONFIG_PM
  28. static int ehci_hub_control(
  29. struct usb_hcd *hcd,
  30. u16 typeReq,
  31. u16 wValue,
  32. u16 wIndex,
  33. char *buf,
  34. u16 wLength
  35. );
  36. /* After a power loss, ports that were owned by the companion must be
  37. * reset so that the companion can still own them.
  38. */
  39. static void ehci_handover_companion_ports(struct ehci_hcd *ehci)
  40. {
  41. u32 __iomem *reg;
  42. u32 status;
  43. int port;
  44. __le32 buf;
  45. struct usb_hcd *hcd = ehci_to_hcd(ehci);
  46. if (!ehci->owned_ports)
  47. return;
  48. /* Give the connections some time to appear */
  49. msleep(20);
  50. port = HCS_N_PORTS(ehci->hcs_params);
  51. while (port--) {
  52. if (test_bit(port, &ehci->owned_ports)) {
  53. reg = &ehci->regs->port_status[port];
  54. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  55. /* Port already owned by companion? */
  56. if (status & PORT_OWNER)
  57. clear_bit(port, &ehci->owned_ports);
  58. else if (test_bit(port, &ehci->companion_ports))
  59. ehci_writel(ehci, status & ~PORT_PE, reg);
  60. else
  61. ehci_hub_control(hcd, SetPortFeature,
  62. USB_PORT_FEAT_RESET, port + 1,
  63. NULL, 0);
  64. }
  65. }
  66. if (!ehci->owned_ports)
  67. return;
  68. msleep(90); /* Wait for resets to complete */
  69. port = HCS_N_PORTS(ehci->hcs_params);
  70. while (port--) {
  71. if (test_bit(port, &ehci->owned_ports)) {
  72. ehci_hub_control(hcd, GetPortStatus,
  73. 0, port + 1,
  74. (char *) &buf, sizeof(buf));
  75. /* The companion should now own the port,
  76. * but if something went wrong the port must not
  77. * remain enabled.
  78. */
  79. reg = &ehci->regs->port_status[port];
  80. status = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  81. if (status & PORT_OWNER)
  82. ehci_writel(ehci, status | PORT_CSC, reg);
  83. else {
  84. ehci_dbg(ehci, "failed handover port %d: %x\n",
  85. port + 1, status);
  86. ehci_writel(ehci, status & ~PORT_PE, reg);
  87. }
  88. }
  89. }
  90. ehci->owned_ports = 0;
  91. }
  92. static int ehci_port_change(struct ehci_hcd *ehci)
  93. {
  94. int i = HCS_N_PORTS(ehci->hcs_params);
  95. /* First check if the controller indicates a change event */
  96. if (ehci_readl(ehci, &ehci->regs->status) & STS_PCD)
  97. return 1;
  98. /*
  99. * Not all controllers appear to update this while going from D3 to D0,
  100. * so check the individual port status registers as well
  101. */
  102. while (i--)
  103. if (ehci_readl(ehci, &ehci->regs->port_status[i]) & PORT_CSC)
  104. return 1;
  105. return 0;
  106. }
  107. static __maybe_unused void ehci_adjust_port_wakeup_flags(struct ehci_hcd *ehci,
  108. bool suspending, bool do_wakeup)
  109. {
  110. int port;
  111. u32 temp;
  112. unsigned long flags;
  113. /* If remote wakeup is enabled for the root hub but disabled
  114. * for the controller, we must adjust all the port wakeup flags
  115. * when the controller is suspended or resumed. In all other
  116. * cases they don't need to be changed.
  117. */
  118. if (!ehci_to_hcd(ehci)->self.root_hub->do_remote_wakeup || do_wakeup)
  119. return;
  120. spin_lock_irqsave(&ehci->lock, flags);
  121. /* clear phy low-power mode before changing wakeup flags */
  122. if (ehci->has_hostpc && !ehci->broken_hostpc_phcd) {
  123. port = HCS_N_PORTS(ehci->hcs_params);
  124. while (port--) {
  125. u32 __iomem *hostpc_reg;
  126. hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
  127. + HOSTPC0 + 4 * port);
  128. temp = ehci_readl(ehci, hostpc_reg);
  129. ehci_writel(ehci, temp & ~HOSTPC_PHCD, hostpc_reg);
  130. }
  131. spin_unlock_irqrestore(&ehci->lock, flags);
  132. msleep(5);
  133. spin_lock_irqsave(&ehci->lock, flags);
  134. }
  135. port = HCS_N_PORTS(ehci->hcs_params);
  136. while (port--) {
  137. u32 __iomem *reg = &ehci->regs->port_status[port];
  138. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  139. u32 t2 = t1 & ~PORT_WAKE_BITS;
  140. /* If we are suspending the controller, clear the flags.
  141. * If we are resuming the controller, set the wakeup flags.
  142. */
  143. if (!suspending) {
  144. if (t1 & PORT_CONNECT)
  145. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  146. else
  147. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  148. }
  149. ehci_vdbg(ehci, "port %d, %08x -> %08x\n",
  150. port + 1, t1, t2);
  151. ehci_writel(ehci, t2, reg);
  152. }
  153. /* enter phy low-power mode again */
  154. if (ehci->has_hostpc && !ehci->broken_hostpc_phcd) {
  155. port = HCS_N_PORTS(ehci->hcs_params);
  156. while (port--) {
  157. u32 __iomem *hostpc_reg;
  158. hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
  159. + HOSTPC0 + 4 * port);
  160. temp = ehci_readl(ehci, hostpc_reg);
  161. ehci_writel(ehci, temp | HOSTPC_PHCD, hostpc_reg);
  162. }
  163. }
  164. /* Does the root hub have a port wakeup pending? */
  165. if (!suspending && ehci_port_change(ehci))
  166. usb_hcd_resume_root_hub(ehci_to_hcd(ehci));
  167. spin_unlock_irqrestore(&ehci->lock, flags);
  168. }
  169. static int ehci_bus_suspend (struct usb_hcd *hcd)
  170. {
  171. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  172. int port;
  173. int mask;
  174. int changed;
  175. ehci_dbg(ehci, "suspend root hub\n");
  176. if (time_before (jiffies, ehci->next_statechange))
  177. msleep(5);
  178. del_timer_sync(&ehci->watchdog);
  179. del_timer_sync(&ehci->iaa_watchdog);
  180. spin_lock_irq (&ehci->lock);
  181. /* Once the controller is stopped, port resumes that are already
  182. * in progress won't complete. Hence if remote wakeup is enabled
  183. * for the root hub and any ports are in the middle of a resume or
  184. * remote wakeup, we must fail the suspend.
  185. */
  186. if (hcd->self.root_hub->do_remote_wakeup) {
  187. port = HCS_N_PORTS(ehci->hcs_params);
  188. while (port--) {
  189. if (ehci->reset_done[port] != 0) {
  190. spin_unlock_irq(&ehci->lock);
  191. ehci_dbg(ehci, "suspend failed because "
  192. "port %d is resuming\n",
  193. port + 1);
  194. return -EBUSY;
  195. }
  196. }
  197. }
  198. /* stop schedules, clean any completed work */
  199. if (HC_IS_RUNNING(hcd->state)) {
  200. ehci_quiesce (ehci);
  201. hcd->state = HC_STATE_QUIESCING;
  202. }
  203. ehci->command = ehci_readl(ehci, &ehci->regs->command);
  204. ehci_work(ehci);
  205. /* Unlike other USB host controller types, EHCI doesn't have
  206. * any notion of "global" or bus-wide suspend. The driver has
  207. * to manually suspend all the active unsuspended ports, and
  208. * then manually resume them in the bus_resume() routine.
  209. */
  210. ehci->bus_suspended = 0;
  211. ehci->owned_ports = 0;
  212. changed = 0;
  213. port = HCS_N_PORTS(ehci->hcs_params);
  214. while (port--) {
  215. u32 __iomem *reg = &ehci->regs->port_status [port];
  216. u32 t1 = ehci_readl(ehci, reg) & ~PORT_RWC_BITS;
  217. u32 t2 = t1 & ~PORT_WAKE_BITS;
  218. /* keep track of which ports we suspend */
  219. if (t1 & PORT_OWNER)
  220. set_bit(port, &ehci->owned_ports);
  221. else if ((t1 & PORT_PE) && !(t1 & PORT_SUSPEND)) {
  222. t2 |= PORT_SUSPEND;
  223. set_bit(port, &ehci->bus_suspended);
  224. }
  225. /* enable remote wakeup on all ports, if told to do so */
  226. if (hcd->self.root_hub->do_remote_wakeup) {
  227. /* only enable appropriate wake bits, otherwise the
  228. * hardware can not go phy low power mode. If a race
  229. * condition happens here(connection change during bits
  230. * set), the port change detection will finally fix it.
  231. */
  232. if (t1 & PORT_CONNECT)
  233. t2 |= PORT_WKOC_E | PORT_WKDISC_E;
  234. else
  235. t2 |= PORT_WKOC_E | PORT_WKCONN_E;
  236. }
  237. if (t1 != t2) {
  238. ehci_vdbg (ehci, "port %d, %08x -> %08x\n",
  239. port + 1, t1, t2);
  240. ehci_writel(ehci, t2, reg);
  241. changed = 1;
  242. }
  243. }
  244. #ifdef CONFIG_ARCH_TEGRA_2x_SOC
  245. if (changed && ehci->has_hostpc && !ehci->broken_hostpc_phcd) {
  246. spin_unlock_irq(&ehci->lock);
  247. msleep(5); /* 5 ms for HCD to enter low-power mode */
  248. spin_lock_irq(&ehci->lock);
  249. port = HCS_N_PORTS(ehci->hcs_params);
  250. while (port--) {
  251. u32 __iomem *hostpc_reg;
  252. u32 t3;
  253. hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
  254. + HOSTPC0 + 4 * port);
  255. t3 = ehci_readl(ehci, hostpc_reg);
  256. ehci_writel(ehci, t3 | HOSTPC_PHCD, hostpc_reg);
  257. t3 = ehci_readl(ehci, hostpc_reg);
  258. ehci_dbg(ehci, "Port %d phy low-power mode %s\n",
  259. port, (t3 & HOSTPC_PHCD) ?
  260. "succeeded" : "failed");
  261. }
  262. }
  263. #endif
  264. /* Apparently some devices need a >= 1-uframe delay here */
  265. if (ehci->bus_suspended)
  266. udelay(150);
  267. /* turn off now-idle HC */
  268. ehci_halt (ehci);
  269. hcd->state = HC_STATE_SUSPENDED;
  270. if (ehci->reclaim)
  271. end_unlink_async(ehci);
  272. /* allow remote wakeup */
  273. mask = INTR_MASK;
  274. if (!hcd->self.root_hub->do_remote_wakeup)
  275. mask &= ~STS_PCD;
  276. ehci_writel(ehci, mask, &ehci->regs->intr_enable);
  277. ehci_readl(ehci, &ehci->regs->intr_enable);
  278. ehci->next_statechange = jiffies + msecs_to_jiffies(10);
  279. spin_unlock_irq (&ehci->lock);
  280. /* ehci_work() may have re-enabled the watchdog timer, which we do not
  281. * want, and so we must delete any pending watchdog timer events.
  282. */
  283. del_timer_sync(&ehci->watchdog);
  284. return 0;
  285. }
  286. /* caller has locked the root hub, and should reset/reinit on error */
  287. static int ehci_bus_resume (struct usb_hcd *hcd)
  288. {
  289. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  290. u32 temp;
  291. u32 power_okay;
  292. int i;
  293. unsigned long resume_needed = 0;
  294. if (time_before (jiffies, ehci->next_statechange))
  295. msleep(5);
  296. spin_lock_irq (&ehci->lock);
  297. if (!HCD_HW_ACCESSIBLE(hcd)) {
  298. spin_unlock_irq(&ehci->lock);
  299. return -ESHUTDOWN;
  300. }
  301. if (unlikely(ehci->debug)) {
  302. if (!dbgp_reset_prep())
  303. ehci->debug = NULL;
  304. else
  305. dbgp_external_startup();
  306. }
  307. /* Ideally and we've got a real resume here, and no port's power
  308. * was lost. (For PCI, that means Vaux was maintained.) But we
  309. * could instead be restoring a swsusp snapshot -- so that BIOS was
  310. * the last user of the controller, not reset/pm hardware keeping
  311. * state we gave to it.
  312. */
  313. power_okay = ehci_readl(ehci, &ehci->regs->intr_enable);
  314. ehci_dbg(ehci, "resume root hub%s\n",
  315. power_okay ? "" : " after power loss");
  316. /* at least some APM implementations will try to deliver
  317. * IRQs right away, so delay them until we're ready.
  318. */
  319. ehci_writel(ehci, 0, &ehci->regs->intr_enable);
  320. /* re-init operational registers */
  321. ehci_writel(ehci, 0, &ehci->regs->segment);
  322. ehci_writel(ehci, ehci->periodic_dma, &ehci->regs->frame_list);
  323. ehci_writel(ehci, (u32) ehci->async->qh_dma, &ehci->regs->async_next);
  324. /* restore CMD_RUN, framelist size, and irq threshold */
  325. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  326. /* Some controller/firmware combinations need a delay during which
  327. * they set up the port statuses. See Bugzilla #8190. */
  328. spin_unlock_irq(&ehci->lock);
  329. msleep(8);
  330. spin_lock_irq(&ehci->lock);
  331. /* clear phy low-power mode before resume */
  332. if (ehci->bus_suspended && ehci->has_hostpc && !ehci->broken_hostpc_phcd) {
  333. i = HCS_N_PORTS(ehci->hcs_params);
  334. while (i--) {
  335. if (test_bit(i, &ehci->bus_suspended)) {
  336. u32 __iomem *hostpc_reg;
  337. hostpc_reg = (u32 __iomem *)((u8 *) ehci->regs
  338. + HOSTPC0 + 4 * i);
  339. temp = ehci_readl(ehci, hostpc_reg);
  340. ehci_writel(ehci, temp & ~HOSTPC_PHCD,
  341. hostpc_reg);
  342. }
  343. }
  344. spin_unlock_irq(&ehci->lock);
  345. msleep(5);
  346. spin_lock_irq(&ehci->lock);
  347. }
  348. /* manually resume the ports we suspended during bus_suspend() */
  349. i = HCS_N_PORTS (ehci->hcs_params);
  350. while (i--) {
  351. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  352. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  353. if (test_bit(i, &ehci->bus_suspended) &&
  354. (temp & PORT_SUSPEND)) {
  355. temp |= PORT_RESUME;
  356. set_bit(i, &resume_needed);
  357. }
  358. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  359. }
  360. /* msleep for 20ms only if code is trying to resume port */
  361. if (resume_needed) {
  362. spin_unlock_irq(&ehci->lock);
  363. msleep(20);
  364. spin_lock_irq(&ehci->lock);
  365. }
  366. i = HCS_N_PORTS (ehci->hcs_params);
  367. while (i--) {
  368. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  369. if (test_bit(i, &resume_needed)) {
  370. temp &= ~(PORT_RWC_BITS | PORT_RESUME);
  371. ehci_writel(ehci, temp, &ehci->regs->port_status [i]);
  372. ehci_vdbg (ehci, "resumed port %d\n", i + 1);
  373. }
  374. }
  375. (void) ehci_readl(ehci, &ehci->regs->command);
  376. /* maybe re-activate the schedule(s) */
  377. temp = 0;
  378. if (ehci->async->qh_next.qh)
  379. temp |= CMD_ASE;
  380. if (ehci->periodic_sched)
  381. temp |= CMD_PSE;
  382. if (temp) {
  383. ehci->command |= temp;
  384. ehci_writel(ehci, ehci->command, &ehci->regs->command);
  385. }
  386. ehci->next_statechange = jiffies + msecs_to_jiffies(5);
  387. hcd->state = HC_STATE_RUNNING;
  388. /* Now we can safely re-enable irqs */
  389. ehci_writel(ehci, INTR_MASK, &ehci->regs->intr_enable);
  390. spin_unlock_irq (&ehci->lock);
  391. ehci_handover_companion_ports(ehci);
  392. return 0;
  393. }
  394. #else
  395. #define ehci_bus_suspend NULL
  396. #define ehci_bus_resume NULL
  397. #endif /* CONFIG_PM */
  398. /*-------------------------------------------------------------------------*/
  399. /*
  400. * Sets the owner of a port
  401. */
  402. static void set_owner(struct ehci_hcd *ehci, int portnum, int new_owner)
  403. {
  404. u32 __iomem *status_reg;
  405. u32 port_status;
  406. int try;
  407. status_reg = &ehci->regs->port_status[portnum];
  408. /*
  409. * The controller won't set the OWNER bit if the port is
  410. * enabled, so this loop will sometimes require at least two
  411. * iterations: one to disable the port and one to set OWNER.
  412. */
  413. for (try = 4; try > 0; --try) {
  414. spin_lock_irq(&ehci->lock);
  415. port_status = ehci_readl(ehci, status_reg);
  416. if ((port_status & PORT_OWNER) == new_owner
  417. || (port_status & (PORT_OWNER | PORT_CONNECT))
  418. == 0)
  419. try = 0;
  420. else {
  421. port_status ^= PORT_OWNER;
  422. port_status &= ~(PORT_PE | PORT_RWC_BITS);
  423. ehci_writel(ehci, port_status, status_reg);
  424. }
  425. spin_unlock_irq(&ehci->lock);
  426. if (try > 1)
  427. msleep(5);
  428. }
  429. }
  430. /*-------------------------------------------------------------------------*/
  431. static int check_reset_complete (
  432. struct ehci_hcd *ehci,
  433. int index,
  434. u32 __iomem *status_reg,
  435. int port_status
  436. ) {
  437. if (!(port_status & PORT_CONNECT))
  438. return port_status;
  439. /* if reset finished and it's still not enabled -- handoff */
  440. if (!(port_status & PORT_PE)) {
  441. /* with integrated TT, there's nobody to hand it to! */
  442. if (ehci_is_TDI(ehci)) {
  443. ehci_dbg (ehci,
  444. "Failed to enable port %d on root hub TT\n",
  445. index+1);
  446. return port_status;
  447. }
  448. ehci_dbg (ehci, "port %d full speed --> companion\n",
  449. index + 1);
  450. // what happens if HCS_N_CC(params) == 0 ?
  451. port_status |= PORT_OWNER;
  452. port_status &= ~PORT_RWC_BITS;
  453. ehci_writel(ehci, port_status, status_reg);
  454. /* ensure 440EPX ohci controller state is operational */
  455. if (ehci->has_amcc_usb23)
  456. set_ohci_hcfs(ehci, 1);
  457. } else {
  458. ehci_dbg (ehci, "port %d high speed\n", index + 1);
  459. /* ensure 440EPx ohci controller state is suspended */
  460. if (ehci->has_amcc_usb23)
  461. set_ohci_hcfs(ehci, 0);
  462. }
  463. return port_status;
  464. }
  465. /*-------------------------------------------------------------------------*/
  466. /* build "status change" packet (one or two bytes) from HC registers */
  467. static int
  468. ehci_hub_status_data (struct usb_hcd *hcd, char *buf)
  469. {
  470. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  471. u32 temp, status = 0;
  472. u32 mask;
  473. int ports, i, retval = 1;
  474. unsigned long flags;
  475. u32 ppcd = 0;
  476. /* if !USB_SUSPEND, root hub timers won't get shut down ... */
  477. if (!HC_IS_RUNNING(hcd->state))
  478. return 0;
  479. /* init status to no-changes */
  480. buf [0] = 0;
  481. ports = HCS_N_PORTS (ehci->hcs_params);
  482. if (ports > 7) {
  483. buf [1] = 0;
  484. retval++;
  485. }
  486. /* Some boards (mostly VIA?) report bogus overcurrent indications,
  487. * causing massive log spam unless we completely ignore them. It
  488. * may be relevant that VIA VT8235 controllers, where PORT_POWER is
  489. * always set, seem to clear PORT_OCC and PORT_CSC when writing to
  490. * PORT_POWER; that's surprising, but maybe within-spec.
  491. */
  492. if (!ignore_oc)
  493. mask = PORT_CSC | PORT_PEC | PORT_OCC;
  494. else
  495. mask = PORT_CSC | PORT_PEC;
  496. // PORT_RESUME from hardware ~= PORT_STAT_C_SUSPEND
  497. /* no hub change reports (bit 0) for now (power, ...) */
  498. /* port N changes (bit N)? */
  499. spin_lock_irqsave (&ehci->lock, flags);
  500. /* get per-port change detect bits */
  501. if (ehci->has_ppcd)
  502. ppcd = ehci_readl(ehci, &ehci->regs->status) >> 16;
  503. for (i = 0; i < ports; i++) {
  504. /* leverage per-port change bits feature */
  505. if (ehci->has_ppcd && !(ppcd & (1 << i)))
  506. continue;
  507. temp = ehci_readl(ehci, &ehci->regs->port_status [i]);
  508. /*
  509. * Return status information even for ports with OWNER set.
  510. * Otherwise khubd wouldn't see the disconnect event when a
  511. * high-speed device is switched over to the companion
  512. * controller by the user.
  513. */
  514. if ((temp & mask) != 0 || test_bit(i, &ehci->port_c_suspend)
  515. || (ehci->reset_done[i] && time_after_eq(
  516. jiffies, ehci->reset_done[i]))) {
  517. if (i < 7)
  518. buf [0] |= 1 << (i + 1);
  519. else
  520. buf [1] |= 1 << (i - 7);
  521. status = STS_PCD;
  522. }
  523. }
  524. /* FIXME autosuspend idle root hubs */
  525. spin_unlock_irqrestore (&ehci->lock, flags);
  526. return status ? retval : 0;
  527. }
  528. /*-------------------------------------------------------------------------*/
  529. static void
  530. ehci_hub_descriptor (
  531. struct ehci_hcd *ehci,
  532. struct usb_hub_descriptor *desc
  533. ) {
  534. int ports = HCS_N_PORTS (ehci->hcs_params);
  535. u16 temp;
  536. desc->bDescriptorType = 0x29;
  537. desc->bPwrOn2PwrGood = 10; /* ehci 1.0, 2.3.9 says 20ms max */
  538. desc->bHubContrCurrent = 0;
  539. desc->bNbrPorts = ports;
  540. temp = 1 + (ports / 8);
  541. desc->bDescLength = 7 + 2 * temp;
  542. /* two bitmaps: ports removable, and usb 1.0 legacy PortPwrCtrlMask */
  543. memset(&desc->u.hs.DeviceRemovable[0], 0, temp);
  544. memset(&desc->u.hs.DeviceRemovable[temp], 0xff, temp);
  545. temp = 0x0008; /* per-port overcurrent reporting */
  546. if (HCS_PPC (ehci->hcs_params))
  547. temp |= 0x0001; /* per-port power control */
  548. else
  549. temp |= 0x0002; /* no power switching */
  550. #if 0
  551. // re-enable when we support USB_PORT_FEAT_INDICATOR below.
  552. if (HCS_INDICATOR (ehci->hcs_params))
  553. temp |= 0x0080; /* per-port indicators (LEDs) */
  554. #endif
  555. desc->wHubCharacteristics = cpu_to_le16(temp);
  556. }
  557. /*-------------------------------------------------------------------------*/
  558. static int ehci_hub_control (
  559. struct usb_hcd *hcd,
  560. u16 typeReq,
  561. u16 wValue,
  562. u16 wIndex,
  563. char *buf,
  564. u16 wLength
  565. ) {
  566. struct ehci_hcd *ehci = hcd_to_ehci (hcd);
  567. int ports = HCS_N_PORTS (ehci->hcs_params);
  568. u32 __iomem *status_reg = &ehci->regs->port_status[
  569. (wIndex & 0xff) - 1];
  570. u32 __iomem *hostpc_reg = NULL;
  571. u32 temp, temp1, status;
  572. unsigned long flags;
  573. int retval = 0;
  574. unsigned selector;
  575. /*
  576. * FIXME: support SetPortFeatures USB_PORT_FEAT_INDICATOR.
  577. * HCS_INDICATOR may say we can change LEDs to off/amber/green.
  578. * (track current state ourselves) ... blink for diagnostics,
  579. * power, "this is the one", etc. EHCI spec supports this.
  580. */
  581. if (ehci->has_hostpc)
  582. hostpc_reg = (u32 __iomem *)((u8 *)ehci->regs
  583. + HOSTPC0 + 4 * ((wIndex & 0xff) - 1));
  584. spin_lock_irqsave (&ehci->lock, flags);
  585. switch (typeReq) {
  586. case ClearHubFeature:
  587. switch (wValue) {
  588. case C_HUB_LOCAL_POWER:
  589. case C_HUB_OVER_CURRENT:
  590. /* no hub-wide feature/status flags */
  591. break;
  592. default:
  593. goto error;
  594. }
  595. break;
  596. case ClearPortFeature:
  597. if (!wIndex || wIndex > ports)
  598. goto error;
  599. wIndex--;
  600. temp = ehci_readl(ehci, status_reg);
  601. /*
  602. * Even if OWNER is set, so the port is owned by the
  603. * companion controller, khubd needs to be able to clear
  604. * the port-change status bits (especially
  605. * USB_PORT_STAT_C_CONNECTION).
  606. */
  607. switch (wValue) {
  608. case USB_PORT_FEAT_ENABLE:
  609. ehci_writel(ehci, temp & ~PORT_PE, status_reg);
  610. break;
  611. case USB_PORT_FEAT_C_ENABLE:
  612. ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_PEC,
  613. status_reg);
  614. break;
  615. case USB_PORT_FEAT_SUSPEND:
  616. if (temp & PORT_RESET)
  617. goto error;
  618. if (ehci->no_selective_suspend)
  619. break;
  620. if (!(temp & PORT_SUSPEND))
  621. break;
  622. if ((temp & PORT_PE) == 0)
  623. goto error;
  624. /* clear phy low-power mode before resume */
  625. if (hostpc_reg && !ehci->broken_hostpc_phcd) {
  626. temp1 = ehci_readl(ehci, hostpc_reg);
  627. ehci_writel(ehci, temp1 & ~HOSTPC_PHCD,
  628. hostpc_reg);
  629. spin_unlock_irqrestore(&ehci->lock, flags);
  630. msleep(5);/* wait to leave low-power mode */
  631. spin_lock_irqsave(&ehci->lock, flags);
  632. }
  633. /* resume signaling for 20 msec */
  634. temp &= ~(PORT_RWC_BITS | PORT_WAKE_BITS);
  635. ehci_writel(ehci, temp | PORT_RESUME, status_reg);
  636. ehci->reset_done[wIndex] = jiffies
  637. + msecs_to_jiffies(20);
  638. break;
  639. case USB_PORT_FEAT_C_SUSPEND:
  640. clear_bit(wIndex, &ehci->port_c_suspend);
  641. break;
  642. case USB_PORT_FEAT_POWER:
  643. if (HCS_PPC (ehci->hcs_params))
  644. ehci_writel(ehci,
  645. temp & ~(PORT_RWC_BITS | PORT_POWER),
  646. status_reg);
  647. break;
  648. case USB_PORT_FEAT_C_CONNECTION:
  649. if (ehci->has_lpm) {
  650. /* clear PORTSC bits on disconnect */
  651. temp &= ~PORT_LPM;
  652. temp &= ~PORT_DEV_ADDR;
  653. }
  654. ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_CSC,
  655. status_reg);
  656. break;
  657. case USB_PORT_FEAT_C_OVER_CURRENT:
  658. ehci_writel(ehci, (temp & ~PORT_RWC_BITS) | PORT_OCC,
  659. status_reg);
  660. break;
  661. case USB_PORT_FEAT_C_RESET:
  662. /* GetPortStatus clears reset */
  663. break;
  664. default:
  665. goto error;
  666. }
  667. ehci_readl(ehci, &ehci->regs->command); /* unblock posted write */
  668. break;
  669. case GetHubDescriptor:
  670. ehci_hub_descriptor (ehci, (struct usb_hub_descriptor *)
  671. buf);
  672. break;
  673. case GetHubStatus:
  674. /* no hub-wide feature/status flags */
  675. memset (buf, 0, 4);
  676. //cpu_to_le32s ((u32 *) buf);
  677. break;
  678. case GetPortStatus:
  679. if (!wIndex || wIndex > ports)
  680. goto error;
  681. wIndex--;
  682. status = 0;
  683. temp = ehci_readl(ehci, status_reg);
  684. // wPortChange bits
  685. if (temp & PORT_CSC)
  686. status |= USB_PORT_STAT_C_CONNECTION << 16;
  687. if (temp & PORT_PEC)
  688. status |= USB_PORT_STAT_C_ENABLE << 16;
  689. if ((temp & PORT_OCC) && !ignore_oc){
  690. status |= USB_PORT_STAT_C_OVERCURRENT << 16;
  691. /*
  692. * Hubs should disable port power on over-current.
  693. * However, not all EHCI implementations do this
  694. * automatically, even if they _do_ support per-port
  695. * power switching; they're allowed to just limit the
  696. * current. khubd will turn the power back on.
  697. */
  698. if ((temp & PORT_OC) && HCS_PPC(ehci->hcs_params)) {
  699. ehci_writel(ehci,
  700. temp & ~(PORT_RWC_BITS | PORT_POWER),
  701. status_reg);
  702. temp = ehci_readl(ehci, status_reg);
  703. }
  704. }
  705. /* whoever resumes must GetPortStatus to complete it!! */
  706. if (temp & PORT_RESUME) {
  707. /* Remote Wakeup received? */
  708. if (!ehci->reset_done[wIndex]) {
  709. /* resume signaling for 20 msec */
  710. ehci->reset_done[wIndex] = jiffies
  711. + msecs_to_jiffies(20);
  712. /* check the port again */
  713. mod_timer(&ehci_to_hcd(ehci)->rh_timer,
  714. ehci->reset_done[wIndex]);
  715. }
  716. /* resume completed? */
  717. else if (time_after_eq(jiffies,
  718. ehci->reset_done[wIndex])) {
  719. clear_bit(wIndex, &ehci->suspended_ports);
  720. set_bit(wIndex, &ehci->port_c_suspend);
  721. ehci->reset_done[wIndex] = 0;
  722. /* stop resume signaling */
  723. temp = ehci_readl(ehci, status_reg);
  724. ehci_writel(ehci,
  725. temp & ~(PORT_RWC_BITS | PORT_RESUME),
  726. status_reg);
  727. retval = handshake(ehci, status_reg,
  728. PORT_RESUME, 0, 2000 /* 2msec */);
  729. if (retval != 0) {
  730. ehci_err(ehci,
  731. "port %d resume error %d\n",
  732. wIndex + 1, retval);
  733. goto error;
  734. }
  735. temp &= ~(PORT_SUSPEND|PORT_RESUME|(3<<10));
  736. }
  737. }
  738. /* whoever resets must GetPortStatus to complete it!! */
  739. if ((temp & PORT_RESET)
  740. && time_after_eq(jiffies,
  741. ehci->reset_done[wIndex])) {
  742. status |= USB_PORT_STAT_C_RESET << 16;
  743. ehci->reset_done [wIndex] = 0;
  744. /* force reset to complete */
  745. ehci_writel(ehci, temp & ~(PORT_RWC_BITS | PORT_RESET),
  746. status_reg);
  747. /* REVISIT: some hardware needs 550+ usec to clear
  748. * this bit; seems too long to spin routinely...
  749. */
  750. retval = handshake(ehci, status_reg,
  751. PORT_RESET, 0, 1000);
  752. if (retval != 0) {
  753. ehci_err (ehci, "port %d reset error %d\n",
  754. wIndex + 1, retval);
  755. goto error;
  756. }
  757. /* see what we found out */
  758. temp = check_reset_complete (ehci, wIndex, status_reg,
  759. ehci_readl(ehci, status_reg));
  760. }
  761. if (!(temp & (PORT_RESUME|PORT_RESET)))
  762. ehci->reset_done[wIndex] = 0;
  763. /* transfer dedicated ports to the companion hc */
  764. if ((temp & PORT_CONNECT) &&
  765. test_bit(wIndex, &ehci->companion_ports)) {
  766. temp &= ~PORT_RWC_BITS;
  767. temp |= PORT_OWNER;
  768. ehci_writel(ehci, temp, status_reg);
  769. ehci_dbg(ehci, "port %d --> companion\n", wIndex + 1);
  770. temp = ehci_readl(ehci, status_reg);
  771. }
  772. /*
  773. * Even if OWNER is set, there's no harm letting khubd
  774. * see the wPortStatus values (they should all be 0 except
  775. * for PORT_POWER anyway).
  776. */
  777. if (temp & PORT_CONNECT) {
  778. status |= USB_PORT_STAT_CONNECTION;
  779. // status may be from integrated TT
  780. if (ehci->has_hostpc) {
  781. temp1 = ehci_readl(ehci, hostpc_reg);
  782. status |= ehci_port_speed(ehci, temp1);
  783. } else
  784. status |= ehci_port_speed(ehci, temp);
  785. }
  786. if (temp & PORT_PE)
  787. status |= USB_PORT_STAT_ENABLE;
  788. /* maybe the port was unsuspended without our knowledge */
  789. if (temp & (PORT_SUSPEND|PORT_RESUME)) {
  790. status |= USB_PORT_STAT_SUSPEND;
  791. } else if (test_bit(wIndex, &ehci->suspended_ports)) {
  792. clear_bit(wIndex, &ehci->suspended_ports);
  793. ehci->reset_done[wIndex] = 0;
  794. if (temp & PORT_PE)
  795. set_bit(wIndex, &ehci->port_c_suspend);
  796. }
  797. if (temp & PORT_OC)
  798. status |= USB_PORT_STAT_OVERCURRENT;
  799. if (temp & PORT_RESET)
  800. status |= USB_PORT_STAT_RESET;
  801. if (temp & PORT_POWER)
  802. status |= USB_PORT_STAT_POWER;
  803. if (test_bit(wIndex, &ehci->port_c_suspend))
  804. status |= USB_PORT_STAT_C_SUSPEND << 16;
  805. #ifndef VERBOSE_DEBUG
  806. if (status & ~0xffff) /* only if wPortChange is interesting */
  807. #endif
  808. dbg_port (ehci, "GetStatus", wIndex + 1, temp);
  809. put_unaligned_le32(status, buf);
  810. break;
  811. case SetHubFeature:
  812. switch (wValue) {
  813. case C_HUB_LOCAL_POWER:
  814. case C_HUB_OVER_CURRENT:
  815. /* no hub-wide feature/status flags */
  816. break;
  817. default:
  818. goto error;
  819. }
  820. break;
  821. case SetPortFeature:
  822. selector = wIndex >> 8;
  823. wIndex &= 0xff;
  824. if (unlikely(ehci->debug)) {
  825. /* If the debug port is active any port
  826. * feature requests should get denied */
  827. if (wIndex == HCS_DEBUG_PORT(ehci->hcs_params) &&
  828. (readl(&ehci->debug->control) & DBGP_ENABLED)) {
  829. retval = -ENODEV;
  830. goto error_exit;
  831. }
  832. }
  833. if (!wIndex || wIndex > ports)
  834. goto error;
  835. wIndex--;
  836. temp = ehci_readl(ehci, status_reg);
  837. if (temp & PORT_OWNER)
  838. break;
  839. temp &= ~PORT_RWC_BITS;
  840. switch (wValue) {
  841. case USB_PORT_FEAT_SUSPEND:
  842. if (ehci->no_selective_suspend)
  843. break;
  844. if ((temp & PORT_PE) == 0
  845. || (temp & PORT_RESET) != 0)
  846. goto error;
  847. /* After above check the port must be connected.
  848. * Set appropriate bit thus could put phy into low power
  849. * mode if we have hostpc feature
  850. */
  851. temp &= ~PORT_WKCONN_E;
  852. temp |= PORT_WKDISC_E | PORT_WKOC_E;
  853. ehci_writel(ehci, temp | PORT_SUSPEND, status_reg);
  854. if (hostpc_reg && !ehci->broken_hostpc_phcd) {
  855. spin_unlock_irqrestore(&ehci->lock, flags);
  856. msleep(5);/* 5ms for HCD enter low pwr mode */
  857. spin_lock_irqsave(&ehci->lock, flags);
  858. temp1 = ehci_readl(ehci, hostpc_reg);
  859. ehci_writel(ehci, temp1 | HOSTPC_PHCD,
  860. hostpc_reg);
  861. temp1 = ehci_readl(ehci, hostpc_reg);
  862. ehci_dbg(ehci, "Port%d phy low pwr mode %s\n",
  863. wIndex, (temp1 & HOSTPC_PHCD) ?
  864. "succeeded" : "failed");
  865. }
  866. set_bit(wIndex, &ehci->suspended_ports);
  867. break;
  868. case USB_PORT_FEAT_POWER:
  869. if (HCS_PPC (ehci->hcs_params))
  870. ehci_writel(ehci, temp | PORT_POWER,
  871. status_reg);
  872. break;
  873. case USB_PORT_FEAT_RESET:
  874. if (temp & PORT_RESUME)
  875. goto error;
  876. /* line status bits may report this as low speed,
  877. * which can be fine if this root hub has a
  878. * transaction translator built in.
  879. */
  880. if ((temp & (PORT_PE|PORT_CONNECT)) == PORT_CONNECT
  881. && !ehci_is_TDI(ehci)
  882. && PORT_USB11 (temp)) {
  883. ehci_dbg (ehci,
  884. "port %d low speed --> companion\n",
  885. wIndex + 1);
  886. temp |= PORT_OWNER;
  887. } else {
  888. ehci_vdbg (ehci, "port %d reset\n", wIndex + 1);
  889. temp |= PORT_RESET;
  890. temp &= ~PORT_PE;
  891. /*
  892. * caller must wait, then call GetPortStatus
  893. * usb 2.0 spec says 50 ms resets on root
  894. */
  895. ehci->reset_done [wIndex] = jiffies
  896. + msecs_to_jiffies (50);
  897. }
  898. ehci_writel(ehci, temp, status_reg);
  899. break;
  900. /* For downstream facing ports (these): one hub port is put
  901. * into test mode according to USB2 11.24.2.13, then the hub
  902. * must be reset (which for root hub now means rmmod+modprobe,
  903. * or else system reboot). See EHCI 2.3.9 and 4.14 for info
  904. * about the EHCI-specific stuff.
  905. */
  906. case USB_PORT_FEAT_TEST:
  907. if (!selector || selector > 5)
  908. goto error;
  909. ehci_quiesce(ehci);
  910. /* Put all enabled ports into suspend */
  911. while (ports--) {
  912. u32 __iomem *sreg =
  913. &ehci->regs->port_status[ports];
  914. temp = ehci_readl(ehci, sreg) & ~PORT_RWC_BITS;
  915. if (temp & PORT_PE)
  916. ehci_writel(ehci, temp | PORT_SUSPEND,
  917. sreg);
  918. }
  919. ehci_halt(ehci);
  920. temp = ehci_readl(ehci, status_reg);
  921. temp |= selector << 16;
  922. ehci_writel(ehci, temp, status_reg);
  923. break;
  924. default:
  925. goto error;
  926. }
  927. ehci_readl(ehci, &ehci->regs->command); /* unblock posted writes */
  928. break;
  929. default:
  930. error:
  931. /* "stall" on error */
  932. retval = -EPIPE;
  933. }
  934. error_exit:
  935. spin_unlock_irqrestore (&ehci->lock, flags);
  936. return retval;
  937. }
  938. static void ehci_relinquish_port(struct usb_hcd *hcd, int portnum)
  939. {
  940. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  941. if (ehci_is_TDI(ehci))
  942. return;
  943. set_owner(ehci, --portnum, PORT_OWNER);
  944. }
  945. static int ehci_port_handed_over(struct usb_hcd *hcd, int portnum)
  946. {
  947. struct ehci_hcd *ehci = hcd_to_ehci(hcd);
  948. u32 __iomem *reg;
  949. if (ehci_is_TDI(ehci))
  950. return 0;
  951. reg = &ehci->regs->port_status[portnum - 1];
  952. return ehci_readl(ehci, reg) & PORT_OWNER;
  953. }