/drivers/tty/serial/vt8500_serial.c
C | 645 lines | 477 code | 122 blank | 46 comment | 55 complexity | 67015cebf65a389930f88bff334dd42a MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
1/* 2 * Copyright (C) 2010 Alexey Charkov <alchark@gmail.com> 3 * 4 * Based on msm_serial.c, which is: 5 * Copyright (C) 2007 Google, Inc. 6 * Author: Robert Love <rlove@google.com> 7 * 8 * This software is licensed under the terms of the GNU General Public 9 * License version 2, as published by the Free Software Foundation, and 10 * may be copied, distributed, and modified under those terms. 11 * 12 * This program is distributed in the hope that it will be useful, 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 15 * GNU General Public License for more details. 16 */ 17 18#if defined(CONFIG_SERIAL_VT8500_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) 19# define SUPPORT_SYSRQ 20#endif 21 22#include <linux/hrtimer.h> 23#include <linux/delay.h> 24#include <linux/module.h> 25#include <linux/io.h> 26#include <linux/ioport.h> 27#include <linux/irq.h> 28#include <linux/init.h> 29#include <linux/console.h> 30#include <linux/tty.h> 31#include <linux/tty_flip.h> 32#include <linux/serial_core.h> 33#include <linux/serial.h> 34#include <linux/slab.h> 35#include <linux/clk.h> 36#include <linux/platform_device.h> 37 38/* 39 * UART Register offsets 40 */ 41 42#define VT8500_URTDR 0x0000 /* Transmit data */ 43#define VT8500_URRDR 0x0004 /* Receive data */ 44#define VT8500_URDIV 0x0008 /* Clock/Baud rate divisor */ 45#define VT8500_URLCR 0x000C /* Line control */ 46#define VT8500_URICR 0x0010 /* IrDA control */ 47#define VT8500_URIER 0x0014 /* Interrupt enable */ 48#define VT8500_URISR 0x0018 /* Interrupt status */ 49#define VT8500_URUSR 0x001c /* UART status */ 50#define VT8500_URFCR 0x0020 /* FIFO control */ 51#define VT8500_URFIDX 0x0024 /* FIFO index */ 52#define VT8500_URBKR 0x0028 /* Break signal count */ 53#define VT8500_URTOD 0x002c /* Time out divisor */ 54#define VT8500_TXFIFO 0x1000 /* Transmit FIFO (16x8) */ 55#define VT8500_RXFIFO 0x1020 /* Receive FIFO (16x10) */ 56 57/* 58 * Interrupt enable and status bits 59 */ 60 61#define TXDE (1 << 0) /* Tx Data empty */ 62#define RXDF (1 << 1) /* Rx Data full */ 63#define TXFAE (1 << 2) /* Tx FIFO almost empty */ 64#define TXFE (1 << 3) /* Tx FIFO empty */ 65#define RXFAF (1 << 4) /* Rx FIFO almost full */ 66#define RXFF (1 << 5) /* Rx FIFO full */ 67#define TXUDR (1 << 6) /* Tx underrun */ 68#define RXOVER (1 << 7) /* Rx overrun */ 69#define PER (1 << 8) /* Parity error */ 70#define FER (1 << 9) /* Frame error */ 71#define TCTS (1 << 10) /* Toggle of CTS */ 72#define RXTOUT (1 << 11) /* Rx timeout */ 73#define BKDONE (1 << 12) /* Break signal done */ 74#define ERR (1 << 13) /* AHB error response */ 75 76#define RX_FIFO_INTS (RXFAF | RXFF | RXOVER | PER | FER | RXTOUT) 77#define TX_FIFO_INTS (TXFAE | TXFE | TXUDR) 78 79struct vt8500_port { 80 struct uart_port uart; 81 char name[16]; 82 struct clk *clk; 83 unsigned int ier; 84}; 85 86static inline void vt8500_write(struct uart_port *port, unsigned int val, 87 unsigned int off) 88{ 89 writel(val, port->membase + off); 90} 91 92static inline unsigned int vt8500_read(struct uart_port *port, unsigned int off) 93{ 94 return readl(port->membase + off); 95} 96 97static void vt8500_stop_tx(struct uart_port *port) 98{ 99 struct vt8500_port *vt8500_port = container_of(port, 100 struct vt8500_port, 101 uart); 102 103 vt8500_port->ier &= ~TX_FIFO_INTS; 104 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 105} 106 107static void vt8500_stop_rx(struct uart_port *port) 108{ 109 struct vt8500_port *vt8500_port = container_of(port, 110 struct vt8500_port, 111 uart); 112 113 vt8500_port->ier &= ~RX_FIFO_INTS; 114 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 115} 116 117static void vt8500_enable_ms(struct uart_port *port) 118{ 119 struct vt8500_port *vt8500_port = container_of(port, 120 struct vt8500_port, 121 uart); 122 123 vt8500_port->ier |= TCTS; 124 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 125} 126 127static void handle_rx(struct uart_port *port) 128{ 129 struct tty_struct *tty = tty_port_tty_get(&port->state->port); 130 if (!tty) { 131 /* Discard data: no tty available */ 132 int count = (vt8500_read(port, VT8500_URFIDX) & 0x1f00) >> 8; 133 u16 ch; 134 while (count--) 135 ch = readw(port->membase + VT8500_RXFIFO); 136 return; 137 } 138 139 /* 140 * Handle overrun 141 */ 142 if ((vt8500_read(port, VT8500_URISR) & RXOVER)) { 143 port->icount.overrun++; 144 tty_insert_flip_char(tty, 0, TTY_OVERRUN); 145 } 146 147 /* and now the main RX loop */ 148 while (vt8500_read(port, VT8500_URFIDX) & 0x1f00) { 149 unsigned int c; 150 char flag = TTY_NORMAL; 151 152 c = readw(port->membase + VT8500_RXFIFO) & 0x3ff; 153 154 /* Mask conditions we're ignorning. */ 155 c &= ~port->read_status_mask; 156 157 if (c & FER) { 158 port->icount.frame++; 159 flag = TTY_FRAME; 160 } else if (c & PER) { 161 port->icount.parity++; 162 flag = TTY_PARITY; 163 } 164 port->icount.rx++; 165 166 if (!uart_handle_sysrq_char(port, c)) 167 tty_insert_flip_char(tty, c, flag); 168 } 169 170 tty_flip_buffer_push(tty); 171 tty_kref_put(tty); 172} 173 174static void handle_tx(struct uart_port *port) 175{ 176 struct circ_buf *xmit = &port->state->xmit; 177 178 if (port->x_char) { 179 writeb(port->x_char, port->membase + VT8500_TXFIFO); 180 port->icount.tx++; 181 port->x_char = 0; 182 } 183 if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { 184 vt8500_stop_tx(port); 185 return; 186 } 187 188 while ((vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16) { 189 if (uart_circ_empty(xmit)) 190 break; 191 192 writeb(xmit->buf[xmit->tail], port->membase + VT8500_TXFIFO); 193 194 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); 195 port->icount.tx++; 196 } 197 198 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) 199 uart_write_wakeup(port); 200 201 if (uart_circ_empty(xmit)) 202 vt8500_stop_tx(port); 203} 204 205static void vt8500_start_tx(struct uart_port *port) 206{ 207 struct vt8500_port *vt8500_port = container_of(port, 208 struct vt8500_port, 209 uart); 210 211 vt8500_port->ier &= ~TX_FIFO_INTS; 212 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 213 handle_tx(port); 214 vt8500_port->ier |= TX_FIFO_INTS; 215 vt8500_write(port, vt8500_port->ier, VT8500_URIER); 216} 217 218static void handle_delta_cts(struct uart_port *port) 219{ 220 port->icount.cts++; 221 wake_up_interruptible(&port->state->port.delta_msr_wait); 222} 223 224static irqreturn_t vt8500_irq(int irq, void *dev_id) 225{ 226 struct uart_port *port = dev_id; 227 unsigned long isr; 228 229 spin_lock(&port->lock); 230 isr = vt8500_read(port, VT8500_URISR); 231 232 /* Acknowledge active status bits */ 233 vt8500_write(port, isr, VT8500_URISR); 234 235 if (isr & RX_FIFO_INTS) 236 handle_rx(port); 237 if (isr & TX_FIFO_INTS) 238 handle_tx(port); 239 if (isr & TCTS) 240 handle_delta_cts(port); 241 242 spin_unlock(&port->lock); 243 244 return IRQ_HANDLED; 245} 246 247static unsigned int vt8500_tx_empty(struct uart_port *port) 248{ 249 return (vt8500_read(port, VT8500_URFIDX) & 0x1f) < 16 ? 250 TIOCSER_TEMT : 0; 251} 252 253static unsigned int vt8500_get_mctrl(struct uart_port *port) 254{ 255 unsigned int usr; 256 257 usr = vt8500_read(port, VT8500_URUSR); 258 if (usr & (1 << 4)) 259 return TIOCM_CTS; 260 else 261 return 0; 262} 263 264static void vt8500_set_mctrl(struct uart_port *port, unsigned int mctrl) 265{ 266} 267 268static void vt8500_break_ctl(struct uart_port *port, int break_ctl) 269{ 270 if (break_ctl) 271 vt8500_write(port, vt8500_read(port, VT8500_URLCR) | (1 << 9), 272 VT8500_URLCR); 273} 274 275static int vt8500_set_baud_rate(struct uart_port *port, unsigned int baud) 276{ 277 unsigned long div; 278 unsigned int loops = 1000; 279 280 div = vt8500_read(port, VT8500_URDIV) & ~(0x3ff); 281 282 if (unlikely((baud < 900) || (baud > 921600))) 283 div |= 7; 284 else 285 div |= (921600 / baud) - 1; 286 287 while ((vt8500_read(port, VT8500_URUSR) & (1 << 5)) && --loops) 288 cpu_relax(); 289 vt8500_write(port, div, VT8500_URDIV); 290 291 return baud; 292} 293 294static int vt8500_startup(struct uart_port *port) 295{ 296 struct vt8500_port *vt8500_port = 297 container_of(port, struct vt8500_port, uart); 298 int ret; 299 300 snprintf(vt8500_port->name, sizeof(vt8500_port->name), 301 "vt8500_serial%d", port->line); 302 303 ret = request_irq(port->irq, vt8500_irq, IRQF_TRIGGER_HIGH, 304 vt8500_port->name, port); 305 if (unlikely(ret)) 306 return ret; 307 308 vt8500_write(port, 0x03, VT8500_URLCR); /* enable TX & RX */ 309 310 return 0; 311} 312 313static void vt8500_shutdown(struct uart_port *port) 314{ 315 struct vt8500_port *vt8500_port = 316 container_of(port, struct vt8500_port, uart); 317 318 vt8500_port->ier = 0; 319 320 /* disable interrupts and FIFOs */ 321 vt8500_write(&vt8500_port->uart, 0, VT8500_URIER); 322 vt8500_write(&vt8500_port->uart, 0x880, VT8500_URFCR); 323 free_irq(port->irq, port); 324} 325 326static void vt8500_set_termios(struct uart_port *port, 327 struct ktermios *termios, 328 struct ktermios *old) 329{ 330 struct vt8500_port *vt8500_port = 331 container_of(port, struct vt8500_port, uart); 332 unsigned long flags; 333 unsigned int baud, lcr; 334 unsigned int loops = 1000; 335 336 spin_lock_irqsave(&port->lock, flags); 337 338 /* calculate and set baud rate */ 339 baud = uart_get_baud_rate(port, termios, old, 900, 921600); 340 baud = vt8500_set_baud_rate(port, baud); 341 if (tty_termios_baud_rate(termios)) 342 tty_termios_encode_baud_rate(termios, baud, baud); 343 344 /* calculate parity */ 345 lcr = vt8500_read(&vt8500_port->uart, VT8500_URLCR); 346 lcr &= ~((1 << 5) | (1 << 4)); 347 if (termios->c_cflag & PARENB) { 348 lcr |= (1 << 4); 349 termios->c_cflag &= ~CMSPAR; 350 if (termios->c_cflag & PARODD) 351 lcr |= (1 << 5); 352 } 353 354 /* calculate bits per char */ 355 lcr &= ~(1 << 2); 356 switch (termios->c_cflag & CSIZE) { 357 case CS7: 358 break; 359 case CS8: 360 default: 361 lcr |= (1 << 2); 362 termios->c_cflag &= ~CSIZE; 363 termios->c_cflag |= CS8; 364 break; 365 } 366 367 /* calculate stop bits */ 368 lcr &= ~(1 << 3); 369 if (termios->c_cflag & CSTOPB) 370 lcr |= (1 << 3); 371 372 /* set parity, bits per char, and stop bit */ 373 vt8500_write(&vt8500_port->uart, lcr, VT8500_URLCR); 374 375 /* Configure status bits to ignore based on termio flags. */ 376 port->read_status_mask = 0; 377 if (termios->c_iflag & IGNPAR) 378 port->read_status_mask = FER | PER; 379 380 uart_update_timeout(port, termios->c_cflag, baud); 381 382 /* Reset FIFOs */ 383 vt8500_write(&vt8500_port->uart, 0x88c, VT8500_URFCR); 384 while ((vt8500_read(&vt8500_port->uart, VT8500_URFCR) & 0xc) 385 && --loops) 386 cpu_relax(); 387 388 /* Every possible FIFO-related interrupt */ 389 vt8500_port->ier = RX_FIFO_INTS | TX_FIFO_INTS; 390 391 /* 392 * CTS flow control 393 */ 394 if (UART_ENABLE_MS(&vt8500_port->uart, termios->c_cflag)) 395 vt8500_port->ier |= TCTS; 396 397 vt8500_write(&vt8500_port->uart, 0x881, VT8500_URFCR); 398 vt8500_write(&vt8500_port->uart, vt8500_port->ier, VT8500_URIER); 399 400 spin_unlock_irqrestore(&port->lock, flags); 401} 402 403static const char *vt8500_type(struct uart_port *port) 404{ 405 struct vt8500_port *vt8500_port = 406 container_of(port, struct vt8500_port, uart); 407 return vt8500_port->name; 408} 409 410static void vt8500_release_port(struct uart_port *port) 411{ 412} 413 414static int vt8500_request_port(struct uart_port *port) 415{ 416 return 0; 417} 418 419static void vt8500_config_port(struct uart_port *port, int flags) 420{ 421 port->type = PORT_VT8500; 422} 423 424static int vt8500_verify_port(struct uart_port *port, 425 struct serial_struct *ser) 426{ 427 if (unlikely(ser->type != PORT_UNKNOWN && ser->type != PORT_VT8500)) 428 return -EINVAL; 429 if (unlikely(port->irq != ser->irq)) 430 return -EINVAL; 431 return 0; 432} 433 434static struct vt8500_port *vt8500_uart_ports[4]; 435static struct uart_driver vt8500_uart_driver; 436 437#ifdef CONFIG_SERIAL_VT8500_CONSOLE 438 439static inline void wait_for_xmitr(struct uart_port *port) 440{ 441 unsigned int status, tmout = 10000; 442 443 /* Wait up to 10ms for the character(s) to be sent. */ 444 do { 445 status = vt8500_read(port, VT8500_URFIDX); 446 447 if (--tmout == 0) 448 break; 449 udelay(1); 450 } while (status & 0x10); 451} 452 453static void vt8500_console_putchar(struct uart_port *port, int c) 454{ 455 wait_for_xmitr(port); 456 writeb(c, port->membase + VT8500_TXFIFO); 457} 458 459static void vt8500_console_write(struct console *co, const char *s, 460 unsigned int count) 461{ 462 struct vt8500_port *vt8500_port = vt8500_uart_ports[co->index]; 463 unsigned long ier; 464 465 BUG_ON(co->index < 0 || co->index >= vt8500_uart_driver.nr); 466 467 ier = vt8500_read(&vt8500_port->uart, VT8500_URIER); 468 vt8500_write(&vt8500_port->uart, VT8500_URIER, 0); 469 470 uart_console_write(&vt8500_port->uart, s, count, 471 vt8500_console_putchar); 472 473 /* 474 * Finally, wait for transmitter to become empty 475 * and switch back to FIFO 476 */ 477 wait_for_xmitr(&vt8500_port->uart); 478 vt8500_write(&vt8500_port->uart, VT8500_URIER, ier); 479} 480 481static int __init vt8500_console_setup(struct console *co, char *options) 482{ 483 struct vt8500_port *vt8500_port; 484 int baud = 9600; 485 int bits = 8; 486 int parity = 'n'; 487 int flow = 'n'; 488 489 if (unlikely(co->index >= vt8500_uart_driver.nr || co->index < 0)) 490 return -ENXIO; 491 492 vt8500_port = vt8500_uart_ports[co->index]; 493 494 if (!vt8500_port) 495 return -ENODEV; 496 497 if (options) 498 uart_parse_options(options, &baud, &parity, &bits, &flow); 499 500 return uart_set_options(&vt8500_port->uart, 501 co, baud, parity, bits, flow); 502} 503 504static struct console vt8500_console = { 505 .name = "ttyWMT", 506 .write = vt8500_console_write, 507 .device = uart_console_device, 508 .setup = vt8500_console_setup, 509 .flags = CON_PRINTBUFFER, 510 .index = -1, 511 .data = &vt8500_uart_driver, 512}; 513 514#define VT8500_CONSOLE (&vt8500_console) 515 516#else 517#define VT8500_CONSOLE NULL 518#endif 519 520static struct uart_ops vt8500_uart_pops = { 521 .tx_empty = vt8500_tx_empty, 522 .set_mctrl = vt8500_set_mctrl, 523 .get_mctrl = vt8500_get_mctrl, 524 .stop_tx = vt8500_stop_tx, 525 .start_tx = vt8500_start_tx, 526 .stop_rx = vt8500_stop_rx, 527 .enable_ms = vt8500_enable_ms, 528 .break_ctl = vt8500_break_ctl, 529 .startup = vt8500_startup, 530 .shutdown = vt8500_shutdown, 531 .set_termios = vt8500_set_termios, 532 .type = vt8500_type, 533 .release_port = vt8500_release_port, 534 .request_port = vt8500_request_port, 535 .config_port = vt8500_config_port, 536 .verify_port = vt8500_verify_port, 537}; 538 539static struct uart_driver vt8500_uart_driver = { 540 .owner = THIS_MODULE, 541 .driver_name = "vt8500_serial", 542 .dev_name = "ttyWMT", 543 .nr = 6, 544 .cons = VT8500_CONSOLE, 545}; 546 547static int __init vt8500_serial_probe(struct platform_device *pdev) 548{ 549 struct vt8500_port *vt8500_port; 550 struct resource *mmres, *irqres; 551 int ret; 552 553 mmres = platform_get_resource(pdev, IORESOURCE_MEM, 0); 554 irqres = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 555 if (!mmres || !irqres) 556 return -ENODEV; 557 558 vt8500_port = kzalloc(sizeof(struct vt8500_port), GFP_KERNEL); 559 if (!vt8500_port) 560 return -ENOMEM; 561 562 vt8500_port->uart.type = PORT_VT8500; 563 vt8500_port->uart.iotype = UPIO_MEM; 564 vt8500_port->uart.mapbase = mmres->start; 565 vt8500_port->uart.irq = irqres->start; 566 vt8500_port->uart.fifosize = 16; 567 vt8500_port->uart.ops = &vt8500_uart_pops; 568 vt8500_port->uart.line = pdev->id; 569 vt8500_port->uart.dev = &pdev->dev; 570 vt8500_port->uart.flags = UPF_IOREMAP | UPF_BOOT_AUTOCONF; 571 vt8500_port->uart.uartclk = 24000000; 572 573 snprintf(vt8500_port->name, sizeof(vt8500_port->name), 574 "VT8500 UART%d", pdev->id); 575 576 vt8500_port->uart.membase = ioremap(mmres->start, resource_size(mmres)); 577 if (!vt8500_port->uart.membase) { 578 ret = -ENOMEM; 579 goto err; 580 } 581 582 vt8500_uart_ports[pdev->id] = vt8500_port; 583 584 uart_add_one_port(&vt8500_uart_driver, &vt8500_port->uart); 585 586 platform_set_drvdata(pdev, vt8500_port); 587 588 return 0; 589 590err: 591 kfree(vt8500_port); 592 return ret; 593} 594 595static int __devexit vt8500_serial_remove(struct platform_device *pdev) 596{ 597 struct vt8500_port *vt8500_port = platform_get_drvdata(pdev); 598 599 platform_set_drvdata(pdev, NULL); 600 uart_remove_one_port(&vt8500_uart_driver, &vt8500_port->uart); 601 kfree(vt8500_port); 602 603 return 0; 604} 605 606static struct platform_driver vt8500_platform_driver = { 607 .probe = vt8500_serial_probe, 608 .remove = vt8500_serial_remove, 609 .driver = { 610 .name = "vt8500_serial", 611 .owner = THIS_MODULE, 612 }, 613}; 614 615static int __init vt8500_serial_init(void) 616{ 617 int ret; 618 619 ret = uart_register_driver(&vt8500_uart_driver); 620 if (unlikely(ret)) 621 return ret; 622 623 ret = platform_driver_register(&vt8500_platform_driver); 624 625 if (unlikely(ret)) 626 uart_unregister_driver(&vt8500_uart_driver); 627 628 return ret; 629} 630 631static void __exit vt8500_serial_exit(void) 632{ 633#ifdef CONFIG_SERIAL_VT8500_CONSOLE 634 unregister_console(&vt8500_console); 635#endif 636 platform_driver_unregister(&vt8500_platform_driver); 637 uart_unregister_driver(&vt8500_uart_driver); 638} 639 640module_init(vt8500_serial_init); 641module_exit(vt8500_serial_exit); 642 643MODULE_AUTHOR("Alexey Charkov <alchark@gmail.com>"); 644MODULE_DESCRIPTION("Driver for vt8500 serial device"); 645MODULE_LICENSE("GPL");