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/drivers/staging/tidspbridge/include/dspbridge/mbx_sh.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C Header | 144 lines | 20 code | 8 blank | 116 comment | 0 complexity | 753b8914773b4b28ab98cf85c239881e MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/*
  2 * mbx_sh.h
  3 *
  4 * DSP-BIOS Bridge driver support functions for TI OMAP processors.
  5 *
  6 * Definitions for shared mailbox cmd/data values.(used on both
  7 * the GPP and DSP sides).
  8 *
  9 * Copyright (C) 2008 Texas Instruments, Inc.
 10 *
 11 * This package is free software; you can redistribute it and/or modify
 12 * it under the terms of the GNU General Public License version 2 as
 13 * published by the Free Software Foundation.
 14 *
 15 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
 16 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
 17 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
 18 */
 19
 20/*
 21 *  Bridge usage of OMAP mailbox 1 is determined by the "class" of the
 22 *  mailbox interrupt's cmd value received. The class value are defined
 23 *  as a bit (10 thru 15) being set.
 24 *
 25 *  Note: Only 16 bits of each  is used. Other 16 bit data reg available.
 26 *
 27 *   16 bit Mbx bit defns:
 28 *
 29 * A). Exception/Error handling (Module DEH) : class = 0.
 30 *
 31 *    15         10                  0
 32 *   ---------------------------------
 33 *   |0|0|0|0|0|0|x|x|x|x|x|x|x|x|x|x|
 34 *   ---------------------------------
 35 *   |  (class)  | (module specific) |
 36 *
 37 *
 38 * B: DSP-DMA link driver channels (DDMA) : class = 1.
 39 *
 40 *    15         10                  0
 41 *   ---------------------------------
 42 *   |0|0|0|0|0|1|b|b|b|b|b|c|c|c|c|c|
 43 *   ---------------------------------
 44 *   |  (class)  | (module specific) |
 45 *
 46 *   where b -> buffer index  (32 DDMA buffers/chnl max)
 47 *         c -> channel Id    (32 DDMA chnls max)
 48 *
 49 *
 50 * C: Proc-copy link driver channels (PCPY) : class = 2.
 51 *
 52 *    15         10                  0
 53 *   ---------------------------------
 54 *   |0|0|0|0|1|0|x|x|x|x|x|x|x|x|x|x|
 55 *   ---------------------------------
 56 *   |  (class)  | (module specific) |
 57 *
 58 *
 59 * D: Zero-copy link driver channels (DDZC) : class = 4.
 60 *
 61 *    15         10                  0
 62 *   ---------------------------------
 63 *   |0|0|0|1|0|0|x|x|x|x|x|c|c|c|c|c|
 64 *   ---------------------------------
 65 *   |  (class)  | (module specific) |
 66 *
 67 *   where x -> not used
 68 *         c -> channel Id    (32 ZCPY chnls max)
 69 *
 70 *
 71 * E: Power management : class = 8.
 72 *
 73 *    15         10                  0
 74 *   ---------------------------------
 75 *   |0|0|1|0|0|0|x|x|x|x|x|c|c|c|c|c|
 76
 77 * 	0010 00xx xxxc cccc
 78 *	0010 00nn pppp qqqq
 79 *	nn:
 80 *	00 = reserved
 81 *	01 = pwr state change
 82 *	10 = opp pre-change
 83 *	11 = opp post-change
 84 *
 85 *	if nn = pwr state change:
 86 *	pppp = don't care
 87 *	qqqq:
 88 *	0010 = hibernate
 89 *	0010 0001 0000 0010
 90 *	0110 = retention
 91 *	0010 0001 0000 0110
 92 *	others reserved
 93 *
 94 *	if nn = opp pre-change:
 95 *	pppp = current opp
 96 *	qqqq = next opp
 97 *
 98 *	if nn = opp post-change:
 99 *	pppp = prev opp
100 *	qqqq = current opp
101 *
102 *   ---------------------------------
103 *   |  (class)  | (module specific) |
104 *
105 *   where x -> not used
106 *         c -> Power management command
107 *
108 */
109
110#ifndef _MBX_SH_H
111#define _MBX_SH_H
112
113#define MBX_PCPY_CLASS     0x0800	/* PROC-COPY  " */
114#define MBX_PM_CLASS       0x2000	/* Power Management */
115#define MBX_DBG_CLASS      0x4000	/* For debugging purpose */
116
117/*
118 * Exception Handler codes
119 * Magic code used to determine if DSP signaled exception.
120 */
121#define MBX_DEH_BASE        0x0
122#define MBX_DEH_USERS_BASE  0x100	/* 256 */
123#define MBX_DEH_LIMIT       0x3FF	/* 1023 */
124#define MBX_DEH_RESET       0x101	/* DSP RESET (DEH) */
125
126/*
127 *  Link driver command/status codes.
128 */
129
130/*  Power Management Commands */
131#define MBX_PM_DSPIDLE                  (MBX_PM_CLASS + 0x0)
132#define MBX_PM_DSPWAKEUP                (MBX_PM_CLASS + 0x1)
133#define MBX_PM_EMERGENCYSLEEP           (MBX_PM_CLASS + 0x2)
134#define MBX_PM_SETPOINT_PRENOTIFY       (MBX_PM_CLASS + 0x6)
135#define MBX_PM_SETPOINT_POSTNOTIFY      (MBX_PM_CLASS + 0x7)
136#define MBX_PM_DSPRETENTION        (MBX_PM_CLASS + 0x8)
137#define MBX_PM_DSPHIBERNATE        (MBX_PM_CLASS + 0x9)
138#define MBX_PM_HIBERNATE_EN        (MBX_PM_CLASS + 0xA)
139#define MBX_PM_OPP_REQ                  (MBX_PM_CLASS + 0xB)
140
141/* Bridge Debug Commands */
142#define MBX_DBG_SYSPRINTF       (MBX_DBG_CLASS + 0x0)
143
144#endif /* _MBX_SH_H */