/drivers/staging/tidspbridge/include/dspbridge/mbx_sh.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C Header · 144 lines · 20 code · 8 blank · 116 comment · 0 complexity · 753b8914773b4b28ab98cf85c239881e MD5 · raw file

  1. /*
  2. * mbx_sh.h
  3. *
  4. * DSP-BIOS Bridge driver support functions for TI OMAP processors.
  5. *
  6. * Definitions for shared mailbox cmd/data values.(used on both
  7. * the GPP and DSP sides).
  8. *
  9. * Copyright (C) 2008 Texas Instruments, Inc.
  10. *
  11. * This package is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License version 2 as
  13. * published by the Free Software Foundation.
  14. *
  15. * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
  16. * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
  17. * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
  18. */
  19. /*
  20. * Bridge usage of OMAP mailbox 1 is determined by the "class" of the
  21. * mailbox interrupt's cmd value received. The class value are defined
  22. * as a bit (10 thru 15) being set.
  23. *
  24. * Note: Only 16 bits of each is used. Other 16 bit data reg available.
  25. *
  26. * 16 bit Mbx bit defns:
  27. *
  28. * A). Exception/Error handling (Module DEH) : class = 0.
  29. *
  30. * 15 10 0
  31. * ---------------------------------
  32. * |0|0|0|0|0|0|x|x|x|x|x|x|x|x|x|x|
  33. * ---------------------------------
  34. * | (class) | (module specific) |
  35. *
  36. *
  37. * B: DSP-DMA link driver channels (DDMA) : class = 1.
  38. *
  39. * 15 10 0
  40. * ---------------------------------
  41. * |0|0|0|0|0|1|b|b|b|b|b|c|c|c|c|c|
  42. * ---------------------------------
  43. * | (class) | (module specific) |
  44. *
  45. * where b -> buffer index (32 DDMA buffers/chnl max)
  46. * c -> channel Id (32 DDMA chnls max)
  47. *
  48. *
  49. * C: Proc-copy link driver channels (PCPY) : class = 2.
  50. *
  51. * 15 10 0
  52. * ---------------------------------
  53. * |0|0|0|0|1|0|x|x|x|x|x|x|x|x|x|x|
  54. * ---------------------------------
  55. * | (class) | (module specific) |
  56. *
  57. *
  58. * D: Zero-copy link driver channels (DDZC) : class = 4.
  59. *
  60. * 15 10 0
  61. * ---------------------------------
  62. * |0|0|0|1|0|0|x|x|x|x|x|c|c|c|c|c|
  63. * ---------------------------------
  64. * | (class) | (module specific) |
  65. *
  66. * where x -> not used
  67. * c -> channel Id (32 ZCPY chnls max)
  68. *
  69. *
  70. * E: Power management : class = 8.
  71. *
  72. * 15 10 0
  73. * ---------------------------------
  74. * |0|0|1|0|0|0|x|x|x|x|x|c|c|c|c|c|
  75. * 0010 00xx xxxc cccc
  76. * 0010 00nn pppp qqqq
  77. * nn:
  78. * 00 = reserved
  79. * 01 = pwr state change
  80. * 10 = opp pre-change
  81. * 11 = opp post-change
  82. *
  83. * if nn = pwr state change:
  84. * pppp = don't care
  85. * qqqq:
  86. * 0010 = hibernate
  87. * 0010 0001 0000 0010
  88. * 0110 = retention
  89. * 0010 0001 0000 0110
  90. * others reserved
  91. *
  92. * if nn = opp pre-change:
  93. * pppp = current opp
  94. * qqqq = next opp
  95. *
  96. * if nn = opp post-change:
  97. * pppp = prev opp
  98. * qqqq = current opp
  99. *
  100. * ---------------------------------
  101. * | (class) | (module specific) |
  102. *
  103. * where x -> not used
  104. * c -> Power management command
  105. *
  106. */
  107. #ifndef _MBX_SH_H
  108. #define _MBX_SH_H
  109. #define MBX_PCPY_CLASS 0x0800 /* PROC-COPY " */
  110. #define MBX_PM_CLASS 0x2000 /* Power Management */
  111. #define MBX_DBG_CLASS 0x4000 /* For debugging purpose */
  112. /*
  113. * Exception Handler codes
  114. * Magic code used to determine if DSP signaled exception.
  115. */
  116. #define MBX_DEH_BASE 0x0
  117. #define MBX_DEH_USERS_BASE 0x100 /* 256 */
  118. #define MBX_DEH_LIMIT 0x3FF /* 1023 */
  119. #define MBX_DEH_RESET 0x101 /* DSP RESET (DEH) */
  120. /*
  121. * Link driver command/status codes.
  122. */
  123. /* Power Management Commands */
  124. #define MBX_PM_DSPIDLE (MBX_PM_CLASS + 0x0)
  125. #define MBX_PM_DSPWAKEUP (MBX_PM_CLASS + 0x1)
  126. #define MBX_PM_EMERGENCYSLEEP (MBX_PM_CLASS + 0x2)
  127. #define MBX_PM_SETPOINT_PRENOTIFY (MBX_PM_CLASS + 0x6)
  128. #define MBX_PM_SETPOINT_POSTNOTIFY (MBX_PM_CLASS + 0x7)
  129. #define MBX_PM_DSPRETENTION (MBX_PM_CLASS + 0x8)
  130. #define MBX_PM_DSPHIBERNATE (MBX_PM_CLASS + 0x9)
  131. #define MBX_PM_HIBERNATE_EN (MBX_PM_CLASS + 0xA)
  132. #define MBX_PM_OPP_REQ (MBX_PM_CLASS + 0xB)
  133. /* Bridge Debug Commands */
  134. #define MBX_DBG_SYSPRINTF (MBX_DBG_CLASS + 0x0)
  135. #endif /* _MBX_SH_H */