/drivers/staging/solo6x10/enc.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C · 238 lines · 173 code · 37 blank · 28 comment · 14 complexity · 1462a3464e41d51adcb4c4519ee42c31 MD5 · raw file

  1. /*
  2. * Copyright (C) 2010 Bluecherry, LLC www.bluecherrydvr.com
  3. * Copyright (C) 2010 Ben Collins <bcollins@bluecherry.net>
  4. *
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License as published by
  7. * the Free Software Foundation; either version 2 of the License, or
  8. * (at your option) any later version.
  9. *
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU General Public License
  16. * along with this program; if not, write to the Free Software
  17. * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
  18. */
  19. #include <linux/kernel.h>
  20. #include <linux/slab.h>
  21. #include "solo6x10.h"
  22. #include "osd-font.h"
  23. #define CAPTURE_MAX_BANDWIDTH 32 /* D1 4channel (D1 == 4) */
  24. #define OSG_BUFFER_SIZE 1024
  25. #define VI_PROG_HSIZE (1280 - 16)
  26. #define VI_PROG_VSIZE (1024 - 16)
  27. static void solo_capture_config(struct solo_dev *solo_dev)
  28. {
  29. int i, j;
  30. unsigned long height;
  31. unsigned long width;
  32. unsigned char *buf;
  33. solo_reg_write(solo_dev, SOLO_CAP_BASE,
  34. SOLO_CAP_MAX_PAGE(SOLO_CAP_EXT_MAX_PAGE *
  35. solo_dev->nr_chans) |
  36. SOLO_CAP_BASE_ADDR(SOLO_CAP_EXT_ADDR(solo_dev) >> 16));
  37. solo_reg_write(solo_dev, SOLO_CAP_BTW,
  38. (1 << 17) | SOLO_CAP_PROG_BANDWIDTH(2) |
  39. SOLO_CAP_MAX_BANDWIDTH(CAPTURE_MAX_BANDWIDTH));
  40. /* Set scale 1, 9 dimension */
  41. width = solo_dev->video_hsize;
  42. height = solo_dev->video_vsize;
  43. solo_reg_write(solo_dev, SOLO_DIM_SCALE1,
  44. SOLO_DIM_H_MB_NUM(width / 16) |
  45. SOLO_DIM_V_MB_NUM_FRAME(height / 8) |
  46. SOLO_DIM_V_MB_NUM_FIELD(height / 16));
  47. /* Set scale 2, 10 dimension */
  48. width = solo_dev->video_hsize / 2;
  49. height = solo_dev->video_vsize;
  50. solo_reg_write(solo_dev, SOLO_DIM_SCALE2,
  51. SOLO_DIM_H_MB_NUM(width / 16) |
  52. SOLO_DIM_V_MB_NUM_FRAME(height / 8) |
  53. SOLO_DIM_V_MB_NUM_FIELD(height / 16));
  54. /* Set scale 3, 11 dimension */
  55. width = solo_dev->video_hsize / 2;
  56. height = solo_dev->video_vsize / 2;
  57. solo_reg_write(solo_dev, SOLO_DIM_SCALE3,
  58. SOLO_DIM_H_MB_NUM(width / 16) |
  59. SOLO_DIM_V_MB_NUM_FRAME(height / 8) |
  60. SOLO_DIM_V_MB_NUM_FIELD(height / 16));
  61. /* Set scale 4, 12 dimension */
  62. width = solo_dev->video_hsize / 3;
  63. height = solo_dev->video_vsize / 3;
  64. solo_reg_write(solo_dev, SOLO_DIM_SCALE4,
  65. SOLO_DIM_H_MB_NUM(width / 16) |
  66. SOLO_DIM_V_MB_NUM_FRAME(height / 8) |
  67. SOLO_DIM_V_MB_NUM_FIELD(height / 16));
  68. /* Set scale 5, 13 dimension */
  69. width = solo_dev->video_hsize / 4;
  70. height = solo_dev->video_vsize / 2;
  71. solo_reg_write(solo_dev, SOLO_DIM_SCALE5,
  72. SOLO_DIM_H_MB_NUM(width / 16) |
  73. SOLO_DIM_V_MB_NUM_FRAME(height / 8) |
  74. SOLO_DIM_V_MB_NUM_FIELD(height / 16));
  75. /* Progressive */
  76. width = VI_PROG_HSIZE;
  77. height = VI_PROG_VSIZE;
  78. solo_reg_write(solo_dev, SOLO_DIM_PROG,
  79. SOLO_DIM_H_MB_NUM(width / 16) |
  80. SOLO_DIM_V_MB_NUM_FRAME(height / 16) |
  81. SOLO_DIM_V_MB_NUM_FIELD(height / 16));
  82. /* Clear OSD */
  83. solo_reg_write(solo_dev, SOLO_VE_OSD_CH, 0);
  84. solo_reg_write(solo_dev, SOLO_VE_OSD_BASE, SOLO_EOSD_EXT_ADDR >> 16);
  85. solo_reg_write(solo_dev, SOLO_VE_OSD_CLR,
  86. 0xF0 << 16 | 0x80 << 8 | 0x80);
  87. solo_reg_write(solo_dev, SOLO_VE_OSD_OPT, 0);
  88. /* Clear OSG buffer */
  89. buf = kzalloc(OSG_BUFFER_SIZE, GFP_KERNEL);
  90. if (!buf)
  91. return;
  92. for (i = 0; i < solo_dev->nr_chans; i++) {
  93. for (j = 0; j < SOLO_EOSD_EXT_SIZE; j += OSG_BUFFER_SIZE) {
  94. solo_p2m_dma(solo_dev, SOLO_P2M_DMA_ID_MP4E, 1, buf,
  95. SOLO_EOSD_EXT_ADDR +
  96. (i * SOLO_EOSD_EXT_SIZE) + j,
  97. OSG_BUFFER_SIZE);
  98. }
  99. }
  100. kfree(buf);
  101. }
  102. int solo_osd_print(struct solo_enc_dev *solo_enc)
  103. {
  104. struct solo_dev *solo_dev = solo_enc->solo_dev;
  105. char *str = solo_enc->osd_text;
  106. u8 *buf;
  107. u32 reg = solo_reg_read(solo_dev, SOLO_VE_OSD_CH);
  108. int len = strlen(str);
  109. int i, j;
  110. int x = 1, y = 1;
  111. if (len == 0) {
  112. reg &= ~(1 << solo_enc->ch);
  113. solo_reg_write(solo_dev, SOLO_VE_OSD_CH, reg);
  114. return 0;
  115. }
  116. buf = kzalloc(SOLO_EOSD_EXT_SIZE, GFP_KERNEL);
  117. if (!buf)
  118. return -ENOMEM;
  119. for (i = 0; i < len; i++) {
  120. for (j = 0; j < 16; j++) {
  121. buf[(j*2) + (i%2) + ((x + (i/2)) * 32) + (y * 2048)] =
  122. (solo_osd_font[(str[i] * 4) + (j / 4)]
  123. >> ((3 - (j % 4)) * 8)) & 0xff;
  124. }
  125. }
  126. solo_p2m_dma(solo_dev, 0, 1, buf, SOLO_EOSD_EXT_ADDR +
  127. (solo_enc->ch * SOLO_EOSD_EXT_SIZE), SOLO_EOSD_EXT_SIZE);
  128. reg |= (1 << solo_enc->ch);
  129. solo_reg_write(solo_dev, SOLO_VE_OSD_CH, reg);
  130. kfree(buf);
  131. return 0;
  132. }
  133. static void solo_jpeg_config(struct solo_dev *solo_dev)
  134. {
  135. u32 reg;
  136. if (solo_dev->flags & FLAGS_6110)
  137. reg = (4 << 24) | (3 << 16) | (2 << 8) | (1 << 0);
  138. else
  139. reg = (2 << 24) | (2 << 16) | (2 << 8) | (2 << 0);
  140. solo_reg_write(solo_dev, SOLO_VE_JPEG_QP_TBL, reg);
  141. solo_reg_write(solo_dev, SOLO_VE_JPEG_QP_CH_L, 0);
  142. solo_reg_write(solo_dev, SOLO_VE_JPEG_QP_CH_H, 0);
  143. solo_reg_write(solo_dev, SOLO_VE_JPEG_CFG,
  144. (SOLO_JPEG_EXT_SIZE(solo_dev) & 0xffff0000) |
  145. ((SOLO_JPEG_EXT_ADDR(solo_dev) >> 16) & 0x0000ffff));
  146. solo_reg_write(solo_dev, SOLO_VE_JPEG_CTRL, 0xffffffff);
  147. /* que limit, samp limit, pos limit */
  148. solo_reg_write(solo_dev, 0x0688, (0 << 16) | (30 << 8) | 60);
  149. }
  150. static void solo_mp4e_config(struct solo_dev *solo_dev)
  151. {
  152. int i;
  153. u32 reg;
  154. /* We can only use VE_INTR_CTRL(0) if we want to support mjpeg */
  155. solo_reg_write(solo_dev, SOLO_VE_CFG0,
  156. SOLO_VE_INTR_CTRL(0) |
  157. SOLO_VE_BLOCK_SIZE(SOLO_MP4E_EXT_SIZE(solo_dev) >> 16) |
  158. SOLO_VE_BLOCK_BASE(SOLO_MP4E_EXT_ADDR(solo_dev) >> 16));
  159. solo_reg_write(solo_dev, SOLO_VE_CFG1,
  160. SOLO_VE_INSERT_INDEX | SOLO_VE_MOTION_MODE(0));
  161. solo_reg_write(solo_dev, SOLO_VE_WMRK_POLY, 0);
  162. solo_reg_write(solo_dev, SOLO_VE_VMRK_INIT_KEY, 0);
  163. solo_reg_write(solo_dev, SOLO_VE_WMRK_STRL, 0);
  164. solo_reg_write(solo_dev, SOLO_VE_ENCRYP_POLY, 0);
  165. solo_reg_write(solo_dev, SOLO_VE_ENCRYP_INIT, 0);
  166. reg = SOLO_VE_LITTLE_ENDIAN | SOLO_COMP_ATTR_FCODE(1) |
  167. SOLO_COMP_TIME_INC(0) | SOLO_COMP_TIME_WIDTH(15);
  168. if (solo_dev->flags & FLAGS_6110)
  169. reg |= SOLO_DCT_INTERVAL(10);
  170. else
  171. reg |= SOLO_DCT_INTERVAL(36 / 4);
  172. solo_reg_write(solo_dev, SOLO_VE_ATTR, reg);
  173. for (i = 0; i < solo_dev->nr_chans; i++)
  174. solo_reg_write(solo_dev, SOLO_VE_CH_REF_BASE(i),
  175. (SOLO_EREF_EXT_ADDR(solo_dev) +
  176. (i * SOLO_EREF_EXT_SIZE)) >> 16);
  177. if (solo_dev->flags & FLAGS_6110)
  178. solo_reg_write(solo_dev, 0x0634, 0x00040008); /* ? */
  179. }
  180. int solo_enc_init(struct solo_dev *solo_dev)
  181. {
  182. int i;
  183. solo_capture_config(solo_dev);
  184. solo_mp4e_config(solo_dev);
  185. solo_jpeg_config(solo_dev);
  186. for (i = 0; i < solo_dev->nr_chans; i++) {
  187. solo_reg_write(solo_dev, SOLO_CAP_CH_SCALE(i), 0);
  188. solo_reg_write(solo_dev, SOLO_CAP_CH_COMP_ENA_E(i), 0);
  189. }
  190. solo_irq_on(solo_dev, SOLO_IRQ_ENCODER);
  191. return 0;
  192. }
  193. void solo_enc_exit(struct solo_dev *solo_dev)
  194. {
  195. int i;
  196. solo_irq_off(solo_dev, SOLO_IRQ_ENCODER);
  197. for (i = 0; i < solo_dev->nr_chans; i++) {
  198. solo_reg_write(solo_dev, SOLO_CAP_CH_SCALE(i), 0);
  199. solo_reg_write(solo_dev, SOLO_CAP_CH_COMP_ENA_E(i), 0);
  200. }
  201. }