PageRenderTime 106ms CodeModel.GetById 19ms app.highlight 77ms RepoModel.GetById 1ms app.codeStats 0ms

/drivers/staging/slicoss/slicoss.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C | 4001 lines | 3281 code | 456 blank | 264 comment | 570 complexity | 9034ab53207207b47fdcebc3ae7758e2 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0

Large files files are truncated, but you can click here to view the full file

   1/**************************************************************************
   2 *
   3 * Copyright  2000-2006 Alacritech, Inc.  All rights reserved.
   4 *
   5 * Redistribution and use in source and binary forms, with or without
   6 * modification, are permitted provided that the following conditions
   7 * are met:
   8 *
   9 * 1. Redistributions of source code must retain the above copyright
  10 *    notice, this list of conditions and the following disclaimer.
  11 * 2. Redistributions in binary form must reproduce the above
  12 *    copyright notice, this list of conditions and the following
  13 *    disclaimer in the documentation and/or other materials provided
  14 *    with the distribution.
  15 *
  16 * Alternatively, this software may be distributed under the terms of the
  17 * GNU General Public License ("GPL") version 2 as published by the Free
  18 * Software Foundation.
  19 *
  20 * THIS SOFTWARE IS PROVIDED BY ALACRITECH, INC. ``AS IS'' AND ANY
  21 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  23 * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL ALACRITECH, INC. OR
  24 * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  25 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  26 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  27 * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
  28 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  29 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
  30 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
  31 * SUCH DAMAGE.
  32 *
  33 * The views and conclusions contained in the software and documentation
  34 * are those of the authors and should not be interpreted as representing
  35 * official policies, either expressed or implied, of Alacritech, Inc.
  36 *
  37 **************************************************************************/
  38
  39/*
  40 * FILENAME: slicoss.c
  41 *
  42 * The SLICOSS driver for Alacritech's IS-NIC products.
  43 *
  44 * This driver is supposed to support:
  45 *
  46 *      Mojave cards (single port PCI Gigabit) both copper and fiber
  47 *      Oasis cards (single and dual port PCI-x Gigabit) copper and fiber
  48 *      Kalahari cards (dual and quad port PCI-e Gigabit) copper and fiber
  49 *
  50 * The driver was acutally tested on Oasis and Kalahari cards.
  51 *
  52 *
  53 * NOTE: This is the standard, non-accelerated version of Alacritech's
  54 *       IS-NIC driver.
  55 */
  56
  57
  58#define KLUDGE_FOR_4GB_BOUNDARY         1
  59#define DEBUG_MICROCODE                 1
  60#define DBG                             1
  61#define SLIC_INTERRUPT_PROCESS_LIMIT	1
  62#define SLIC_OFFLOAD_IP_CHECKSUM		1
  63#define STATS_TIMER_INTERVAL			2
  64#define PING_TIMER_INTERVAL			    1
  65
  66#include <linux/kernel.h>
  67#include <linux/string.h>
  68#include <linux/errno.h>
  69#include <linux/ioport.h>
  70#include <linux/slab.h>
  71#include <linux/interrupt.h>
  72#include <linux/timer.h>
  73#include <linux/pci.h>
  74#include <linux/spinlock.h>
  75#include <linux/init.h>
  76#include <linux/bitops.h>
  77#include <linux/io.h>
  78#include <linux/netdevice.h>
  79#include <linux/etherdevice.h>
  80#include <linux/skbuff.h>
  81#include <linux/delay.h>
  82#include <linux/debugfs.h>
  83#include <linux/seq_file.h>
  84#include <linux/kthread.h>
  85#include <linux/module.h>
  86#include <linux/moduleparam.h>
  87
  88#include <linux/firmware.h>
  89#include <linux/types.h>
  90#include <linux/dma-mapping.h>
  91#include <linux/mii.h>
  92#include <linux/if_vlan.h>
  93#include <asm/unaligned.h>
  94
  95#include <linux/ethtool.h>
  96#include <linux/uaccess.h>
  97#include "slichw.h"
  98#include "slic.h"
  99
 100static uint slic_first_init = 1;
 101static char *slic_banner = "Alacritech SLIC Technology(tm) Server "\
 102		"and Storage Accelerator (Non-Accelerated)";
 103
 104static char *slic_proc_version = "2.0.351  2006/07/14 12:26:00";
 105static char *slic_product_name = "SLIC Technology(tm) Server "\
 106		"and Storage Accelerator (Non-Accelerated)";
 107static char *slic_vendor = "Alacritech, Inc.";
 108
 109static int slic_debug = 1;
 110static int debug = -1;
 111static struct net_device *head_netdevice;
 112
 113static struct base_driver slic_global = { {}, 0, 0, 0, 1, NULL, NULL };
 114static int intagg_delay = 100;
 115static u32 dynamic_intagg;
 116static unsigned int rcv_count;
 117static struct dentry *slic_debugfs;
 118
 119#define DRV_NAME          "slicoss"
 120#define DRV_VERSION       "2.0.1"
 121#define DRV_AUTHOR        "Alacritech, Inc. Engineering"
 122#define DRV_DESCRIPTION   "Alacritech SLIC Techonology(tm) "\
 123		"Non-Accelerated Driver"
 124#define DRV_COPYRIGHT     "Copyright  2000-2006 Alacritech, Inc. "\
 125		"All rights reserved."
 126#define PFX		   DRV_NAME " "
 127
 128MODULE_AUTHOR(DRV_AUTHOR);
 129MODULE_DESCRIPTION(DRV_DESCRIPTION);
 130MODULE_LICENSE("Dual BSD/GPL");
 131
 132module_param(dynamic_intagg, int, 0);
 133MODULE_PARM_DESC(dynamic_intagg, "Dynamic Interrupt Aggregation Setting");
 134module_param(intagg_delay, int, 0);
 135MODULE_PARM_DESC(intagg_delay, "uSec Interrupt Aggregation Delay");
 136
 137static DEFINE_PCI_DEVICE_TABLE(slic_pci_tbl) = {
 138	{ PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_1GB_DEVICE_ID) },
 139	{ PCI_DEVICE(PCI_VENDOR_ID_ALACRITECH, SLIC_2GB_DEVICE_ID) },
 140	{ 0 }
 141};
 142
 143MODULE_DEVICE_TABLE(pci, slic_pci_tbl);
 144
 145#ifdef ASSERT
 146#undef ASSERT
 147#endif
 148
 149static void slic_assert_fail(void)
 150{
 151	u32 cpuid;
 152	u32 curr_pid;
 153	cpuid = smp_processor_id();
 154	curr_pid = current->pid;
 155
 156	printk(KERN_ERR "%s CPU # %d ---- PID # %d\n",
 157	       __func__, cpuid, curr_pid);
 158}
 159
 160#ifndef ASSERT
 161#define ASSERT(a) do {							\
 162	if (!(a)) {							\
 163		printk(KERN_ERR "slicoss ASSERT() Failure: function %s"	\
 164			"line %d\n", __func__, __LINE__);		\
 165		slic_assert_fail();					\
 166	}								\
 167} while (0)
 168#endif
 169
 170
 171#define SLIC_GET_SLIC_HANDLE(_adapter, _pslic_handle)                   \
 172{                                                                       \
 173    spin_lock_irqsave(&_adapter->handle_lock.lock,                      \
 174			_adapter->handle_lock.flags);                   \
 175    _pslic_handle  =  _adapter->pfree_slic_handles;                     \
 176    if (_pslic_handle) {                                                \
 177	ASSERT(_pslic_handle->type == SLIC_HANDLE_FREE);                \
 178	_adapter->pfree_slic_handles = _pslic_handle->next;             \
 179    }                                                                   \
 180    spin_unlock_irqrestore(&_adapter->handle_lock.lock,                 \
 181			_adapter->handle_lock.flags);                   \
 182}
 183
 184#define SLIC_FREE_SLIC_HANDLE(_adapter, _pslic_handle)                  \
 185{                                                                       \
 186    _pslic_handle->type = SLIC_HANDLE_FREE;                             \
 187    spin_lock_irqsave(&_adapter->handle_lock.lock,                      \
 188			_adapter->handle_lock.flags);                   \
 189    _pslic_handle->next = _adapter->pfree_slic_handles;                 \
 190    _adapter->pfree_slic_handles = _pslic_handle;                       \
 191    spin_unlock_irqrestore(&_adapter->handle_lock.lock,                 \
 192			_adapter->handle_lock.flags);                   \
 193}
 194
 195static inline void slic_reg32_write(void __iomem *reg, u32 value, bool flush)
 196{
 197	writel(value, reg);
 198	if (flush)
 199		mb();
 200}
 201
 202static inline void slic_reg64_write(struct adapter *adapter, void __iomem *reg,
 203				    u32 value, void __iomem *regh, u32 paddrh,
 204				    bool flush)
 205{
 206	spin_lock_irqsave(&adapter->bit64reglock.lock,
 207				adapter->bit64reglock.flags);
 208	if (paddrh != adapter->curaddrupper) {
 209		adapter->curaddrupper = paddrh;
 210		writel(paddrh, regh);
 211	}
 212	writel(value, reg);
 213	if (flush)
 214		mb();
 215	spin_unlock_irqrestore(&adapter->bit64reglock.lock,
 216				adapter->bit64reglock.flags);
 217}
 218
 219/*
 220 * Functions to obtain the CRC corresponding to the destination mac address.
 221 * This is a standard ethernet CRC in that it is a 32-bit, reflected CRC using
 222 * the polynomial:
 223 *   x^32 + x^26 + x^23 + x^22 + x^16 + x^12 + x^11 + x^10 + x^8 + x^7 + x^5 +
 224 *   x^4 + x^2 + x^1.
 225 *
 226 * After the CRC for the 6 bytes is generated (but before the value is
 227 * complemented),
 228 * we must then transpose the value and return bits 30-23.
 229 *
 230 */
 231static u32 slic_crc_table[256];	/* Table of CRCs for all possible byte values */
 232static u32 slic_crc_init;	/* Is table initialized */
 233
 234/*
 235 *  Contruct the CRC32 table
 236 */
 237static void slic_mcast_init_crc32(void)
 238{
 239	u32 c;		/*  CRC shit reg                 */
 240	u32 e = 0;		/*  Poly X-or pattern            */
 241	int i;			/*  counter                      */
 242	int k;			/*  byte being shifted into crc  */
 243
 244	static int p[] = { 0, 1, 2, 4, 5, 7, 8, 10, 11, 12, 16, 22, 23, 26 };
 245
 246	for (i = 0; i < ARRAY_SIZE(p); i++)
 247		e |= 1L << (31 - p[i]);
 248
 249	for (i = 1; i < 256; i++) {
 250		c = i;
 251		for (k = 8; k; k--)
 252			c = c & 1 ? (c >> 1) ^ e : c >> 1;
 253		slic_crc_table[i] = c;
 254	}
 255}
 256
 257/*
 258 *  Return the MAC hast as described above.
 259 */
 260static unsigned char slic_mcast_get_mac_hash(char *macaddr)
 261{
 262	u32 crc;
 263	char *p;
 264	int i;
 265	unsigned char machash = 0;
 266
 267	if (!slic_crc_init) {
 268		slic_mcast_init_crc32();
 269		slic_crc_init = 1;
 270	}
 271
 272	crc = 0xFFFFFFFF;	/* Preload shift register, per crc-32 spec */
 273	for (i = 0, p = macaddr; i < 6; ++p, ++i)
 274		crc = (crc >> 8) ^ slic_crc_table[(crc ^ *p) & 0xFF];
 275
 276	/* Return bits 1-8, transposed */
 277	for (i = 1; i < 9; i++)
 278		machash |= (((crc >> i) & 1) << (8 - i));
 279
 280	return machash;
 281}
 282
 283static void slic_mcast_set_bit(struct adapter *adapter, char *address)
 284{
 285	unsigned char crcpoly;
 286
 287	/* Get the CRC polynomial for the mac address */
 288	crcpoly = slic_mcast_get_mac_hash(address);
 289
 290	/* We only have space on the SLIC for 64 entries.  Lop
 291	 * off the top two bits. (2^6 = 64)
 292	 */
 293	crcpoly &= 0x3F;
 294
 295	/* OR in the new bit into our 64 bit mask. */
 296	adapter->mcastmask |= (u64) 1 << crcpoly;
 297}
 298
 299static void slic_mcast_set_mask(struct adapter *adapter)
 300{
 301	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 302
 303	if (adapter->macopts & (MAC_ALLMCAST | MAC_PROMISC)) {
 304		/* Turn on all multicast addresses. We have to do this for
 305		 * promiscuous mode as well as ALLMCAST mode.  It saves the
 306		 * Microcode from having to keep state about the MAC
 307		 * configuration.
 308		 */
 309		slic_reg32_write(&slic_regs->slic_mcastlow, 0xFFFFFFFF, FLUSH);
 310		slic_reg32_write(&slic_regs->slic_mcasthigh, 0xFFFFFFFF,
 311				 FLUSH);
 312	} else {
 313		/* Commit our multicast mast to the SLIC by writing to the
 314		 * multicast address mask registers
 315		 */
 316		slic_reg32_write(&slic_regs->slic_mcastlow,
 317			(u32)(adapter->mcastmask & 0xFFFFFFFF), FLUSH);
 318		slic_reg32_write(&slic_regs->slic_mcasthigh,
 319			(u32)((adapter->mcastmask >> 32) & 0xFFFFFFFF), FLUSH);
 320	}
 321}
 322
 323static void slic_timer_ping(ulong dev)
 324{
 325	struct adapter *adapter;
 326	struct sliccard *card;
 327
 328	ASSERT(dev);
 329	adapter = netdev_priv((struct net_device *)dev);
 330	ASSERT(adapter);
 331	card = adapter->card;
 332	ASSERT(card);
 333
 334	adapter->pingtimer.expires = jiffies + (PING_TIMER_INTERVAL * HZ);
 335	add_timer(&adapter->pingtimer);
 336}
 337
 338static void slic_unmap_mmio_space(struct adapter *adapter)
 339{
 340	if (adapter->slic_regs)
 341		iounmap(adapter->slic_regs);
 342	adapter->slic_regs = NULL;
 343}
 344
 345/*
 346 *  slic_link_config
 347 *
 348 *  Write phy control to configure link duplex/speed
 349 *
 350 */
 351static void slic_link_config(struct adapter *adapter,
 352		      u32 linkspeed, u32 linkduplex)
 353{
 354	u32 __iomem *wphy;
 355	u32 speed;
 356	u32 duplex;
 357	u32 phy_config;
 358	u32 phy_advreg;
 359	u32 phy_gctlreg;
 360
 361	if (adapter->state != ADAPT_UP)
 362		return;
 363
 364	ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
 365	       || (adapter->devid == SLIC_2GB_DEVICE_ID));
 366
 367	if (linkspeed > LINK_1000MB)
 368		linkspeed = LINK_AUTOSPEED;
 369	if (linkduplex > LINK_AUTOD)
 370		linkduplex = LINK_AUTOD;
 371
 372	wphy = &adapter->slic_regs->slic_wphy;
 373
 374	if ((linkspeed == LINK_AUTOSPEED) || (linkspeed == LINK_1000MB)) {
 375		if (adapter->flags & ADAPT_FLAGS_FIBERMEDIA) {
 376			/*  We've got a fiber gigabit interface, and register
 377			 *  4 is different in fiber mode than in copper mode
 378			 */
 379
 380			/* advertise FD only @1000 Mb */
 381			phy_advreg = (MIICR_REG_4 | (PAR_ADV1000XFD));
 382			/* enable PAUSE frames        */
 383			phy_advreg |= PAR_ASYMPAUSE_FIBER;
 384			slic_reg32_write(wphy, phy_advreg, FLUSH);
 385
 386			if (linkspeed == LINK_AUTOSPEED) {
 387				/* reset phy, enable auto-neg  */
 388				phy_config =
 389				    (MIICR_REG_PCR |
 390				     (PCR_RESET | PCR_AUTONEG |
 391				      PCR_AUTONEG_RST));
 392				slic_reg32_write(wphy, phy_config, FLUSH);
 393			} else {	/* forced 1000 Mb FD*/
 394				/* power down phy to break link
 395				   this may not work) */
 396				phy_config = (MIICR_REG_PCR | PCR_POWERDOWN);
 397				slic_reg32_write(wphy, phy_config, FLUSH);
 398				/* wait, Marvell says 1 sec,
 399				   try to get away with 10 ms  */
 400				mdelay(10);
 401
 402				/* disable auto-neg, set speed/duplex,
 403				   soft reset phy, powerup */
 404				phy_config =
 405				    (MIICR_REG_PCR |
 406				     (PCR_RESET | PCR_SPEED_1000 |
 407				      PCR_DUPLEX_FULL));
 408				slic_reg32_write(wphy, phy_config, FLUSH);
 409			}
 410		} else {	/* copper gigabit */
 411
 412			/* Auto-Negotiate or 1000 Mb must be auto negotiated
 413			 * We've got a copper gigabit interface, and
 414			 * register 4 is different in copper mode than
 415			 * in fiber mode
 416			 */
 417			if (linkspeed == LINK_AUTOSPEED) {
 418				/* advertise 10/100 Mb modes   */
 419				phy_advreg =
 420				    (MIICR_REG_4 |
 421				     (PAR_ADV100FD | PAR_ADV100HD | PAR_ADV10FD
 422				      | PAR_ADV10HD));
 423			} else {
 424			/* linkspeed == LINK_1000MB -
 425			   don't advertise 10/100 Mb modes  */
 426				phy_advreg = MIICR_REG_4;
 427			}
 428			/* enable PAUSE frames  */
 429			phy_advreg |= PAR_ASYMPAUSE;
 430			/* required by the Cicada PHY  */
 431			phy_advreg |= PAR_802_3;
 432			slic_reg32_write(wphy, phy_advreg, FLUSH);
 433			/* advertise FD only @1000 Mb  */
 434			phy_gctlreg = (MIICR_REG_9 | (PGC_ADV1000FD));
 435			slic_reg32_write(wphy, phy_gctlreg, FLUSH);
 436
 437			if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
 438				/* if a Marvell PHY
 439				   enable auto crossover */
 440				phy_config =
 441				    (MIICR_REG_16 | (MRV_REG16_XOVERON));
 442				slic_reg32_write(wphy, phy_config, FLUSH);
 443
 444				/* reset phy, enable auto-neg  */
 445				phy_config =
 446				    (MIICR_REG_PCR |
 447				     (PCR_RESET | PCR_AUTONEG |
 448				      PCR_AUTONEG_RST));
 449				slic_reg32_write(wphy, phy_config, FLUSH);
 450			} else {	/* it's a Cicada PHY  */
 451				/* enable and restart auto-neg (don't reset)  */
 452				phy_config =
 453				    (MIICR_REG_PCR |
 454				     (PCR_AUTONEG | PCR_AUTONEG_RST));
 455				slic_reg32_write(wphy, phy_config, FLUSH);
 456			}
 457		}
 458	} else {
 459		/* Forced 10/100  */
 460		if (linkspeed == LINK_10MB)
 461			speed = 0;
 462		else
 463			speed = PCR_SPEED_100;
 464		if (linkduplex == LINK_HALFD)
 465			duplex = 0;
 466		else
 467			duplex = PCR_DUPLEX_FULL;
 468
 469		if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
 470			/* if a Marvell PHY
 471			   disable auto crossover  */
 472			phy_config = (MIICR_REG_16 | (MRV_REG16_XOVEROFF));
 473			slic_reg32_write(wphy, phy_config, FLUSH);
 474		}
 475
 476		/* power down phy to break link (this may not work)  */
 477		phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN | speed | duplex));
 478		slic_reg32_write(wphy, phy_config, FLUSH);
 479
 480		/* wait, Marvell says 1 sec, try to get away with 10 ms */
 481		mdelay(10);
 482
 483		if (adapter->subsysid != SLIC_1GB_CICADA_SUBSYS_ID) {
 484			/* if a Marvell PHY
 485			   disable auto-neg, set speed,
 486			   soft reset phy, powerup */
 487			phy_config =
 488			    (MIICR_REG_PCR | (PCR_RESET | speed | duplex));
 489			slic_reg32_write(wphy, phy_config, FLUSH);
 490		} else {	/* it's a Cicada PHY  */
 491			/* disable auto-neg, set speed, powerup  */
 492			phy_config = (MIICR_REG_PCR | (speed | duplex));
 493			slic_reg32_write(wphy, phy_config, FLUSH);
 494		}
 495	}
 496}
 497
 498static int slic_card_download_gbrcv(struct adapter *adapter)
 499{
 500	const struct firmware *fw;
 501	const char *file = "";
 502	int ret;
 503	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 504	u32 codeaddr;
 505	u32 instruction;
 506	int index = 0;
 507	u32 rcvucodelen = 0;
 508
 509	switch (adapter->devid) {
 510	case SLIC_2GB_DEVICE_ID:
 511		file = "slicoss/oasisrcvucode.sys";
 512		break;
 513	case SLIC_1GB_DEVICE_ID:
 514		file = "slicoss/gbrcvucode.sys";
 515		break;
 516	default:
 517		ASSERT(0);
 518		break;
 519	}
 520
 521	ret = request_firmware(&fw, file, &adapter->pcidev->dev);
 522	if (ret) {
 523		dev_err(&adapter->pcidev->dev,
 524			"SLICOSS: Failed to load firmware %s\n", file);
 525		return ret;
 526	}
 527
 528	rcvucodelen = *(u32 *)(fw->data + index);
 529	index += 4;
 530	switch (adapter->devid) {
 531	case SLIC_2GB_DEVICE_ID:
 532		if (rcvucodelen != OasisRcvUCodeLen)
 533			return -EINVAL;
 534		break;
 535	case SLIC_1GB_DEVICE_ID:
 536		if (rcvucodelen != GBRcvUCodeLen)
 537			return -EINVAL;
 538		break;
 539	default:
 540		ASSERT(0);
 541		break;
 542	}
 543	/* start download */
 544	slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_BEGIN, FLUSH);
 545	/* download the rcv sequencer ucode */
 546	for (codeaddr = 0; codeaddr < rcvucodelen; codeaddr++) {
 547		/* write out instruction address */
 548		slic_reg32_write(&slic_regs->slic_rcv_wcs, codeaddr, FLUSH);
 549
 550		instruction = *(u32 *)(fw->data + index);
 551		index += 4;
 552		/* write out the instruction data low addr */
 553		slic_reg32_write(&slic_regs->slic_rcv_wcs, instruction, FLUSH);
 554
 555		instruction = *(u8 *)(fw->data + index);
 556		index++;
 557		/* write out the instruction data high addr */
 558		slic_reg32_write(&slic_regs->slic_rcv_wcs, (u8)instruction,
 559				 FLUSH);
 560	}
 561
 562	/* download finished */
 563	release_firmware(fw);
 564	slic_reg32_write(&slic_regs->slic_rcv_wcs, SLIC_RCVWCS_FINISH, FLUSH);
 565	return 0;
 566}
 567
 568MODULE_FIRMWARE("slicoss/oasisrcvucode.sys");
 569MODULE_FIRMWARE("slicoss/gbrcvucode.sys");
 570
 571static int slic_card_download(struct adapter *adapter)
 572{
 573	const struct firmware *fw;
 574	const char *file = "";
 575	int ret;
 576	u32 section;
 577	int thissectionsize;
 578	int codeaddr;
 579	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 580	u32 instruction;
 581	u32 baseaddress;
 582	u32 i;
 583	u32 numsects = 0;
 584	u32 sectsize[3];
 585	u32 sectstart[3];
 586	int ucode_start, index = 0;
 587
 588	switch (adapter->devid) {
 589	case SLIC_2GB_DEVICE_ID:
 590		file = "slicoss/oasisdownload.sys";
 591		break;
 592	case SLIC_1GB_DEVICE_ID:
 593		file = "slicoss/gbdownload.sys";
 594		break;
 595	default:
 596		ASSERT(0);
 597		break;
 598	}
 599	ret = request_firmware(&fw, file, &adapter->pcidev->dev);
 600	if (ret) {
 601		dev_err(&adapter->pcidev->dev,
 602			"SLICOSS: Failed to load firmware %s\n", file);
 603		return ret;
 604	}
 605	numsects = *(u32 *)(fw->data + index);
 606	index += 4;
 607	ASSERT(numsects <= 3);
 608	for (i = 0; i < numsects; i++) {
 609		sectsize[i] = *(u32 *)(fw->data + index);
 610		index += 4;
 611	}
 612	for (i = 0; i < numsects; i++) {
 613		sectstart[i] = *(u32 *)(fw->data + index);
 614		index += 4;
 615	}
 616	ucode_start = index;
 617	instruction = *(u32 *)(fw->data + index);
 618	index += 4;
 619	for (section = 0; section < numsects; section++) {
 620		baseaddress = sectstart[section];
 621		thissectionsize = sectsize[section] >> 3;
 622
 623		for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
 624			/* Write out instruction address */
 625			slic_reg32_write(&slic_regs->slic_wcs,
 626					 baseaddress + codeaddr, FLUSH);
 627			/* Write out instruction to low addr */
 628			slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
 629			instruction = *(u32 *)(fw->data + index);
 630			index += 4;
 631
 632			/* Write out instruction to high addr */
 633			slic_reg32_write(&slic_regs->slic_wcs, instruction, FLUSH);
 634			instruction = *(u32 *)(fw->data + index);
 635			index += 4;
 636		}
 637	}
 638	index = ucode_start;
 639	for (section = 0; section < numsects; section++) {
 640		instruction = *(u32 *)(fw->data + index);
 641		baseaddress = sectstart[section];
 642		if (baseaddress < 0x8000)
 643			continue;
 644		thissectionsize = sectsize[section] >> 3;
 645
 646		for (codeaddr = 0; codeaddr < thissectionsize; codeaddr++) {
 647			/* Write out instruction address */
 648			slic_reg32_write(&slic_regs->slic_wcs,
 649				SLIC_WCS_COMPARE | (baseaddress + codeaddr),
 650				FLUSH);
 651			/* Write out instruction to low addr */
 652			slic_reg32_write(&slic_regs->slic_wcs, instruction,
 653					 FLUSH);
 654			instruction = *(u32 *)(fw->data + index);
 655			index += 4;
 656			/* Write out instruction to high addr */
 657			slic_reg32_write(&slic_regs->slic_wcs, instruction,
 658					 FLUSH);
 659			instruction = *(u32 *)(fw->data + index);
 660			index += 4;
 661
 662			/* Check SRAM location zero. If it is non-zero. Abort.*/
 663/*			failure = readl((u32 __iomem *)&slic_regs->slic_reset);
 664			if (failure) {
 665				release_firmware(fw);
 666				return -EIO;
 667			}*/
 668		}
 669	}
 670	release_firmware(fw);
 671	/* Everything OK, kick off the card */
 672	mdelay(10);
 673	slic_reg32_write(&slic_regs->slic_wcs, SLIC_WCS_START, FLUSH);
 674
 675	/* stall for 20 ms, long enough for ucode to init card
 676	   and reach mainloop */
 677	mdelay(20);
 678
 679	return 0;
 680}
 681
 682MODULE_FIRMWARE("slicoss/oasisdownload.sys");
 683MODULE_FIRMWARE("slicoss/gbdownload.sys");
 684
 685static void slic_adapter_set_hwaddr(struct adapter *adapter)
 686{
 687	struct sliccard *card = adapter->card;
 688
 689	if ((adapter->card) && (card->config_set)) {
 690		memcpy(adapter->macaddr,
 691		       card->config.MacInfo[adapter->functionnumber].macaddrA,
 692		       sizeof(struct slic_config_mac));
 693		if (!(adapter->currmacaddr[0] || adapter->currmacaddr[1] ||
 694		      adapter->currmacaddr[2] || adapter->currmacaddr[3] ||
 695		      adapter->currmacaddr[4] || adapter->currmacaddr[5])) {
 696			memcpy(adapter->currmacaddr, adapter->macaddr, 6);
 697		}
 698		if (adapter->netdev) {
 699			memcpy(adapter->netdev->dev_addr, adapter->currmacaddr,
 700			       6);
 701		}
 702	}
 703}
 704
 705static void slic_intagg_set(struct adapter *adapter, u32 value)
 706{
 707	slic_reg32_write(&adapter->slic_regs->slic_intagg, value, FLUSH);
 708	adapter->card->loadlevel_current = value;
 709}
 710
 711static void slic_soft_reset(struct adapter *adapter)
 712{
 713	if (adapter->card->state == CARD_UP) {
 714		slic_reg32_write(&adapter->slic_regs->slic_quiesce, 0, FLUSH);
 715		mdelay(1);
 716	}
 717
 718	slic_reg32_write(&adapter->slic_regs->slic_reset, SLIC_RESET_MAGIC,
 719			 FLUSH);
 720	mdelay(1);
 721}
 722
 723static void slic_mac_address_config(struct adapter *adapter)
 724{
 725	u32 value;
 726	u32 value2;
 727	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 728
 729	value = *(u32 *) &adapter->currmacaddr[2];
 730	value = ntohl(value);
 731	slic_reg32_write(&slic_regs->slic_wraddral, value, FLUSH);
 732	slic_reg32_write(&slic_regs->slic_wraddrbl, value, FLUSH);
 733
 734	value2 = (u32) ((adapter->currmacaddr[0] << 8 |
 735			     adapter->currmacaddr[1]) & 0xFFFF);
 736
 737	slic_reg32_write(&slic_regs->slic_wraddrah, value2, FLUSH);
 738	slic_reg32_write(&slic_regs->slic_wraddrbh, value2, FLUSH);
 739
 740	/* Write our multicast mask out to the card.  This is done */
 741	/* here in addition to the slic_mcast_addr_set routine     */
 742	/* because ALL_MCAST may have been enabled or disabled     */
 743	slic_mcast_set_mask(adapter);
 744}
 745
 746static void slic_mac_config(struct adapter *adapter)
 747{
 748	u32 value;
 749	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 750
 751	/* Setup GMAC gaps */
 752	if (adapter->linkspeed == LINK_1000MB) {
 753		value = ((GMCR_GAPBB_1000 << GMCR_GAPBB_SHIFT) |
 754			 (GMCR_GAPR1_1000 << GMCR_GAPR1_SHIFT) |
 755			 (GMCR_GAPR2_1000 << GMCR_GAPR2_SHIFT));
 756	} else {
 757		value = ((GMCR_GAPBB_100 << GMCR_GAPBB_SHIFT) |
 758			 (GMCR_GAPR1_100 << GMCR_GAPR1_SHIFT) |
 759			 (GMCR_GAPR2_100 << GMCR_GAPR2_SHIFT));
 760	}
 761
 762	/* enable GMII */
 763	if (adapter->linkspeed == LINK_1000MB)
 764		value |= GMCR_GBIT;
 765
 766	/* enable fullduplex */
 767	if ((adapter->linkduplex == LINK_FULLD)
 768	    || (adapter->macopts & MAC_LOOPBACK)) {
 769		value |= GMCR_FULLD;
 770	}
 771
 772	/* write mac config */
 773	slic_reg32_write(&slic_regs->slic_wmcfg, value, FLUSH);
 774
 775	/* setup mac addresses */
 776	slic_mac_address_config(adapter);
 777}
 778
 779static void slic_config_set(struct adapter *adapter, bool linkchange)
 780{
 781	u32 value;
 782	u32 RcrReset;
 783	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 784
 785	if (linkchange) {
 786		/* Setup MAC */
 787		slic_mac_config(adapter);
 788		RcrReset = GRCR_RESET;
 789	} else {
 790		slic_mac_address_config(adapter);
 791		RcrReset = 0;
 792	}
 793
 794	if (adapter->linkduplex == LINK_FULLD) {
 795		/* setup xmtcfg */
 796		value = (GXCR_RESET |	/* Always reset     */
 797			 GXCR_XMTEN |	/* Enable transmit  */
 798			 GXCR_PAUSEEN);	/* Enable pause     */
 799
 800		slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
 801
 802		/* Setup rcvcfg last */
 803		value = (RcrReset |	/* Reset, if linkchange */
 804			 GRCR_CTLEN |	/* Enable CTL frames    */
 805			 GRCR_ADDRAEN |	/* Address A enable     */
 806			 GRCR_RCVBAD |	/* Rcv bad frames       */
 807			 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
 808	} else {
 809		/* setup xmtcfg */
 810		value = (GXCR_RESET |	/* Always reset     */
 811			 GXCR_XMTEN);	/* Enable transmit  */
 812
 813		slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
 814
 815		/* Setup rcvcfg last */
 816		value = (RcrReset |	/* Reset, if linkchange */
 817			 GRCR_ADDRAEN |	/* Address A enable     */
 818			 GRCR_RCVBAD |	/* Rcv bad frames       */
 819			 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
 820	}
 821
 822	if (adapter->state != ADAPT_DOWN) {
 823		/* Only enable receive if we are restarting or running */
 824		value |= GRCR_RCVEN;
 825	}
 826
 827	if (adapter->macopts & MAC_PROMISC)
 828		value |= GRCR_RCVALL;
 829
 830	slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
 831}
 832
 833/*
 834 *  Turn off RCV and XMT, power down PHY
 835 */
 836static void slic_config_clear(struct adapter *adapter)
 837{
 838	u32 value;
 839	u32 phy_config;
 840	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
 841
 842	/* Setup xmtcfg */
 843	value = (GXCR_RESET |	/* Always reset */
 844		 GXCR_PAUSEEN);	/* Enable pause */
 845
 846	slic_reg32_write(&slic_regs->slic_wxcfg, value, FLUSH);
 847
 848	value = (GRCR_RESET |	/* Always reset      */
 849		 GRCR_CTLEN |	/* Enable CTL frames */
 850		 GRCR_ADDRAEN |	/* Address A enable  */
 851		 (GRCR_HASHSIZE << GRCR_HASHSIZE_SHIFT));
 852
 853	slic_reg32_write(&slic_regs->slic_wrcfg, value, FLUSH);
 854
 855	/* power down phy */
 856	phy_config = (MIICR_REG_PCR | (PCR_POWERDOWN));
 857	slic_reg32_write(&slic_regs->slic_wphy, phy_config, FLUSH);
 858}
 859
 860static bool slic_mac_filter(struct adapter *adapter,
 861			struct ether_header *ether_frame)
 862{
 863	struct net_device *netdev = adapter->netdev;
 864	u32 opts = adapter->macopts;
 865	u32 *dhost4 = (u32 *)&ether_frame->ether_dhost[0];
 866	u16 *dhost2 = (u16 *)&ether_frame->ether_dhost[4];
 867
 868	if (opts & MAC_PROMISC)
 869		return true;
 870
 871	if ((*dhost4 == 0xFFFFFFFF) && (*dhost2 == 0xFFFF)) {
 872		if (opts & MAC_BCAST) {
 873			adapter->rcv_broadcasts++;
 874			return true;
 875		} else {
 876			return false;
 877		}
 878	}
 879
 880	if (ether_frame->ether_dhost[0] & 0x01) {
 881		if (opts & MAC_ALLMCAST) {
 882			adapter->rcv_multicasts++;
 883			netdev->stats.multicast++;
 884			return true;
 885		}
 886		if (opts & MAC_MCAST) {
 887			struct mcast_address *mcaddr = adapter->mcastaddrs;
 888
 889			while (mcaddr) {
 890				if (!compare_ether_addr(mcaddr->address,
 891							ether_frame->ether_dhost)) {
 892					adapter->rcv_multicasts++;
 893					netdev->stats.multicast++;
 894					return true;
 895				}
 896				mcaddr = mcaddr->next;
 897			}
 898			return false;
 899		} else {
 900			return false;
 901		}
 902	}
 903	if (opts & MAC_DIRECTED) {
 904		adapter->rcv_unicasts++;
 905		return true;
 906	}
 907	return false;
 908
 909}
 910
 911static int slic_mac_set_address(struct net_device *dev, void *ptr)
 912{
 913	struct adapter *adapter = netdev_priv(dev);
 914	struct sockaddr *addr = ptr;
 915
 916	if (netif_running(dev))
 917		return -EBUSY;
 918	if (!adapter)
 919		return -EBUSY;
 920
 921	if (!is_valid_ether_addr(addr->sa_data))
 922		return -EINVAL;
 923
 924	memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
 925	memcpy(adapter->currmacaddr, addr->sa_data, dev->addr_len);
 926
 927	slic_config_set(adapter, true);
 928	return 0;
 929}
 930
 931static void slic_timer_load_check(ulong cardaddr)
 932{
 933	struct sliccard *card = (struct sliccard *)cardaddr;
 934	struct adapter *adapter = card->master;
 935	u32 __iomem *intagg;
 936	u32 load = card->events;
 937	u32 level = 0;
 938
 939	intagg = &adapter->slic_regs->slic_intagg;
 940
 941	if ((adapter) && (adapter->state == ADAPT_UP) &&
 942	    (card->state == CARD_UP) && (slic_global.dynamic_intagg)) {
 943		if (adapter->devid == SLIC_1GB_DEVICE_ID) {
 944			if (adapter->linkspeed == LINK_1000MB)
 945				level = 100;
 946			else {
 947				if (load > SLIC_LOAD_5)
 948					level = SLIC_INTAGG_5;
 949				else if (load > SLIC_LOAD_4)
 950					level = SLIC_INTAGG_4;
 951				else if (load > SLIC_LOAD_3)
 952					level = SLIC_INTAGG_3;
 953				else if (load > SLIC_LOAD_2)
 954					level = SLIC_INTAGG_2;
 955				else if (load > SLIC_LOAD_1)
 956					level = SLIC_INTAGG_1;
 957				else
 958					level = SLIC_INTAGG_0;
 959			}
 960			if (card->loadlevel_current != level) {
 961				card->loadlevel_current = level;
 962				slic_reg32_write(intagg, level, FLUSH);
 963			}
 964		} else {
 965			if (load > SLIC_LOAD_5)
 966				level = SLIC_INTAGG_5;
 967			else if (load > SLIC_LOAD_4)
 968				level = SLIC_INTAGG_4;
 969			else if (load > SLIC_LOAD_3)
 970				level = SLIC_INTAGG_3;
 971			else if (load > SLIC_LOAD_2)
 972				level = SLIC_INTAGG_2;
 973			else if (load > SLIC_LOAD_1)
 974				level = SLIC_INTAGG_1;
 975			else
 976				level = SLIC_INTAGG_0;
 977			if (card->loadlevel_current != level) {
 978				card->loadlevel_current = level;
 979				slic_reg32_write(intagg, level, FLUSH);
 980			}
 981		}
 982	}
 983	card->events = 0;
 984	card->loadtimer.expires = jiffies + (SLIC_LOADTIMER_PERIOD * HZ);
 985	add_timer(&card->loadtimer);
 986}
 987
 988static int slic_upr_queue_request(struct adapter *adapter,
 989			   u32 upr_request,
 990			   u32 upr_data,
 991			   u32 upr_data_h,
 992			   u32 upr_buffer, u32 upr_buffer_h)
 993{
 994	struct slic_upr *upr;
 995	struct slic_upr *uprqueue;
 996
 997	upr = kmalloc(sizeof(struct slic_upr), GFP_ATOMIC);
 998	if (!upr)
 999		return -ENOMEM;
1000
1001	upr->adapter = adapter->port;
1002	upr->upr_request = upr_request;
1003	upr->upr_data = upr_data;
1004	upr->upr_buffer = upr_buffer;
1005	upr->upr_data_h = upr_data_h;
1006	upr->upr_buffer_h = upr_buffer_h;
1007	upr->next = NULL;
1008	if (adapter->upr_list) {
1009		uprqueue = adapter->upr_list;
1010
1011		while (uprqueue->next)
1012			uprqueue = uprqueue->next;
1013		uprqueue->next = upr;
1014	} else {
1015		adapter->upr_list = upr;
1016	}
1017	return 0;
1018}
1019
1020static void slic_upr_start(struct adapter *adapter)
1021{
1022	struct slic_upr *upr;
1023	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
1024/*
1025    char * ptr1;
1026    char * ptr2;
1027    uint cmdoffset;
1028*/
1029	upr = adapter->upr_list;
1030	if (!upr)
1031		return;
1032	if (adapter->upr_busy)
1033		return;
1034	adapter->upr_busy = 1;
1035
1036	switch (upr->upr_request) {
1037	case SLIC_UPR_STATS:
1038		if (upr->upr_data_h == 0) {
1039			slic_reg32_write(&slic_regs->slic_stats, upr->upr_data,
1040					 FLUSH);
1041		} else {
1042			slic_reg64_write(adapter, &slic_regs->slic_stats64,
1043					 upr->upr_data,
1044					 &slic_regs->slic_addr_upper,
1045					 upr->upr_data_h, FLUSH);
1046		}
1047		break;
1048
1049	case SLIC_UPR_RLSR:
1050		slic_reg64_write(adapter, &slic_regs->slic_rlsr, upr->upr_data,
1051				 &slic_regs->slic_addr_upper, upr->upr_data_h,
1052				 FLUSH);
1053		break;
1054
1055	case SLIC_UPR_RCONFIG:
1056		slic_reg64_write(adapter, &slic_regs->slic_rconfig,
1057				 upr->upr_data, &slic_regs->slic_addr_upper,
1058				 upr->upr_data_h, FLUSH);
1059		break;
1060	case SLIC_UPR_PING:
1061		slic_reg32_write(&slic_regs->slic_ping, 1, FLUSH);
1062		break;
1063	default:
1064		ASSERT(0);
1065	}
1066}
1067
1068static int slic_upr_request(struct adapter *adapter,
1069		     u32 upr_request,
1070		     u32 upr_data,
1071		     u32 upr_data_h,
1072		     u32 upr_buffer, u32 upr_buffer_h)
1073{
1074	int rc;
1075
1076	spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1077	rc = slic_upr_queue_request(adapter,
1078					upr_request,
1079					upr_data,
1080					upr_data_h, upr_buffer, upr_buffer_h);
1081	if (rc)
1082		goto err_unlock_irq;
1083
1084	slic_upr_start(adapter);
1085err_unlock_irq:
1086	spin_unlock_irqrestore(&adapter->upr_lock.lock,
1087				adapter->upr_lock.flags);
1088	return rc;
1089}
1090
1091static void slic_link_upr_complete(struct adapter *adapter, u32 isr)
1092{
1093	u32 linkstatus = adapter->pshmem->linkstatus;
1094	uint linkup;
1095	unsigned char linkspeed;
1096	unsigned char linkduplex;
1097
1098	if ((isr & ISR_UPCERR) || (isr & ISR_UPCBSY)) {
1099		struct slic_shmem *pshmem;
1100
1101		pshmem = (struct slic_shmem *)adapter->phys_shmem;
1102#if BITS_PER_LONG == 64
1103		slic_upr_queue_request(adapter,
1104				       SLIC_UPR_RLSR,
1105				       SLIC_GET_ADDR_LOW(&pshmem->linkstatus),
1106				       SLIC_GET_ADDR_HIGH(&pshmem->linkstatus),
1107				       0, 0);
1108#else
1109		slic_upr_queue_request(adapter,
1110				       SLIC_UPR_RLSR,
1111				       (u32) &pshmem->linkstatus,
1112				       SLIC_GET_ADDR_HIGH(pshmem), 0, 0);
1113#endif
1114		return;
1115	}
1116	if (adapter->state != ADAPT_UP)
1117		return;
1118
1119	ASSERT((adapter->devid == SLIC_1GB_DEVICE_ID)
1120	       || (adapter->devid == SLIC_2GB_DEVICE_ID));
1121
1122	linkup = linkstatus & GIG_LINKUP ? LINK_UP : LINK_DOWN;
1123	if (linkstatus & GIG_SPEED_1000)
1124		linkspeed = LINK_1000MB;
1125	else if (linkstatus & GIG_SPEED_100)
1126		linkspeed = LINK_100MB;
1127	else
1128		linkspeed = LINK_10MB;
1129
1130	if (linkstatus & GIG_FULLDUPLEX)
1131		linkduplex = LINK_FULLD;
1132	else
1133		linkduplex = LINK_HALFD;
1134
1135	if ((adapter->linkstate == LINK_DOWN) && (linkup == LINK_DOWN))
1136		return;
1137
1138	/* link up event, but nothing has changed */
1139	if ((adapter->linkstate == LINK_UP) &&
1140	    (linkup == LINK_UP) &&
1141	    (adapter->linkspeed == linkspeed) &&
1142	    (adapter->linkduplex == linkduplex))
1143		return;
1144
1145	/* link has changed at this point */
1146
1147	/* link has gone from up to down */
1148	if (linkup == LINK_DOWN) {
1149		adapter->linkstate = LINK_DOWN;
1150		return;
1151	}
1152
1153	/* link has gone from down to up */
1154	adapter->linkspeed = linkspeed;
1155	adapter->linkduplex = linkduplex;
1156
1157	if (adapter->linkstate != LINK_UP) {
1158		/* setup the mac */
1159		slic_config_set(adapter, true);
1160		adapter->linkstate = LINK_UP;
1161		netif_start_queue(adapter->netdev);
1162	}
1163}
1164
1165static void slic_upr_request_complete(struct adapter *adapter, u32 isr)
1166{
1167	struct sliccard *card = adapter->card;
1168	struct slic_upr *upr;
1169
1170	spin_lock_irqsave(&adapter->upr_lock.lock, adapter->upr_lock.flags);
1171	upr = adapter->upr_list;
1172	if (!upr) {
1173		ASSERT(0);
1174		spin_unlock_irqrestore(&adapter->upr_lock.lock,
1175					adapter->upr_lock.flags);
1176		return;
1177	}
1178	adapter->upr_list = upr->next;
1179	upr->next = NULL;
1180	adapter->upr_busy = 0;
1181	ASSERT(adapter->port == upr->adapter);
1182	switch (upr->upr_request) {
1183	case SLIC_UPR_STATS:
1184		{
1185			struct slic_stats *slicstats =
1186			    (struct slic_stats *) &adapter->pshmem->inicstats;
1187			struct slic_stats *newstats = slicstats;
1188			struct slic_stats  *old = &adapter->inicstats_prev;
1189			struct slicnet_stats *stst = &adapter->slic_stats;
1190
1191			if (isr & ISR_UPCERR) {
1192				dev_err(&adapter->netdev->dev,
1193					"SLIC_UPR_STATS command failed isr[%x]\n",
1194					isr);
1195
1196				break;
1197			}
1198			UPDATE_STATS_GB(stst->tcp.xmit_tcp_segs,
1199					newstats->xmit_tcp_segs_gb,
1200					old->xmit_tcp_segs_gb);
1201
1202			UPDATE_STATS_GB(stst->tcp.xmit_tcp_bytes,
1203					newstats->xmit_tcp_bytes_gb,
1204					old->xmit_tcp_bytes_gb);
1205
1206			UPDATE_STATS_GB(stst->tcp.rcv_tcp_segs,
1207					newstats->rcv_tcp_segs_gb,
1208					old->rcv_tcp_segs_gb);
1209
1210			UPDATE_STATS_GB(stst->tcp.rcv_tcp_bytes,
1211					newstats->rcv_tcp_bytes_gb,
1212					old->rcv_tcp_bytes_gb);
1213
1214			UPDATE_STATS_GB(stst->iface.xmt_bytes,
1215					newstats->xmit_bytes_gb,
1216					old->xmit_bytes_gb);
1217
1218			UPDATE_STATS_GB(stst->iface.xmt_ucast,
1219					newstats->xmit_unicasts_gb,
1220					old->xmit_unicasts_gb);
1221
1222			UPDATE_STATS_GB(stst->iface.rcv_bytes,
1223					newstats->rcv_bytes_gb,
1224					old->rcv_bytes_gb);
1225
1226			UPDATE_STATS_GB(stst->iface.rcv_ucast,
1227					newstats->rcv_unicasts_gb,
1228					old->rcv_unicasts_gb);
1229
1230			UPDATE_STATS_GB(stst->iface.xmt_errors,
1231					newstats->xmit_collisions_gb,
1232					old->xmit_collisions_gb);
1233
1234			UPDATE_STATS_GB(stst->iface.xmt_errors,
1235					newstats->xmit_excess_collisions_gb,
1236					old->xmit_excess_collisions_gb);
1237
1238			UPDATE_STATS_GB(stst->iface.xmt_errors,
1239					newstats->xmit_other_error_gb,
1240					old->xmit_other_error_gb);
1241
1242			UPDATE_STATS_GB(stst->iface.rcv_errors,
1243					newstats->rcv_other_error_gb,
1244					old->rcv_other_error_gb);
1245
1246			UPDATE_STATS_GB(stst->iface.rcv_discards,
1247					newstats->rcv_drops_gb,
1248					old->rcv_drops_gb);
1249
1250			if (newstats->rcv_drops_gb > old->rcv_drops_gb) {
1251				adapter->rcv_drops +=
1252				    (newstats->rcv_drops_gb -
1253				     old->rcv_drops_gb);
1254			}
1255			memcpy(old, newstats, sizeof(struct slic_stats));
1256			break;
1257		}
1258	case SLIC_UPR_RLSR:
1259		slic_link_upr_complete(adapter, isr);
1260		break;
1261	case SLIC_UPR_RCONFIG:
1262		break;
1263	case SLIC_UPR_RPHY:
1264		ASSERT(0);
1265		break;
1266	case SLIC_UPR_ENLB:
1267		ASSERT(0);
1268		break;
1269	case SLIC_UPR_ENCT:
1270		ASSERT(0);
1271		break;
1272	case SLIC_UPR_PDWN:
1273		ASSERT(0);
1274		break;
1275	case SLIC_UPR_PING:
1276		card->pingstatus |= (isr & ISR_PINGDSMASK);
1277		break;
1278	default:
1279		ASSERT(0);
1280	}
1281	kfree(upr);
1282	slic_upr_start(adapter);
1283	spin_unlock_irqrestore(&adapter->upr_lock.lock,
1284				adapter->upr_lock.flags);
1285}
1286
1287static void slic_config_get(struct adapter *adapter, u32 config,
1288							u32 config_h)
1289{
1290	int status;
1291
1292	status = slic_upr_request(adapter,
1293				  SLIC_UPR_RCONFIG,
1294				  (u32) config, (u32) config_h, 0, 0);
1295	ASSERT(status == 0);
1296}
1297
1298/*
1299 *  this is here to checksum the eeprom, there is some ucode bug
1300 *  which prevens us from using the ucode result.
1301 *  remove this once ucode is fixed.
1302 */
1303static ushort slic_eeprom_cksum(char *m, int len)
1304{
1305#define ADDCARRY(x)  (x > 65535 ? x -= 65535 : x)
1306#define REDUCE {l_util.l = sum; sum = l_util.s[0] + l_util.s[1]; ADDCARRY(sum);\
1307		}
1308
1309	u16 *w;
1310	u32 sum = 0;
1311	u32 byte_swapped = 0;
1312	u32 w_int;
1313
1314	union {
1315		char c[2];
1316		ushort s;
1317	} s_util;
1318
1319	union {
1320		ushort s[2];
1321		int l;
1322	} l_util;
1323
1324	l_util.l = 0;
1325	s_util.s = 0;
1326
1327	w = (u16 *)m;
1328#if BITS_PER_LONG == 64
1329	w_int = (u32) ((ulong) w & 0x00000000FFFFFFFF);
1330#else
1331	w_int = (u32) (w);
1332#endif
1333	if ((1 & w_int) && (len > 0)) {
1334		REDUCE;
1335		sum <<= 8;
1336		s_util.c[0] = *(unsigned char *)w;
1337		w = (u16 *)((char *)w + 1);
1338		len--;
1339		byte_swapped = 1;
1340	}
1341
1342	/* Unroll the loop to make overhead from branches &c small. */
1343	while ((len -= 32) >= 0) {
1344		sum += w[0];
1345		sum += w[1];
1346		sum += w[2];
1347		sum += w[3];
1348		sum += w[4];
1349		sum += w[5];
1350		sum += w[6];
1351		sum += w[7];
1352		sum += w[8];
1353		sum += w[9];
1354		sum += w[10];
1355		sum += w[11];
1356		sum += w[12];
1357		sum += w[13];
1358		sum += w[14];
1359		sum += w[15];
1360		w = (u16 *)((ulong) w + 16);	/* verify */
1361	}
1362	len += 32;
1363	while ((len -= 8) >= 0) {
1364		sum += w[0];
1365		sum += w[1];
1366		sum += w[2];
1367		sum += w[3];
1368		w = (u16 *)((ulong) w + 4);	/* verify */
1369	}
1370	len += 8;
1371	if (len != 0 || byte_swapped != 0) {
1372		REDUCE;
1373		while ((len -= 2) >= 0)
1374			sum += *w++;	/* verify */
1375		if (byte_swapped) {
1376			REDUCE;
1377			sum <<= 8;
1378			byte_swapped = 0;
1379			if (len == -1) {
1380				s_util.c[1] = *(char *) w;
1381				sum += s_util.s;
1382				len = 0;
1383			} else {
1384				len = -1;
1385			}
1386
1387		} else if (len == -1) {
1388			s_util.c[0] = *(char *) w;
1389		}
1390
1391		if (len == -1) {
1392			s_util.c[1] = 0;
1393			sum += s_util.s;
1394		}
1395	}
1396	REDUCE;
1397	return (ushort) sum;
1398}
1399
1400static void slic_rspqueue_free(struct adapter *adapter)
1401{
1402	int i;
1403	struct slic_rspqueue *rspq = &adapter->rspqueue;
1404
1405	for (i = 0; i < rspq->num_pages; i++) {
1406		if (rspq->vaddr[i]) {
1407			pci_free_consistent(adapter->pcidev, PAGE_SIZE,
1408					    rspq->vaddr[i], rspq->paddr[i]);
1409		}
1410		rspq->vaddr[i] = NULL;
1411		rspq->paddr[i] = 0;
1412	}
1413	rspq->offset = 0;
1414	rspq->pageindex = 0;
1415	rspq->rspbuf = NULL;
1416}
1417
1418static int slic_rspqueue_init(struct adapter *adapter)
1419{
1420	int i;
1421	struct slic_rspqueue *rspq = &adapter->rspqueue;
1422	__iomem struct slic_regs *slic_regs = adapter->slic_regs;
1423	u32 paddrh = 0;
1424
1425	ASSERT(adapter->state == ADAPT_DOWN);
1426	memset(rspq, 0, sizeof(struct slic_rspqueue));
1427
1428	rspq->num_pages = SLIC_RSPQ_PAGES_GB;
1429
1430	for (i = 0; i < rspq->num_pages; i++) {
1431		rspq->vaddr[i] = pci_alloc_consistent(adapter->pcidev,
1432						      PAGE_SIZE,
1433						      &rspq->paddr[i]);
1434		if (!rspq->vaddr[i]) {
1435			dev_err(&adapter->pcidev->dev,
1436				"pci_alloc_consistent failed\n");
1437			slic_rspqueue_free(adapter);
1438			return -ENOMEM;
1439		}
1440		/* FIXME:
1441		 * do we really need this assertions (4K PAGE_SIZE aligned addr)? */
1442#if 0
1443#ifndef CONFIG_X86_64
1444		ASSERT(((u32) rspq->vaddr[i] & 0xFFFFF000) ==
1445		       (u32) rspq->vaddr[i]);
1446		ASSERT(((u32) rspq->paddr[i] & 0xFFFFF000) ==
1447		       (u32) rspq->paddr[i]);
1448#endif
1449#endif
1450		memset(rspq->vaddr[i], 0, PAGE_SIZE);
1451
1452		if (paddrh == 0) {
1453			slic_reg32_write(&slic_regs->slic_rbar,
1454				(rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1455				DONT_FLUSH);
1456		} else {
1457			slic_reg64_write(adapter, &slic_regs->slic_rbar64,
1458				(rspq->paddr[i] | SLIC_RSPQ_BUFSINPAGE),
1459				&slic_regs->slic_addr_upper,
1460				paddrh, DONT_FLUSH);
1461		}
1462	}
1463	rspq->offset = 0;
1464	rspq->pageindex = 0;
1465	rspq->rspbuf = (struct slic_rspbuf *)rspq->vaddr[0];
1466	return 0;
1467}
1468
1469static struct slic_rspbuf *slic_rspqueue_getnext(struct adapter *adapter)
1470{
1471	struct slic_rspqueue *rspq = &adapter->rspqueue;
1472	struct slic_rspbuf *buf;
1473
1474	if (!(rspq->rspbuf->status))
1475		return NULL;
1476
1477	buf = rspq->rspbuf;
1478#if BITS_PER_LONG == 32
1479	ASSERT((buf->status & 0xFFFFFFE0) == 0);
1480#endif
1481	ASSERT(buf->hosthandle);
1482	if (++rspq->offset < SLIC_RSPQ_BUFSINPAGE) {
1483		rspq->rspbuf++;
1484#if BITS_PER_LONG == 32
1485		ASSERT(((u32) rspq->rspbuf & 0xFFFFFFE0) ==
1486		       (u32) rspq->rspbuf);
1487#endif
1488	} else {
1489		ASSERT(rspq->offset == SLIC_RSPQ_BUFSINPAGE);
1490		slic_reg64_write(adapter, &adapter->slic_regs->slic_rbar64,
1491			(rspq->paddr[rspq->pageindex] | SLIC_RSPQ_BUFSINPAGE),
1492			&adapter->slic_regs->slic_addr_upper, 0, DONT_FLUSH);
1493		rspq->pageindex = (++rspq->pageindex) % rspq->num_pages;
1494		rspq->offset = 0;
1495		rspq->rspbuf = (struct slic_rspbuf *)
1496						rspq->vaddr[rspq->pageindex];
1497#if BITS_PER_LONG == 32
1498		ASSERT(((u32) rspq->rspbuf & 0xFFFFF000) ==
1499		       (u32) rspq->rspbuf);
1500#endif
1501	}
1502#if BITS_PER_LONG == 32
1503	ASSERT(((u32) buf & 0xFFFFFFE0) == (u32) buf);
1504#endif
1505	return buf;
1506}
1507
1508static void slic_cmdqmem_init(struct adapter *adapter)
1509{
1510	struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1511
1512	memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1513}
1514
1515static void slic_cmdqmem_free(struct adapter *adapter)
1516{
1517	struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1518	int i;
1519
1520	for (i = 0; i < SLIC_CMDQ_MAXPAGES; i++) {
1521		if (cmdqmem->pages[i]) {
1522			pci_free_consistent(adapter->pcidev,
1523					    PAGE_SIZE,
1524					    (void *) cmdqmem->pages[i],
1525					    cmdqmem->dma_pages[i]);
1526		}
1527	}
1528	memset(cmdqmem, 0, sizeof(struct slic_cmdqmem));
1529}
1530
1531static u32 *slic_cmdqmem_addpage(struct adapter *adapter)
1532{
1533	struct slic_cmdqmem *cmdqmem = &adapter->cmdqmem;
1534	u32 *pageaddr;
1535
1536	if (cmdqmem->pagecnt >= SLIC_CMDQ_MAXPAGES)
1537		return NULL;
1538	pageaddr = pci_alloc_consistent(adapter->pcidev,
1539					PAGE_SIZE,
1540					&cmdqmem->dma_pages[cmdqmem->pagecnt]);
1541	if (!pageaddr)
1542		return NULL;
1543#if BITS_PER_LONG == 32
1544	ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
1545#endif
1546	cmdqmem->pages[cmdqmem->pagecnt] = pageaddr;
1547	cmdqmem->pagecnt++;
1548	return pageaddr;
1549}
1550
1551static void slic_cmdq_free(struct adapter *adapter)
1552{
1553	struct slic_hostcmd *cmd;
1554
1555	cmd = adapter->cmdq_all.head;
1556	while (cmd) {
1557		if (cmd->busy) {
1558			struct sk_buff *tempskb;
1559
1560			tempskb = cmd->skb;
1561			if (tempskb) {
1562				cmd->skb = NULL;
1563				dev_kfree_skb_irq(tempskb);
1564			}
1565		}
1566		cmd = cmd->next_all;
1567	}
1568	memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1569	memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1570	memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1571	slic_cmdqmem_free(adapter);
1572}
1573
1574static void slic_cmdq_addcmdpage(struct adapter *adapter, u32 *page)
1575{
1576	struct slic_hostcmd *cmd;
1577	struct slic_hostcmd *prev;
1578	struct slic_hostcmd *tail;
1579	struct slic_cmdqueue *cmdq;
1580	int cmdcnt;
1581	void *cmdaddr;
1582	ulong phys_addr;
1583	u32 phys_addrl;
1584	u32 phys_addrh;
1585	struct slic_handle *pslic_handle;
1586
1587	cmdaddr = page;
1588	cmd = (struct slic_hostcmd *)cmdaddr;
1589	cmdcnt = 0;
1590
1591	phys_addr = virt_to_bus((void *)page);
1592	phys_addrl = SLIC_GET_ADDR_LOW(phys_addr);
1593	phys_addrh = SLIC_GET_ADDR_HIGH(phys_addr);
1594
1595	prev = NULL;
1596	tail = cmd;
1597	while ((cmdcnt < SLIC_CMDQ_CMDSINPAGE) &&
1598	       (adapter->slic_handle_ix < 256)) {
1599		/* Allocate and initialize a SLIC_HANDLE for this command */
1600		SLIC_GET_SLIC_HANDLE(adapter, pslic_handle);
1601		if (pslic_handle == NULL)
1602			ASSERT(0);
1603		ASSERT(pslic_handle ==
1604		       &adapter->slic_handles[pslic_handle->token.
1605					      handle_index]);
1606		pslic_handle->type = SLIC_HANDLE_CMD;
1607		pslic_handle->address = (void *) cmd;
1608		pslic_handle->offset = (ushort) adapter->slic_handle_ix++;
1609		pslic_handle->other_handle = NULL;
1610		pslic_handle->next = NULL;
1611
1612		cmd->pslic_handle = pslic_handle;
1613		cmd->cmd64.hosthandle = pslic_handle->token.handle_token;
1614		cmd->busy = false;
1615		cmd->paddrl = phys_addrl;
1616		cmd->paddrh = phys_addrh;
1617		cmd->next_all = prev;
1618		cmd->next = prev;
1619		prev = cmd;
1620		phys_addrl += SLIC_HOSTCMD_SIZE;
1621		cmdaddr += SLIC_HOSTCMD_SIZE;
1622
1623		cmd = (struct slic_hostcmd *)cmdaddr;
1624		cmdcnt++;
1625	}
1626
1627	cmdq = &adapter->cmdq_all;
1628	cmdq->count += cmdcnt;	/*  SLIC_CMDQ_CMDSINPAGE;   mooktodo */
1629	tail->next_all = cmdq->head;
1630	cmdq->head = prev;
1631	cmdq = &adapter->cmdq_free;
1632	spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1633	cmdq->count += cmdcnt;	/*  SLIC_CMDQ_CMDSINPAGE;   mooktodo */
1634	tail->next = cmdq->head;
1635	cmdq->head = prev;
1636	spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1637}
1638
1639static int slic_cmdq_init(struct adapter *adapter)
1640{
1641	int i;
1642	u32 *pageaddr;
1643
1644	ASSERT(adapter->state == ADAPT_DOWN);
1645	memset(&adapter->cmdq_all, 0, sizeof(struct slic_cmdqueue));
1646	memset(&adapter->cmdq_free, 0, sizeof(struct slic_cmdqueue));
1647	memset(&adapter->cmdq_done, 0, sizeof(struct slic_cmdqueue));
1648	spin_lock_init(&adapter->cmdq_all.lock.lock);
1649	spin_lock_init(&adapter->cmdq_free.lock.lock);
1650	spin_lock_init(&adapter->cmdq_done.lock.lock);
1651	slic_cmdqmem_init(adapter);
1652	adapter->slic_handle_ix = 1;
1653	for (i = 0; i < SLIC_CMDQ_INITPAGES; i++) {
1654		pageaddr = slic_cmdqmem_addpage(adapter);
1655#if BITS_PER_LONG == 32
1656		ASSERT(((u32) pageaddr & 0xFFFFF000) == (u32) pageaddr);
1657#endif
1658		if (!pageaddr) {
1659			slic_cmdq_free(adapter);
1660			return -ENOMEM;
1661		}
1662		slic_cmdq_addcmdpage(adapter, pageaddr);
1663	}
1664	adapter->slic_handle_ix = 1;
1665
1666	return 0;
1667}
1668
1669static void slic_cmdq_reset(struct adapter *adapter)
1670{
1671	struct slic_hostcmd *hcmd;
1672	struct sk_buff *skb;
1673	u32 outstanding;
1674
1675	spin_lock_irqsave(&adapter->cmdq_free.lock.lock,
1676			adapter->cmdq_free.lock.flags);
1677	spin_lock_irqsave(&adapter->cmdq_done.lock.lock,
1678			adapter->cmdq_done.lock.flags);
1679	outstanding = adapter->cmdq_all.count - adapter->cmdq_done.count;
1680	outstanding -= adapter->cmdq_free.count;
1681	hcmd = adapter->cmdq_all.head;
1682	while (hcmd) {
1683		if (hcmd->busy) {
1684			skb = hcmd->skb;
1685			ASSERT(skb);
1686			hcmd->busy = 0;
1687			hcmd->skb = NULL;
1688			dev_kfree_skb_irq(skb);
1689		}
1690		hcmd = hcmd->next_all;
1691	}
1692	adapter->cmdq_free.count = 0;
1693	adapter->cmdq_free.head = NULL;
1694	adapter->cmdq_free.tail = NULL;
1695	adapter->cmdq_done.count = 0;
1696	adapter->cmdq_done.head = NULL;
1697	adapter->cmdq_done.tail = NULL;
1698	adapter->cmdq_free.head = adapter->cmdq_all.head;
1699	hcmd = adapter->cmdq_all.head;
1700	while (hcmd) {
1701		adapter->cmdq_free.count++;
1702		hcmd->next = hcmd->next_all;
1703		hcmd = hcmd->next_all;
1704	}
1705	if (adapter->cmdq_free.count != adapter->cmdq_all.count) {
1706		dev_err(&adapter->netdev->dev,
1707			"free_count %d != all count %d\n",
1708			adapter->cmdq_free.count, adapter->cmdq_all.count);
1709	}
1710	spin_unlock_irqrestore(&adapter->cmdq_done.lock.lock,
1711				adapter->cmdq_done.lock.flags);
1712	spin_unlock_irqrestore(&adapter->cmdq_free.lock.lock,
1713				adapter->cmdq_free.lock.flags);
1714}
1715
1716static void slic_cmdq_getdone(struct adapter *adapter)
1717{
1718	struct slic_cmdqueue *done_cmdq = &adapter->cmdq_done;
1719	struct slic_cmdqueue *free_cmdq = &adapter->cmdq_free;
1720
1721	ASSERT(free_cmdq->head == NULL);
1722	spin_lock_irqsave(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1723
1724	free_cmdq->head = done_cmdq->head;
1725	free_cmdq->count = done_cmdq->count;
1726	done_cmdq->head = NULL;
1727	done_cmdq->tail = NULL;
1728	done_cmdq->count = 0;
1729	spin_unlock_irqrestore(&done_cmdq->lock.lock, done_cmdq->lock.flags);
1730}
1731
1732static struct slic_hostcmd *slic_cmdq_getfree(struct adapter *adapter)
1733{
1734	struct slic_cmdqueue *cmdq = &adapter->cmdq_free;
1735	struct slic_hostcmd *cmd = NULL;
1736
1737lock_and_retry:
1738	spin_lock_irqsave(&cmdq->lock.lock, cmdq->lock.flags);
1739retry:
1740	cmd = cmdq->head;
1741	if (cmd) {
1742		cmdq->head = cmd->next;
1743		cmdq->count--;
1744		spin_unlock_irqrestore(&cmdq->lock.lock, cmdq->lock.flags);
1745	} else {
1746		slic_cmdq_getdone(adapter);
1747		cmd = cmdq->head;
1748		if (cmd) {
1749			goto retry;
1750		} else {
1751			u32 *pageaddr;
1752
1753			spin_unlock_irqrestore(&cmdq->lock.lock,
1754						cmdq->lock.flags);
1755			pageaddr = slic_cmdqmem_addpage(adapter);
1756			if (pageaddr) {
1757				slic_cmdq_addcmdpage(adapter, pageaddr);
1758				goto lock_and_retry;
1759			}
1760		}
1761	}
1762	return cmd;
1763}
1764
1765static void slic_cmdq_putdone_irq(struct adapter *adapter,
1766				struct slic_hostcmd *cmd)
1767{
1768	struct slic_cmdqueue *cmdq = &adapter->cmdq_done;
1769
1770	spin_lock(&cmdq->lock.lock);
1771	cmd->busy = 0;
1772	cmd->next = cmdq->head;
1773	cmdq->head = cmd;
1774	cmdq->count++;
1775	if ((adapter->xmitq_full) && (cmdq->count > 10))
1776		netif_wake_queue(adapter->netdev);
1777	spin_unlock(&cmdq->lock.lock);
1778}
1779
1780static int slic_rcvqueue_fill(struct adapter *adapter)
1781{
1782	void *paddr;
1783	u32 paddrl;
1784	u32 paddrh;
1785	struct slic_rcvqueue *rcvq = &adapter->rcvqueue;
1786	int i = 0;
1787	struct device *dev = &adapter->netdev->dev;
1788
1789	while (i < SLIC_RCVQ_FILLENTRIES) {
1790		struct slic_rcvbuf *rcvbuf;
1791		struct sk_buff *skb;
1792#ifdef KLUDGE_FOR_4GB_BOUNDARY
1793retry_rcvqfill:
1794#endif
1795		skb = alloc_skb(SLIC_RCVQ_RCVBUFSIZE, GFP_ATOMIC);
1796		if (skb) {
1797			paddr = (void *)pci_map_single(adapter->pcidev,
1798							  skb->data,
1799							  SLIC_RCVQ_RCVBUFSIZE,
1800							  PCI_DMA_FROMDEVICE);
1801			paddrl = SLIC_GET_ADDR_LOW(paddr);
1802			paddrh = SLIC_GET_ADDR_HIGH(paddr);
1803
1804			skb->len = SLIC_RCVBUF_HEADSIZE;
1805			rcvbuf = (struct slic_rcvbuf *)skb->head;
1806			rcvbuf->status = 0;
1807			skb->next = NULL;
1808#ifdef KLUDGE_FOR_4GB_BOUNDARY
1809			if (paddrl == 0) {
1810				dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1811					__func__);
1812				dev_err(dev, "skb[%p] PROBLEM\n", skb);
1813				dev_err(dev, "         skbdata[%p]\n", skb->data);
1814				dev_err(dev, "         skblen[%x]\n", skb->len);
1815				dev_err(dev, "         paddr[%p]\n", paddr);
1816				dev_err(dev, "         paddrl[%x]\n", paddrl);
1817				dev_err(dev, "         paddrh[%x]\n", paddrh);
1818				dev_err(dev, "         rcvq->head[%p]\n", rcvq->head);
1819				dev_err(dev, "         rcvq->tail[%p]\n", rcvq->tail);
1820				dev_err(dev, "         rcvq->count[%x]\n", rcvq->count);
1821				dev_err(dev, "SKIP THIS SKB!!!!!!!!\n");
1822				goto retry_rcvqfill;
1823			}
1824#else
1825			if (paddrl == 0) {
1826				dev_err(dev, "%s: LOW 32bits PHYSICAL ADDRESS == 0\n",
1827					__func__);
1828				dev_err(dev, "skb[%p] PROBLEM\n", skb);
1829				dev_err(dev, "         skbdata[%p]\n", skb->data);
1830				dev_err(dev, "         skblen[%x]\n", skb->len);
1831				dev_err(dev, "         paddr[%p]\n", paddr);
1832				dev_err(dev, "         paddrl[%x]\n", paddrl);
1833				dev_err(dev, "         paddrh[%x]\n", paddrh);
1834				dev_err(dev, "         rcvq->head[%p]\n", rcvq->head);
1835				dev_err(dev, "         rcvq->tail[%p]\n", rcvq->tail);
1836				dev_err(dev, "         rcvq->count[%x]\n", rcvq->count);
1837				dev_err(dev, "GIVE TO CARD ANYWAY\n");
1838			}
1839#endif
1840			if (paddrh == 0) {
1841				slic_reg32_write(&adapter->slic_regs->slic_hbar,
1842						 (u32)paddrl, DONT_FLUSH);
1843			} else {
1844				slic_reg64_write(adapter,
1845					&adapter->slic_regs->slic_hbar64,
1846					paddrl,
1847					&adapter->slic_regs->slic_addr_upper,
1848					paddrh, DONT_FLUSH);
1849			}
1850			if (rcvq->head)
1851				rcvq->tail->next = skb;
1852			else
1853				rcvq->head = skb;
1854			rcvq->tail = skb;
1855			rcvq->count++;
1856			i++;
1857		} else {
1858			dev_err(&adapter->netdev->dev,
1859				"slic_rcvqueue_fill could only get [%d] skbuffs\n",
1860				i);
1861			break;
1862		}
1863	}
1864	return i;
1865}
1866
1867static void slic_rcvqueue_free(struct adapter *adapter)
1868{
1869	struct slic_rcvqueue *rcvq = 

Large files files are truncated, but you can click here to view the full file