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/drivers/staging/rtl8712/rtl871x_pwrctrl.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C Header | 127 lines | 93 code | 26 blank | 8 comment | 0 complexity | 07d32a207c183798c9a685d515ae31c7 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1#ifndef __RTL871X_PWRCTRL_H_
  2#define __RTL871X_PWRCTRL_H_
  3
  4#include "osdep_service.h"
  5#include "drv_types.h"
  6
  7
  8#define FW_PWR0	0
  9#define FW_PWR1		1
 10#define FW_PWR2		2
 11#define FW_PWR3		3
 12
 13
 14#define HW_PWR0	7
 15#define HW_PWR1		6
 16#define HW_PWR2		2
 17#define HW_PWR3	0
 18#define HW_PWR4	8
 19
 20#define FW_PWRMSK	0x7
 21
 22
 23#define XMIT_ALIVE	BIT(0)
 24#define RECV_ALIVE	BIT(1)
 25#define CMD_ALIVE	BIT(2)
 26#define EVT_ALIVE	BIT(3)
 27
 28
 29enum Power_Mgnt {
 30	PS_MODE_ACTIVE	= 0	,
 31	PS_MODE_MIN			,
 32	PS_MODE_MAX			,
 33	PS_MODE_DTIM			,
 34	PS_MODE_VOIP			,
 35	PS_MODE_UAPSD_WMM	,
 36	PS_MODE_UAPSD			,
 37	PS_MODE_IBSS			,
 38	PS_MODE_WWLAN		,
 39	PM_Radio_Off			,
 40	PM_Card_Disable		,
 41	PS_MODE_NUM
 42};
 43
 44
 45/*
 46	BIT[2:0] = HW state
 47	BIT[3] = Protocol PS state, 0: register active state,
 48				    1: register sleep state
 49	BIT[4] = sub-state
 50*/
 51
 52#define		PS_DPS				BIT(0)
 53#define		PS_LCLK				(PS_DPS)
 54#define	PS_RF_OFF			BIT(1)
 55#define	PS_ALL_ON			BIT(2)
 56#define	PS_ST_ACTIVE		BIT(3)
 57#define	PS_LP				BIT(4)	/* low performance */
 58
 59#define	PS_STATE_MASK		(0x0F)
 60#define	PS_STATE_HW_MASK	(0x07)
 61#define		PS_SEQ_MASK		(0xc0)
 62
 63#define	PS_STATE(x)			(PS_STATE_MASK & (x))
 64#define	PS_STATE_HW(x)	(PS_STATE_HW_MASK & (x))
 65#define	PS_SEQ(x)			(PS_SEQ_MASK & (x))
 66
 67#define	PS_STATE_S0		(PS_DPS)
 68#define		PS_STATE_S1		(PS_LCLK)
 69#define	PS_STATE_S2		(PS_RF_OFF)
 70#define		PS_STATE_S3		(PS_ALL_ON)
 71#define	PS_STATE_S4		((PS_ST_ACTIVE) | (PS_ALL_ON))
 72
 73
 74#define		PS_IS_RF_ON(x)		((x) & (PS_ALL_ON))
 75#define		PS_IS_ACTIVE(x)		((x) & (PS_ST_ACTIVE))
 76#define		CLR_PS_STATE(x)	((x) = ((x) & (0xF0)))
 77
 78
 79struct reportpwrstate_parm {
 80	unsigned char mode;
 81	unsigned char state; /* the CPWM value */
 82	unsigned short rsvd;
 83};
 84
 85static inline void _enter_pwrlock(struct semaphore *plock)
 86{
 87	_down_sema(plock);
 88}
 89
 90struct	pwrctrl_priv {
 91	struct semaphore lock;
 92	/*volatile*/ u8 rpwm; /* requested power state for fw */
 93	/* fw current power state. updated when 1. read from HCPWM or
 94	 * 2. driver lowers power level */
 95	/*volatile*/ u8 cpwm;
 96	/*volatile*/ u8 tog; /* toggling */
 97	/*volatile*/ u8 cpwm_tog; /* toggling */
 98	/*volatile*/ u8 tgt_rpwm; /* wanted power state */
 99	uint pwr_mode;
100	uint smart_ps;
101	uint alives;
102	uint ImrContent;	/* used to store original imr. */
103	uint bSleep; /* sleep -> active is different from active -> sleep. */
104
105	_workitem SetPSModeWorkItem;
106	_workitem rpwm_workitem;
107	struct timer_list rpwm_check_timer;
108	u8	rpwm_retry;
109	uint	bSetPSModeWorkItemInProgress;
110
111	struct semaphore pnp_pwr_mgnt_sema;
112	spinlock_t pnp_pwr_mgnt_lock;
113	s32	pnp_current_pwr_state;
114	u8	pnp_bstop_trx;
115	u8	pnp_wwirp_pending;
116};
117
118void r8712_init_pwrctrl_priv(struct _adapter *adapter);
119sint r8712_register_cmd_alive(struct _adapter *padapter);
120void r8712_unregister_cmd_alive(struct _adapter *padapter);
121void r8712_cpwm_int_hdl(struct _adapter *padapter,
122			struct reportpwrstate_parm *preportpwrstate);
123void r8712_set_ps_mode(struct _adapter *padapter, uint ps_mode,
124			uint smart_ps);
125void r8712_set_rpwm(struct _adapter *padapter, u8 val8);
126
127#endif  /* __RTL871X_PWRCTRL_H_ */