/drivers/staging/rtl8712/rtl871x_pwrctrl.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C Header · 127 lines · 93 code · 26 blank · 8 comment · 0 complexity · 07d32a207c183798c9a685d515ae31c7 MD5 · raw file

  1. #ifndef __RTL871X_PWRCTRL_H_
  2. #define __RTL871X_PWRCTRL_H_
  3. #include "osdep_service.h"
  4. #include "drv_types.h"
  5. #define FW_PWR0 0
  6. #define FW_PWR1 1
  7. #define FW_PWR2 2
  8. #define FW_PWR3 3
  9. #define HW_PWR0 7
  10. #define HW_PWR1 6
  11. #define HW_PWR2 2
  12. #define HW_PWR3 0
  13. #define HW_PWR4 8
  14. #define FW_PWRMSK 0x7
  15. #define XMIT_ALIVE BIT(0)
  16. #define RECV_ALIVE BIT(1)
  17. #define CMD_ALIVE BIT(2)
  18. #define EVT_ALIVE BIT(3)
  19. enum Power_Mgnt {
  20. PS_MODE_ACTIVE = 0 ,
  21. PS_MODE_MIN ,
  22. PS_MODE_MAX ,
  23. PS_MODE_DTIM ,
  24. PS_MODE_VOIP ,
  25. PS_MODE_UAPSD_WMM ,
  26. PS_MODE_UAPSD ,
  27. PS_MODE_IBSS ,
  28. PS_MODE_WWLAN ,
  29. PM_Radio_Off ,
  30. PM_Card_Disable ,
  31. PS_MODE_NUM
  32. };
  33. /*
  34. BIT[2:0] = HW state
  35. BIT[3] = Protocol PS state, 0: register active state,
  36. 1: register sleep state
  37. BIT[4] = sub-state
  38. */
  39. #define PS_DPS BIT(0)
  40. #define PS_LCLK (PS_DPS)
  41. #define PS_RF_OFF BIT(1)
  42. #define PS_ALL_ON BIT(2)
  43. #define PS_ST_ACTIVE BIT(3)
  44. #define PS_LP BIT(4) /* low performance */
  45. #define PS_STATE_MASK (0x0F)
  46. #define PS_STATE_HW_MASK (0x07)
  47. #define PS_SEQ_MASK (0xc0)
  48. #define PS_STATE(x) (PS_STATE_MASK & (x))
  49. #define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
  50. #define PS_SEQ(x) (PS_SEQ_MASK & (x))
  51. #define PS_STATE_S0 (PS_DPS)
  52. #define PS_STATE_S1 (PS_LCLK)
  53. #define PS_STATE_S2 (PS_RF_OFF)
  54. #define PS_STATE_S3 (PS_ALL_ON)
  55. #define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
  56. #define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
  57. #define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
  58. #define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
  59. struct reportpwrstate_parm {
  60. unsigned char mode;
  61. unsigned char state; /* the CPWM value */
  62. unsigned short rsvd;
  63. };
  64. static inline void _enter_pwrlock(struct semaphore *plock)
  65. {
  66. _down_sema(plock);
  67. }
  68. struct pwrctrl_priv {
  69. struct semaphore lock;
  70. /*volatile*/ u8 rpwm; /* requested power state for fw */
  71. /* fw current power state. updated when 1. read from HCPWM or
  72. * 2. driver lowers power level */
  73. /*volatile*/ u8 cpwm;
  74. /*volatile*/ u8 tog; /* toggling */
  75. /*volatile*/ u8 cpwm_tog; /* toggling */
  76. /*volatile*/ u8 tgt_rpwm; /* wanted power state */
  77. uint pwr_mode;
  78. uint smart_ps;
  79. uint alives;
  80. uint ImrContent; /* used to store original imr. */
  81. uint bSleep; /* sleep -> active is different from active -> sleep. */
  82. _workitem SetPSModeWorkItem;
  83. _workitem rpwm_workitem;
  84. struct timer_list rpwm_check_timer;
  85. u8 rpwm_retry;
  86. uint bSetPSModeWorkItemInProgress;
  87. struct semaphore pnp_pwr_mgnt_sema;
  88. spinlock_t pnp_pwr_mgnt_lock;
  89. s32 pnp_current_pwr_state;
  90. u8 pnp_bstop_trx;
  91. u8 pnp_wwirp_pending;
  92. };
  93. void r8712_init_pwrctrl_priv(struct _adapter *adapter);
  94. sint r8712_register_cmd_alive(struct _adapter *padapter);
  95. void r8712_unregister_cmd_alive(struct _adapter *padapter);
  96. void r8712_cpwm_int_hdl(struct _adapter *padapter,
  97. struct reportpwrstate_parm *preportpwrstate);
  98. void r8712_set_ps_mode(struct _adapter *padapter, uint ps_mode,
  99. uint smart_ps);
  100. void r8712_set_rpwm(struct _adapter *padapter, u8 val8);
  101. #endif /* __RTL871X_PWRCTRL_H_ */