/drivers/staging/iio/meter/ade7854-spi.c

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t · C · 370 lines · 315 code · 48 blank · 7 comment · 7 complexity · 39a5cf0e206a0a483a84293b87ef3e47 MD5 · raw file

  1. /*
  2. * ADE7854/58/68/78 Polyphase Multifunction Energy Metering IC Driver (SPI Bus)
  3. *
  4. * Copyright 2010 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2 or later.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/kernel.h>
  10. #include <linux/spi/spi.h>
  11. #include <linux/slab.h>
  12. #include "../iio.h"
  13. #include "ade7854.h"
  14. static int ade7854_spi_write_reg_8(struct device *dev,
  15. u16 reg_address,
  16. u8 value)
  17. {
  18. int ret;
  19. struct spi_message msg;
  20. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  21. struct ade7854_state *st = iio_priv(indio_dev);
  22. struct spi_transfer xfer = {
  23. .tx_buf = st->tx,
  24. .bits_per_word = 8,
  25. .len = 4,
  26. };
  27. mutex_lock(&st->buf_lock);
  28. st->tx[0] = ADE7854_WRITE_REG;
  29. st->tx[1] = (reg_address >> 8) & 0xFF;
  30. st->tx[2] = reg_address & 0xFF;
  31. st->tx[3] = value & 0xFF;
  32. spi_message_init(&msg);
  33. spi_message_add_tail(&xfer, &msg);
  34. ret = spi_sync(st->spi, &msg);
  35. mutex_unlock(&st->buf_lock);
  36. return ret;
  37. }
  38. static int ade7854_spi_write_reg_16(struct device *dev,
  39. u16 reg_address,
  40. u16 value)
  41. {
  42. int ret;
  43. struct spi_message msg;
  44. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  45. struct ade7854_state *st = iio_priv(indio_dev);
  46. struct spi_transfer xfer = {
  47. .tx_buf = st->tx,
  48. .bits_per_word = 8,
  49. .len = 5,
  50. };
  51. mutex_lock(&st->buf_lock);
  52. st->tx[0] = ADE7854_WRITE_REG;
  53. st->tx[1] = (reg_address >> 8) & 0xFF;
  54. st->tx[2] = reg_address & 0xFF;
  55. st->tx[3] = (value >> 8) & 0xFF;
  56. st->tx[4] = value & 0xFF;
  57. spi_message_init(&msg);
  58. spi_message_add_tail(&xfer, &msg);
  59. ret = spi_sync(st->spi, &msg);
  60. mutex_unlock(&st->buf_lock);
  61. return ret;
  62. }
  63. static int ade7854_spi_write_reg_24(struct device *dev,
  64. u16 reg_address,
  65. u32 value)
  66. {
  67. int ret;
  68. struct spi_message msg;
  69. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  70. struct ade7854_state *st = iio_priv(indio_dev);
  71. struct spi_transfer xfer = {
  72. .tx_buf = st->tx,
  73. .bits_per_word = 8,
  74. .len = 6,
  75. };
  76. mutex_lock(&st->buf_lock);
  77. st->tx[0] = ADE7854_WRITE_REG;
  78. st->tx[1] = (reg_address >> 8) & 0xFF;
  79. st->tx[2] = reg_address & 0xFF;
  80. st->tx[3] = (value >> 16) & 0xFF;
  81. st->tx[4] = (value >> 8) & 0xFF;
  82. st->tx[5] = value & 0xFF;
  83. spi_message_init(&msg);
  84. spi_message_add_tail(&xfer, &msg);
  85. ret = spi_sync(st->spi, &msg);
  86. mutex_unlock(&st->buf_lock);
  87. return ret;
  88. }
  89. static int ade7854_spi_write_reg_32(struct device *dev,
  90. u16 reg_address,
  91. u32 value)
  92. {
  93. int ret;
  94. struct spi_message msg;
  95. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  96. struct ade7854_state *st = iio_priv(indio_dev);
  97. struct spi_transfer xfer = {
  98. .tx_buf = st->tx,
  99. .bits_per_word = 8,
  100. .len = 7,
  101. };
  102. mutex_lock(&st->buf_lock);
  103. st->tx[0] = ADE7854_WRITE_REG;
  104. st->tx[1] = (reg_address >> 8) & 0xFF;
  105. st->tx[2] = reg_address & 0xFF;
  106. st->tx[3] = (value >> 24) & 0xFF;
  107. st->tx[4] = (value >> 16) & 0xFF;
  108. st->tx[5] = (value >> 8) & 0xFF;
  109. st->tx[6] = value & 0xFF;
  110. spi_message_init(&msg);
  111. spi_message_add_tail(&xfer, &msg);
  112. ret = spi_sync(st->spi, &msg);
  113. mutex_unlock(&st->buf_lock);
  114. return ret;
  115. }
  116. static int ade7854_spi_read_reg_8(struct device *dev,
  117. u16 reg_address,
  118. u8 *val)
  119. {
  120. struct spi_message msg;
  121. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  122. struct ade7854_state *st = iio_priv(indio_dev);
  123. int ret;
  124. struct spi_transfer xfers[] = {
  125. {
  126. .tx_buf = st->tx,
  127. .bits_per_word = 8,
  128. .len = 3,
  129. }, {
  130. .rx_buf = st->rx,
  131. .bits_per_word = 8,
  132. .len = 1,
  133. }
  134. };
  135. mutex_lock(&st->buf_lock);
  136. st->tx[0] = ADE7854_READ_REG;
  137. st->tx[1] = (reg_address >> 8) & 0xFF;
  138. st->tx[2] = reg_address & 0xFF;
  139. spi_message_init(&msg);
  140. spi_message_add_tail(&xfers[0], &msg);
  141. spi_message_add_tail(&xfers[1], &msg);
  142. ret = spi_sync(st->spi, &msg);
  143. if (ret) {
  144. dev_err(&st->spi->dev, "problem when reading 8 bit register 0x%02X",
  145. reg_address);
  146. goto error_ret;
  147. }
  148. *val = st->rx[0];
  149. error_ret:
  150. mutex_unlock(&st->buf_lock);
  151. return ret;
  152. }
  153. static int ade7854_spi_read_reg_16(struct device *dev,
  154. u16 reg_address,
  155. u16 *val)
  156. {
  157. struct spi_message msg;
  158. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  159. struct ade7854_state *st = iio_priv(indio_dev);
  160. int ret;
  161. struct spi_transfer xfers[] = {
  162. {
  163. .tx_buf = st->tx,
  164. .bits_per_word = 8,
  165. .len = 3,
  166. }, {
  167. .rx_buf = st->rx,
  168. .bits_per_word = 8,
  169. .len = 2,
  170. }
  171. };
  172. mutex_lock(&st->buf_lock);
  173. st->tx[0] = ADE7854_READ_REG;
  174. st->tx[1] = (reg_address >> 8) & 0xFF;
  175. st->tx[2] = reg_address & 0xFF;
  176. spi_message_init(&msg);
  177. spi_message_add_tail(&xfers[0], &msg);
  178. spi_message_add_tail(&xfers[1], &msg);
  179. ret = spi_sync(st->spi, &msg);
  180. if (ret) {
  181. dev_err(&st->spi->dev, "problem when reading 16 bit register 0x%02X",
  182. reg_address);
  183. goto error_ret;
  184. }
  185. *val = be16_to_cpup((const __be16 *)st->rx);
  186. error_ret:
  187. mutex_unlock(&st->buf_lock);
  188. return ret;
  189. }
  190. static int ade7854_spi_read_reg_24(struct device *dev,
  191. u16 reg_address,
  192. u32 *val)
  193. {
  194. struct spi_message msg;
  195. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  196. struct ade7854_state *st = iio_priv(indio_dev);
  197. int ret;
  198. struct spi_transfer xfers[] = {
  199. {
  200. .tx_buf = st->tx,
  201. .bits_per_word = 8,
  202. .len = 3,
  203. }, {
  204. .rx_buf = st->rx,
  205. .bits_per_word = 8,
  206. .len = 3,
  207. }
  208. };
  209. mutex_lock(&st->buf_lock);
  210. st->tx[0] = ADE7854_READ_REG;
  211. st->tx[1] = (reg_address >> 8) & 0xFF;
  212. st->tx[2] = reg_address & 0xFF;
  213. spi_message_init(&msg);
  214. spi_message_add_tail(&xfers[0], &msg);
  215. spi_message_add_tail(&xfers[1], &msg);
  216. ret = spi_sync(st->spi, &msg);
  217. if (ret) {
  218. dev_err(&st->spi->dev, "problem when reading 24 bit register 0x%02X",
  219. reg_address);
  220. goto error_ret;
  221. }
  222. *val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];
  223. error_ret:
  224. mutex_unlock(&st->buf_lock);
  225. return ret;
  226. }
  227. static int ade7854_spi_read_reg_32(struct device *dev,
  228. u16 reg_address,
  229. u32 *val)
  230. {
  231. struct spi_message msg;
  232. struct iio_dev *indio_dev = dev_get_drvdata(dev);
  233. struct ade7854_state *st = iio_priv(indio_dev);
  234. int ret;
  235. struct spi_transfer xfers[] = {
  236. {
  237. .tx_buf = st->tx,
  238. .bits_per_word = 8,
  239. .len = 3,
  240. }, {
  241. .rx_buf = st->rx,
  242. .bits_per_word = 8,
  243. .len = 4,
  244. }
  245. };
  246. mutex_lock(&st->buf_lock);
  247. st->tx[0] = ADE7854_READ_REG;
  248. st->tx[1] = (reg_address >> 8) & 0xFF;
  249. st->tx[2] = reg_address & 0xFF;
  250. spi_message_init(&msg);
  251. spi_message_add_tail(&xfers[0], &msg);
  252. spi_message_add_tail(&xfers[1], &msg);
  253. ret = spi_sync(st->spi, &msg);
  254. if (ret) {
  255. dev_err(&st->spi->dev, "problem when reading 32 bit register 0x%02X",
  256. reg_address);
  257. goto error_ret;
  258. }
  259. *val = be32_to_cpup((const __be32 *)st->rx);
  260. error_ret:
  261. mutex_unlock(&st->buf_lock);
  262. return ret;
  263. }
  264. static int __devinit ade7854_spi_probe(struct spi_device *spi)
  265. {
  266. int ret;
  267. struct ade7854_state *st;
  268. struct iio_dev *indio_dev;
  269. indio_dev = iio_allocate_device(sizeof(*st));
  270. if (indio_dev == NULL)
  271. return -ENOMEM;
  272. st = iio_priv(indio_dev);
  273. spi_set_drvdata(spi, indio_dev);
  274. st->read_reg_8 = ade7854_spi_read_reg_8;
  275. st->read_reg_16 = ade7854_spi_read_reg_16;
  276. st->read_reg_24 = ade7854_spi_read_reg_24;
  277. st->read_reg_32 = ade7854_spi_read_reg_32;
  278. st->write_reg_8 = ade7854_spi_write_reg_8;
  279. st->write_reg_16 = ade7854_spi_write_reg_16;
  280. st->write_reg_24 = ade7854_spi_write_reg_24;
  281. st->write_reg_32 = ade7854_spi_write_reg_32;
  282. st->irq = spi->irq;
  283. st->spi = spi;
  284. ret = ade7854_probe(indio_dev, &spi->dev);
  285. if (ret)
  286. iio_free_device(indio_dev);
  287. return 0;
  288. }
  289. static int ade7854_spi_remove(struct spi_device *spi)
  290. {
  291. ade7854_remove(spi_get_drvdata(spi));
  292. return 0;
  293. }
  294. static const struct spi_device_id ade7854_id[] = {
  295. { "ade7854", 0 },
  296. { "ade7858", 0 },
  297. { "ade7868", 0 },
  298. { "ade7878", 0 },
  299. { }
  300. };
  301. static struct spi_driver ade7854_driver = {
  302. .driver = {
  303. .name = "ade7854",
  304. .owner = THIS_MODULE,
  305. },
  306. .probe = ade7854_spi_probe,
  307. .remove = __devexit_p(ade7854_spi_remove),
  308. .id_table = ade7854_id,
  309. };
  310. static __init int ade7854_init(void)
  311. {
  312. return spi_register_driver(&ade7854_driver);
  313. }
  314. module_init(ade7854_init);
  315. static __exit void ade7854_exit(void)
  316. {
  317. spi_unregister_driver(&ade7854_driver);
  318. }
  319. module_exit(ade7854_exit);
  320. MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
  321. MODULE_DESCRIPTION("Analog Devices ADE7854/58/68/78 SPI Driver");
  322. MODULE_LICENSE("GPL v2");