/drivers/staging/gma500/mrst_hdmi_i2c.c

  1/*
  2 * Copyright © 2010 Intel Corporation
  3 *
  4 * Permission is hereby granted, free of charge, to any person obtaining a
  5 * copy of this software and associated documentation files (the "Software"),
  6 * to deal in the Software without restriction, including without limitation
  7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8 * and/or sell copies of the Software, and to permit persons to whom the
  9 * Software is furnished to do so, subject to the following conditions:
 10 *
 11 * The above copyright notice and this permission notice (including the next
 12 * paragraph) shall be included in all copies or substantial portions of the
 13 * Software.
 14 *
 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 21 * DEALINGS IN THE SOFTWARE.
 22 *
 23 * Authors:
 24 *	Li Peng <peng.li@intel.com>
 25 */
 26
 27#include <linux/mutex.h>
 28#include <linux/pci.h>
 29#include <linux/i2c.h>
 30#include <linux/interrupt.h>
 31#include <linux/delay.h>
 32#include "psb_drv.h"
 33
 34#define HDMI_READ(reg)		readl(hdmi_dev->regs + (reg))
 35#define HDMI_WRITE(reg, val)	writel(val, hdmi_dev->regs + (reg))
 36
 37#define HDMI_HCR	0x1000
 38#define HCR_DETECT_HDP		(1 << 6)
 39#define HCR_ENABLE_HDCP		(1 << 5)
 40#define HCR_ENABLE_AUDIO	(1 << 2)
 41#define HCR_ENABLE_PIXEL	(1 << 1)
 42#define HCR_ENABLE_TMDS		(1 << 0)
 43#define HDMI_HICR	0x1004
 44#define HDMI_INTR_I2C_ERROR	(1 << 4)
 45#define HDMI_INTR_I2C_FULL	(1 << 3)
 46#define HDMI_INTR_I2C_DONE	(1 << 2)
 47#define HDMI_INTR_HPD		(1 << 0)
 48#define HDMI_HSR	0x1008
 49#define HDMI_HISR	0x100C
 50#define HDMI_HI2CRDB0	0x1200
 51#define HDMI_HI2CHCR	0x1240
 52#define HI2C_HDCP_WRITE		(0 << 2)
 53#define HI2C_HDCP_RI_READ	(1 << 2)
 54#define HI2C_HDCP_READ		(2 << 2)
 55#define HI2C_EDID_READ		(3 << 2)
 56#define HI2C_READ_CONTINUE	(1 << 1)
 57#define HI2C_ENABLE_TRANSACTION	(1 << 0)
 58
 59#define HDMI_ICRH	0x1100
 60#define HDMI_HI2CTDR0	0x1244
 61#define HDMI_HI2CTDR1	0x1248
 62
 63#define I2C_STAT_INIT		0
 64#define I2C_READ_DONE		1
 65#define I2C_TRANSACTION_DONE	2
 66
 67struct hdmi_i2c_dev {
 68	struct i2c_adapter *adap;
 69	struct mutex i2c_lock;
 70	struct completion complete;
 71	int status;
 72	struct i2c_msg *msg;
 73	int buf_offset;
 74};
 75
 76static void hdmi_i2c_irq_enable(struct mrst_hdmi_dev *hdmi_dev)
 77{
 78	u32 temp;
 79
 80	temp = HDMI_READ(HDMI_HICR);
 81	temp |= (HDMI_INTR_I2C_ERROR | HDMI_INTR_I2C_FULL | HDMI_INTR_I2C_DONE);
 82	HDMI_WRITE(HDMI_HICR, temp);
 83	HDMI_READ(HDMI_HICR);
 84}
 85
 86static void hdmi_i2c_irq_disable(struct mrst_hdmi_dev *hdmi_dev)
 87{
 88	HDMI_WRITE(HDMI_HICR, 0x0);
 89	HDMI_READ(HDMI_HICR);
 90}
 91
 92static int xfer_read(struct i2c_adapter *adap, struct i2c_msg *pmsg)
 93{
 94	struct mrst_hdmi_dev *hdmi_dev = i2c_get_adapdata(adap);
 95	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
 96	u32 temp;
 97
 98	i2c_dev->status = I2C_STAT_INIT;
 99	i2c_dev->msg = pmsg;
100	i2c_dev->buf_offset = 0;
101	INIT_COMPLETION(i2c_dev->complete);
102
103	/* Enable I2C transaction */
104	temp = ((pmsg->len) << 20) | HI2C_EDID_READ | HI2C_ENABLE_TRANSACTION;
105	HDMI_WRITE(HDMI_HI2CHCR, temp);
106	HDMI_READ(HDMI_HI2CHCR);
107
108	while (i2c_dev->status != I2C_TRANSACTION_DONE)
109		wait_for_completion_interruptible_timeout(&i2c_dev->complete,
110								10 * HZ);
111
112	return 0;
113}
114
115static int xfer_write(struct i2c_adapter *adap, struct i2c_msg *pmsg)
116{
117	/*
118	 * XXX: i2c write seems isn't useful for EDID probe, don't do anything
119	 */
120	return 0;
121}
122
123static int mrst_hdmi_i2c_access(struct i2c_adapter *adap,
124				struct i2c_msg *pmsg,
125				int num)
126{
127	struct mrst_hdmi_dev *hdmi_dev = i2c_get_adapdata(adap);
128	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
129	int i, err = 0;
130
131	mutex_lock(&i2c_dev->i2c_lock);
132
133	/* Enable i2c unit */
134	HDMI_WRITE(HDMI_ICRH, 0x00008760);
135
136	/* Enable irq */
137	hdmi_i2c_irq_enable(hdmi_dev);
138	for (i = 0; i < num; i++) {
139		if (pmsg->len && pmsg->buf) {
140			if (pmsg->flags & I2C_M_RD)
141				err = xfer_read(adap, pmsg);
142			else
143				err = xfer_write(adap, pmsg);
144		}
145		pmsg++;         /* next message */
146	}
147
148	/* Disable irq */
149	hdmi_i2c_irq_disable(hdmi_dev);
150
151	mutex_unlock(&i2c_dev->i2c_lock);
152
153	return i;
154}
155
156static u32 mrst_hdmi_i2c_func(struct i2c_adapter *adapter)
157{
158	return I2C_FUNC_I2C | I2C_FUNC_10BIT_ADDR;
159}
160
161static const struct i2c_algorithm mrst_hdmi_i2c_algorithm = {
162	.master_xfer	= mrst_hdmi_i2c_access,
163	.functionality  = mrst_hdmi_i2c_func,
164};
165
166static struct i2c_adapter mrst_hdmi_i2c_adapter = {
167	.name		= "mrst_hdmi_i2c",
168	.nr		= 3,
169	.owner		= THIS_MODULE,
170	.class		= I2C_CLASS_DDC,
171	.algo		= &mrst_hdmi_i2c_algorithm,
172};
173
174static void hdmi_i2c_read(struct mrst_hdmi_dev *hdmi_dev)
175{
176	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
177	struct i2c_msg *msg = i2c_dev->msg;
178	u8 *buf = msg->buf;
179	u32 temp;
180	int i, offset;
181
182	offset = i2c_dev->buf_offset;
183	for (i = 0; i < 0x10; i++) {
184		temp = HDMI_READ(HDMI_HI2CRDB0 + (i * 4));
185		memcpy(buf + (offset + i * 4), &temp, 4);
186	}
187	i2c_dev->buf_offset += (0x10 * 4);
188
189	/* clearing read buffer full intr */
190	temp = HDMI_READ(HDMI_HISR);
191	HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_FULL);
192	HDMI_READ(HDMI_HISR);
193
194	/* continue read transaction */
195	temp = HDMI_READ(HDMI_HI2CHCR);
196	HDMI_WRITE(HDMI_HI2CHCR, temp | HI2C_READ_CONTINUE);
197	HDMI_READ(HDMI_HI2CHCR);
198
199	i2c_dev->status = I2C_READ_DONE;
200	return;
201}
202
203static void hdmi_i2c_transaction_done(struct mrst_hdmi_dev *hdmi_dev)
204{
205	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
206	u32 temp;
207
208	/* clear transaction done intr */
209	temp = HDMI_READ(HDMI_HISR);
210	HDMI_WRITE(HDMI_HISR, temp | HDMI_INTR_I2C_DONE);
211	HDMI_READ(HDMI_HISR);
212
213
214	temp = HDMI_READ(HDMI_HI2CHCR);
215	HDMI_WRITE(HDMI_HI2CHCR, temp & ~HI2C_ENABLE_TRANSACTION);
216	HDMI_READ(HDMI_HI2CHCR);
217
218	i2c_dev->status = I2C_TRANSACTION_DONE;
219	return;
220}
221
222static irqreturn_t mrst_hdmi_i2c_handler(int this_irq, void *dev)
223{
224	struct mrst_hdmi_dev *hdmi_dev = dev;
225	struct hdmi_i2c_dev *i2c_dev = hdmi_dev->i2c_dev;
226	u32 stat;
227
228	stat = HDMI_READ(HDMI_HISR);
229
230	if (stat & HDMI_INTR_HPD) {
231		HDMI_WRITE(HDMI_HISR, stat | HDMI_INTR_HPD);
232		HDMI_READ(HDMI_HISR);
233	}
234
235	if (stat & HDMI_INTR_I2C_FULL)
236		hdmi_i2c_read(hdmi_dev);
237
238	if (stat & HDMI_INTR_I2C_DONE)
239		hdmi_i2c_transaction_done(hdmi_dev);
240
241	complete(&i2c_dev->complete);
242
243	return IRQ_HANDLED;
244}
245
246/*
247 * choose alternate function 2 of GPIO pin 52, 53,
248 * which is used by HDMI I2C logic
249 */
250static void mrst_hdmi_i2c_gpio_fix(void)
251{
252	void *base;
253	unsigned int gpio_base = 0xff12c000;
254	int gpio_len = 0x1000;
255	u32 temp;
256
257	base = ioremap((resource_size_t)gpio_base, gpio_len);
258	if (base == NULL) {
259		DRM_ERROR("gpio ioremap fail\n");
260		return;
261	}
262
263	temp = readl(base + 0x44);
264	DRM_DEBUG_DRIVER("old gpio val %x\n", temp);
265	writel((temp | 0x00000a00), (base +  0x44));
266	temp = readl(base + 0x44);
267	DRM_DEBUG_DRIVER("new gpio val %x\n", temp);
268
269	iounmap(base);
270}
271
272int mrst_hdmi_i2c_init(struct pci_dev *dev)
273{
274	struct mrst_hdmi_dev *hdmi_dev;
275	struct hdmi_i2c_dev *i2c_dev;
276	int ret;
277
278	hdmi_dev = pci_get_drvdata(dev);
279
280	i2c_dev = kzalloc(sizeof(struct hdmi_i2c_dev), GFP_KERNEL);
281	if (i2c_dev == NULL) {
282		DRM_ERROR("Can't allocate interface\n");
283		ret = -ENOMEM;
284		goto exit;
285	}
286
287	i2c_dev->adap = &mrst_hdmi_i2c_adapter;
288	i2c_dev->status = I2C_STAT_INIT;
289	init_completion(&i2c_dev->complete);
290	mutex_init(&i2c_dev->i2c_lock);
291	i2c_set_adapdata(&mrst_hdmi_i2c_adapter, hdmi_dev);
292	hdmi_dev->i2c_dev = i2c_dev;
293
294	/* Enable HDMI I2C function on gpio */
295	mrst_hdmi_i2c_gpio_fix();
296
297	/* request irq */
298	ret = request_irq(dev->irq, mrst_hdmi_i2c_handler, IRQF_SHARED,
299			  mrst_hdmi_i2c_adapter.name, hdmi_dev);
300	if (ret) {
301		DRM_ERROR("Failed to request IRQ for I2C controller\n");
302		goto err;
303	}
304
305	/* Adapter registration */
306	ret = i2c_add_numbered_adapter(&mrst_hdmi_i2c_adapter);
307	return ret;
308
309err:
310	kfree(i2c_dev);
311exit:
312	return ret;
313}
314
315void mrst_hdmi_i2c_exit(struct pci_dev *dev)
316{
317	struct mrst_hdmi_dev *hdmi_dev;
318	struct hdmi_i2c_dev *i2c_dev;
319
320	hdmi_dev = pci_get_drvdata(dev);
321	if (i2c_del_adapter(&mrst_hdmi_i2c_adapter))
322		DRM_DEBUG_DRIVER("Failed to delete hdmi-i2c adapter\n");
323
324	i2c_dev = hdmi_dev->i2c_dev;
325	kfree(i2c_dev);
326	free_irq(dev->irq, hdmi_dev);
327}