PageRenderTime 5ms CodeModel.GetById 1ms app.highlight 2ms RepoModel.GetById 1ms app.codeStats 0ms

/drivers/spi/spi-s3c24xx-fiq.S

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
Assembly | 116 lines | 88 code | 28 blank | 0 comment | 0 complexity | feaa4ee16cf5c0d8dc5c57f142976cec MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/* linux/drivers/spi/spi_s3c24xx_fiq.S
  2 *
  3 * Copyright 2009 Simtec Electronics
  4 *	Ben Dooks <ben@simtec.co.uk>
  5 *
  6 * S3C24XX SPI - FIQ pseudo-DMA transfer code
  7 *
  8 * This program is free software; you can redistribute it and/or modify
  9 * it under the terms of the GNU General Public License version 2 as
 10 * published by the Free Software Foundation.
 11*/
 12
 13#include <linux/linkage.h>
 14#include <asm/assembler.h>
 15
 16#include <mach/map.h>
 17#include <mach/regs-irq.h>
 18#include <plat/regs-spi.h>
 19
 20#include "spi-s3c24xx-fiq.h"
 21
 22	.text
 23
 24	@ entry to these routines is as follows, with the register names
 25	@ defined in fiq.h so that they can be shared with the C files which
 26	@ setup the calling registers.
 27	@
 28	@ fiq_rirq	The base of the IRQ registers to find S3C2410_SRCPND
 29	@ fiq_rtmp	Temporary register to hold tx/rx data
 30	@ fiq_rspi	The base of the SPI register block
 31	@ fiq_rtx	The tx buffer pointer
 32	@ fiq_rrx	The rx buffer pointer
 33	@ fiq_rcount	The number of bytes to move
 34
 35	@ each entry starts with a word entry of how long it is
 36	@ and an offset to the irq acknowledgment word
 37
 38ENTRY(s3c24xx_spi_fiq_rx)
 39s3c24xx_spi_fix_rx:
 40	.word	fiq_rx_end - fiq_rx_start
 41	.word	fiq_rx_irq_ack - fiq_rx_start
 42fiq_rx_start:
 43	ldr	fiq_rtmp, fiq_rx_irq_ack
 44	str	fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
 45
 46	ldrb	fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
 47	strb	fiq_rtmp, [ fiq_rrx ], #1
 48
 49	mov	fiq_rtmp, #0xff
 50	strb	fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
 51
 52	subs	fiq_rcount, fiq_rcount, #1
 53	subnes	pc, lr, #4		@@ return, still have work to do
 54
 55	@@ set IRQ controller so that next op will trigger IRQ
 56	mov	fiq_rtmp, #0
 57	str	fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
 58	subs	pc, lr, #4
 59
 60fiq_rx_irq_ack:
 61	.word	0
 62fiq_rx_end:
 63
 64ENTRY(s3c24xx_spi_fiq_txrx)
 65s3c24xx_spi_fiq_txrx:
 66	.word	fiq_txrx_end - fiq_txrx_start
 67	.word	fiq_txrx_irq_ack - fiq_txrx_start
 68fiq_txrx_start:
 69
 70	ldrb	fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
 71	strb	fiq_rtmp, [ fiq_rrx ], #1
 72
 73	ldr	fiq_rtmp, fiq_txrx_irq_ack
 74	str	fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
 75
 76	ldrb	fiq_rtmp, [ fiq_rtx ], #1
 77	strb	fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
 78
 79	subs	fiq_rcount, fiq_rcount, #1
 80	subnes	pc, lr, #4		@@ return, still have work to do
 81
 82	mov	fiq_rtmp, #0
 83	str	fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
 84	subs	pc, lr, #4
 85
 86fiq_txrx_irq_ack:
 87	.word	0
 88
 89fiq_txrx_end:
 90
 91ENTRY(s3c24xx_spi_fiq_tx)
 92s3c24xx_spi_fix_tx:
 93	.word	fiq_tx_end - fiq_tx_start
 94	.word	fiq_tx_irq_ack - fiq_tx_start
 95fiq_tx_start:
 96	ldrb	fiq_rtmp, [ fiq_rspi, #  S3C2410_SPRDAT ]
 97
 98	ldr	fiq_rtmp, fiq_tx_irq_ack
 99	str	fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ]
100
101	ldrb	fiq_rtmp, [ fiq_rtx ], #1
102	strb	fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ]
103
104	subs	fiq_rcount, fiq_rcount, #1
105	subnes	pc, lr, #4		@@ return, still have work to do
106
107	mov	fiq_rtmp, #0
108	str	fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD  - S3C24XX_VA_IRQ ]
109	subs	pc, lr, #4
110
111fiq_tx_irq_ack:
112	.word	0
113
114fiq_tx_end:
115
116	.end