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/drivers/net/de620.h

https://bitbucket.org/cyanogenmod/android_kernel_asus_tf300t
C Header | 117 lines | 91 code | 12 blank | 14 comment | 0 complexity | 6bb71f30309693d45a5cbe4448d893f3 MD5 | raw file
Possible License(s): LGPL-2.0, AGPL-1.0, GPL-2.0
  1/*********************************************************
  2 *                                                       *
  3 * Definition of D-Link DE-620 Ethernet Pocket adapter   *
  4 *                                                       *
  5 *********************************************************/
  6
  7/* DE-620's CMD port Command */
  8#define CS0		0x08	/* 1->0 command strobe */
  9#define ICEN		0x04	/* 0=enable DL3520 host interface */
 10#define DS0		0x02	/* 1->0 data strobe 0 */
 11#define DS1		0x01	/* 1->0 data strobe 1 */
 12
 13#define WDIR		0x20	/* general 0=read  1=write */
 14#define RDIR		0x00	/*  (not 100% confirm ) */
 15#define PS2WDIR		0x00	/* ps/2 mode 1=read, 0=write */
 16#define PS2RDIR		0x20
 17
 18#define IRQEN		0x10	/* 1 = enable printer IRQ line */
 19#define SELECTIN	0x08	/* 1 = select printer */
 20#define INITP		0x04	/* 0 = initial printer */
 21#define AUTOFEED	0x02	/* 1 = printer auto form feed */
 22#define STROBE		0x01	/* 0->1 data strobe */
 23
 24#define RESET		0x08
 25#define NIS0		0x20	/* 0 = BNC, 1 = UTP */
 26#define NCTL0		0x10
 27
 28/* DE-620 DIC Command */
 29#define W_DUMMY		0x00	/* DIC reserved command */
 30#define W_CR		0x20	/* DIC write command register */
 31#define W_NPR		0x40	/* DIC write Next Page Register */
 32#define W_TBR		0x60	/* DIC write Tx Byte Count 1 reg */
 33#define W_RSA		0x80	/* DIC write Remote Start Addr 1 */
 34
 35/* DE-620's STAT port bits 7-4 */
 36#define EMPTY		0x80	/* 1 = receive buffer empty */
 37#define INTLEVEL	0x40	/* 1 = interrupt level is high */
 38#define TXBF1		0x20	/* 1 = transmit buffer 1 is in use */
 39#define TXBF0		0x10	/* 1 = transmit buffer 0 is in use */
 40#define READY		0x08	/* 1 = h/w ready to accept cmd/data */
 41
 42/* IDC 1 Command */
 43#define	W_RSA1		0xa0	/* write remote start address 1 */
 44#define	W_RSA0		0xa1	/* write remote start address 0 */
 45#define	W_NPRF		0xa2	/* write next page register NPR15-NPR8 */
 46#define	W_DFR		0xa3	/* write delay factor register */
 47#define	W_CPR		0xa4	/* write current page register */
 48#define	W_SPR		0xa5	/* write start page register */
 49#define	W_EPR		0xa6	/* write end page register */
 50#define	W_SCR		0xa7	/* write system configuration register */
 51#define	W_TCR		0xa8	/* write Transceiver Configuration reg */
 52#define	W_EIP		0xa9	/* write EEPM Interface port */
 53#define	W_PAR0		0xaa	/* write physical address register 0 */
 54#define	W_PAR1		0xab	/* write physical address register 1 */
 55#define	W_PAR2		0xac	/* write physical address register 2 */
 56#define	W_PAR3		0xad	/* write physical address register 3 */
 57#define	W_PAR4		0xae	/* write physical address register 4 */
 58#define	W_PAR5		0xaf	/* write physical address register 5 */
 59
 60/* IDC 2 Command */
 61#define	R_STS		0xc0	/* read status register */
 62#define	R_CPR		0xc1	/* read current page register */
 63#define	R_BPR		0xc2	/* read boundary page register */
 64#define	R_TDR		0xc3	/* read time domain reflectometry reg */
 65
 66/* STATUS Register */
 67#define EEDI		0x80	/* EEPM DO pin */
 68#define TXSUC		0x40	/* tx success */
 69#define T16		0x20	/* tx fail 16 times */
 70#define TS1		0x40	/* 0=Tx success, 1=T16 */
 71#define TS0		0x20	/* 0=Tx success, 1=T16 */
 72#define RXGOOD		0x10	/* rx a good packet */
 73#define RXCRC		0x08	/* rx a CRC error packet */
 74#define RXSHORT		0x04	/* rx a short packet */
 75#define COLS		0x02	/* coaxial collision status */
 76#define LNKS		0x01	/* UTP link status */
 77
 78/* Command Register */
 79#define CLEAR		0x10	/* reset part of hardware */
 80#define NOPER		0x08	/* No Operation */
 81#define RNOP		0x08
 82#define RRA		0x06	/* After RR then auto-advance NPR & BPR(=NPR-1) */
 83#define RRN		0x04	/* Normal Remote Read mode */
 84#define RW1		0x02	/* Remote Write tx buffer 1  ( page 6 - 11 ) */
 85#define RW0		0x00	/* Remote Write tx buffer 0  ( page 0 - 5 ) */
 86#define TXEN		0x01	/* 0->1 tx enable */
 87
 88/* System Configuration Register */
 89#define TESTON		0x80	/* test host data transfer reliability */
 90#define SLEEP		0x40	/* sleep mode */
 91#if 0
 92#define FASTMODE	0x04	/* fast mode for intel 82360SL fast mode */
 93#define BYTEMODE	0x02	/* byte mode */
 94#else
 95#define FASTMODE	0x20	/* fast mode for intel 82360SL fast mode */
 96#define BYTEMODE	0x10	/* byte mode */
 97#endif
 98#define NIBBLEMODE	0x00	/* nibble mode */
 99#define IRQINV		0x08	/* turn off IRQ line inverter */
100#define IRQNML		0x00	/* turn on IRQ line inverter */
101#define INTON		0x04
102#define AUTOFFSET	0x02	/* auto shift address to TPR+12 */
103#define AUTOTX		0x01	/* auto tx when leave RW mode */
104
105/* Transceiver Configuration Register */
106#define JABBER		0x80	/* generate jabber condition */
107#define TXSUCINT	0x40	/* enable tx success interrupt */
108#define T16INT		0x20	/* enable T16 interrupt */
109#define RXERRPKT	0x10	/* accept CRC error or short packet */
110#define EXTERNALB2	0x0C	/* external loopback 2 */
111#define EXTERNALB1	0x08	/* external loopback 1 */
112#define INTERNALB	0x04	/* internal loopback */
113#define NMLOPERATE	0x00	/* normal operation */
114#define RXPBM		0x03	/* rx physical, broadcast, multicast */
115#define RXPB		0x02	/* rx physical, broadcast */
116#define RXALL		0x01	/* rx all packet */
117#define RXOFF		0x00	/* rx disable */